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| Patent # | Description |
|---|---|
| 2011/0175238 |
Method for Producing Semiconductor Chips and Corresponding Semiconductor
Chip A method for producing a plurality of semiconductor chips is specified. A plurality of semiconductor bodies is provided on a substrate, wherein the ... |
| 2011/0175237 |
SEMICONDUCTOR DEVICE, FLIP-CHIP MOUNTING METHOD AND FLIP-CHIP MOUNTING
APPARATUS A semiconductor chip (1) is flip-chip mounted on a circuit board (4) with an underfill resin (6) interposed between the semiconductor chip (1) and the circuit... |
| 2011/0175236 |
CHIP PACKAGE AND METHOD FOR FABRICATING THE SAME An embodiment of the invention provides a chip package, which includes a substrate having an upper surface and a lower surface, a chip disposed in or on the... |
| 2011/0175235 |
WIRING SUBSTRATE AND SEMICONDUCTOR APPARATUS INCLUDING THE WIRING
SUBSTRATE A wiring substrate includes a core substrate including an inorganic dielectric insulating base material having first and second surfaces, and linear conductors... |
| 2011/0175234 |
SEMICONDUCTOR INTEGRATED CIRCUIT A semiconductor integrated circuit free from increase in chip area or significant reversion in designing is provided. The semiconductor integrated circuit... |
| 2011/0175233 |
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME A method for fabricating a semiconductor device includes the steps of: forming a mask material film on an insulating film that is formed over a semiconductor... |
| 2011/0175232 |
SEMICONDUCTOR DEVICE A semiconductor device includes an electrode pad formed above a semiconductor substrate, and being a connecting portion for an external electrical connection; a... |
| 2011/0175231 |
Semiconductor Device Having Electrode and Manufacturing Method Thereof A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a... |
| 2011/0175230 |
Forming Compliant Contact Pads for Semiconductor Packages In one embodiment, the present invention includes a semiconductor package having a substrate with a first surface to support a semiconductor die. A second... |
| 2011/0175229 |
Semiconductor Device and Semiconductor Module Including the Same Integrated circuit devices include a semiconductor substrate having a plurality of trench isolation regions therein that define respective semiconductor active... |
| 2011/0175228 |
MOLECULAR SELF-ASSEMBLY IN SUBSTRATE PROCESSING Methods for sealing a porous dielectric are presented including: receiving a substrate, the substrate including the porous dielectric; exposing the substrate to... |
| 2011/0175227 |
POST PASSIVATION INTERCONNECTION SCHEMES ON TOP OF THE IC CHIPS A new method is provided for the creation of interconnect lines. Fine line interconnects are provided in a first layer of dielectric overlying semiconductor... |
| 2011/0175226 |
INTERCONNECT STRUCTURE FOR INTEGRATED CIRCUITS HAVING ENHANCED
ELECTROMIGRATION RESISTANCE An interconnect structure for an integrated circuit (IC) device includes a metal line formed within a dielectric layer, the metal line having one or more... |
| 2011/0175225 |
METHOD OF FORMING AN EM PROTECTED SEMICONDUCTOR DIE In one embodiment, a semiconductor die is formed to have sloped sidewalls. A conductor is formed on the sloped sidewalls. |
| 2011/0175224 |
BONDED STRUCTURE AND MANUFACTURING METHOD FOR BONDED STRUCTURE A manufacturing method for a bonded structure, in which a semiconductor device is bonded to an electrode by a bonding portion, the method including: first... |
| 2011/0175223 |
Stacked Semiconductor Components Having Conductive Interconnects A stacked semiconductor component includes a semiconductor substrate having a substrate contact, a substrate opening extending to an inner surface of the... |
| 2011/0175222 |
SEMICONDUCTOR PACKAGE Provided is a semiconductor package. The semiconductor package may include a base substrate having a substrate part and at least one support part. The substrate... |
| 2011/0175221 |
CHIP PACKAGE AND FABRICATION METHOD THEREOF A chip package and a fabrication method thereof are provided according to an embodiment of the invention. The chip package contains a semiconductor substrate... |
| 2011/0175220 |
SEMICONDUCTOR DEVICE HAVING CONDUCTIVE PADS AND A METHOD OF MANUFACTURING
THE SAME A semiconductor device includes at least two conductive pads, one of the conductive pads being formed above another of the at least two conductive pads, and a... |
| 2011/0175219 |
METHOD FOR MODULAR ARRANGEMENT OF A SILICON BASED ARRAY AND MODULAR
SILICON BASED ARRAY A silicon based module, including: a substrate; a first chip assembly fixed to the substrate, the first chip assembly including a first silicon chip and a first... |
| 2011/0175218 |
PACKAGE ASSEMBLY HAVING A SEMICONDUCTOR SUBSTRATE Embodiments of the present disclosure provide a method that includes providing a semiconductor substrate comprising a semiconductor material, forming a... |
| 2011/0175217 |
Semiconductor Packages Including Die and L-Shaped Lead and Method of
Manufacture The present technology is directed toward semiconductors packaged by electrically coupling a plurality of die to an upper and lower lead frame. The opposite... |
| 2011/0175216 |
INTEGRATED VOID FILL FOR THROUGH SILICON VIA A microelectronic assembly and related method of forming a through hole extending through a first wafer and a second wafer are provided. The first and second... |
| 2011/0175215 |
3D CHIP STACK HAVING ENCAPSULATED CHIP-IN-CHIP A method of forming a three-dimensional (3D) chip is provided in which a second chip is present embedded within a first chip. In one embodiment, the method... |
| 2011/0175214 |
Power Semiconductor Module With Interconnected Package Portions A power semiconductor module includes a package having a first package portion and a second package portion. The side of the first package portion facing the... |
| 2011/0175213 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF A semiconductor device includes: at least one semiconductor element having electrode terminals; a metal plate supporting the semiconductor element; and a wiring... |
| 2011/0175212 |
DUAL DIE SEMICONDUCTOR PACKAGE A dual die semiconductor package has a grid array of electrical contacts on a bottom surface of a substrate. There is a first semiconductor die with a base... |
| 2011/0175211 |
Method And Structure To Reduce Soft Error Rate Susceptibility In
Semiconductor Structures A method is disclosed that includes providing a semiconductor substrate having one or more device levels including a number of devices, and forming a number of... |
| 2011/0175210 |
EMI SHIELDING PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME An EMI shielding package structure includes a substrate unit having a first surface with a die mounting area and a second surfaces opposite to the first... |
| 2011/0175209 |
METHOD OF FORMING AN EM PROTECTED SEMICONDUCTOR DIE In one embodiment, a semiconductor die is formed to have sloped sidewalls. A conductor is formed on the sloped sidewalls. |
| 2011/0175208 |
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND
ELECTRONIC APPLIANCE An object of the present invention is to provide a semiconductor device including an insulating layer with a high dielectric strength voltage, a low dielectric... |
| 2011/0175207 |
METHOD FOR PRODUCING METAL OXIDE LAYERS The invention relates to a method for producing metal oxide layers from oxides of rare earth metals on silicon-containing surfaces, to the device used to carry... |
| 2011/0175206 |
SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES Semiconductor devices and assemblies including interconnects and methods for forming such interconnects are disclosed herein. One embodiment of a method of... |
| 2011/0175205 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF To provide a semiconductor device that can be manufactured using a simple process without ensuring a high embedding property; and a manufacturing method of the... |
| 2011/0175204 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME According to one embodiment, a manufacturing method of a semiconductor device is disclosed. This method can include dicing along a predetermined line a... |
| 2011/0175203 |
INTEGRATED CIRCUIT WITH IMPROVED INTRINSIC GETTERING ABILITY An integrated circuit with improved intrinsic gettering ability is described, having a bulk micro-defect (BMD) density of ... |
| 2011/0175202 |
Method For Producing Semiconductor Wafers Composed Of Silicon Having A
Diameter Of At Least 450 mm, and... Silicon semiconductor wafers are produced by: pulling a single crystal with a conical section and an adjoining cylindrical section having a diameter... |
| 2011/0175201 |
GROUP III NITRIDE SEMICONDUCTOR DEVICE A Group III nitride semiconductor device has a semiconductor region, a metal electrode, and a transition layer. The semiconductor region has a surface comprised... |
| 2011/0175200 |
MANUFACTURING METHOD OF CONDUCTIVE GROUP III NITRIDE CRYSTAL,
MANUFACTURING METHOD OF CONDUCTIVE GROUP III... To provide a group III nitride crystal having sufficient conductivity and capable of growing in a short time, for growing the group III nitride crystal on a... |
| 2011/0175199 |
ZENER DIODE WITH REDUCED SUBSTRATE CURRENT A Zener diode is fabricated on a semiconductor substrate having semiconductor material thereon. The Zener diode includes a first well region having a first... |
| 2011/0175198 |
ESD PROTECTION WITH INCREASED CURRENT CAPABILITY A stackable electrostatic discharge (ESD) protection clamp (21) for protecting a circuit core (24) comprises, a bipolar transistor (56, 58) having a base region... |
| 2011/0175197 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE A semiconductor integrated circuit device includes: a plurality of data holding circuits; and a plurality of wells. The plurality of data holding circuits is... |
| 2011/0175196 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE The bottom side of an N type silicon substrate is connected to a power supply terminal, a second P type epitaxial layer is formed on all sides of the N type... |
| 2011/0175195 |
METHOD FOR MAKING HIGH-PERFORMANCE RF INTEGRATED CIRCUITS A new method and structure is provided for the creation of a semiconductor inductor. Under the first embodiment of the invention, a semiconductor substrate is... |
| 2011/0175194 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME The present invention relates to a semiconductor device and a method of manufacturing the same. A high-resistance silicon wafer is manufactured in such a manner... |
| 2011/0175193 |
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD A semiconductor device according to the present invention includes a semiconductor substrate, and an interlayer dielectric film, formed on the semiconductor... |
| 2011/0175192 |
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME A semiconductor device includes a fuse pattern formed as conductive polymer layer having a low melting point. The fuse pattern is easily cut at low temperature... |
| 2011/0175191 |
ISOLATION TRENCHES FOR SEMICONDUCTOR LAYERS A method is for the formation of at least one isolation trench filled with thermal oxide in a semiconductor layer and a semiconductor device include at least... |
| 2011/0175190 |
DEEP WELL STRUCTURES WITH SINGLE DEPTH SHALLOW TRENCH ISOLATION REGIONS A semiconductor device structure includes a first type region and a second type region defined in a substrate, the first type region and second type region... |
| 2011/0175189 |
SOLID-STATE IMAGE SENSOR MANUFACTURING METHOD AND A SOLID-STATE IMAGE
SENSOR In the solid-state image sensor manufacturing method according to the present invention, metal silicide films comprising of at least one of cobalt silicide... |
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