PACKAGE ON PACKAGE STRUCTURE
A package on package structure includes a lower package and an upper package. The lower package includes a first semiconductor chip disposed in a chip region of...
Semiconductor Device Comprising a Capacitor in the Metallization System
Formed by a Hard Mask Patterning Regime
Capacitors may be formed in the metallization system of semiconductor devices without requiring a modification of the hard mask patterning process for forming...
Semiconductor Device Comprising a Capacitor Formed in the Contact Level
A contact level in a semiconductor device may be used for providing a capacitor that may be directly connected to a transistor, thereby providing a very...
Semiconductor device and communication method
A semiconductor module includes a semiconductor device including a mounting board, a semiconductor chip disposed at a first surface of the mounting board, a...
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, a semiconductor device includes a semiconductor substrate, an inter-layer insulating film, a wiring, and a via. The inter-layer...
Semiconductor Device and Method of Forming High-Attenuation Balanced
A semiconductor device has a substrate and band-pass filter formed over the substrate. The band-pass filter includes a first conductive trace wound to exhibit...
Semiconductor Device Comprising Metal-Based eFuses of Enhanced Programming
Efficiency by Enhancing Heat Generation
In sophisticated semiconductor devices, electronic fuses may be provided in the metallization system, wherein a superior two-dimensional configuration of the...
CHIP PACKAGE WITH CHANNEL STIFFENER FRAME
Various semiconductor chip packages and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing a...
High Voltage Semiconductor Devices and Methods of Forming the Same
High voltage semiconductor devices and methods of fabrication thereof are described. In one embodiment, a method of forming a semiconductor device includes...
HIGH EFFICIENCY AMPLIFIER WITH REDUCED PARASITIC CAPACITANCE
A semiconductor amplifier is provided comprising, a substrate and one or more unit amplifying cells (UACs) formed on the substrate, wherein each UAC is...
A method is for the formation of at least one filled isolation trench having a protective cap in a semiconductor layer, and a semiconductor device with at least...
METHOD FOR MANUFACTURING A SEMICONDUCTOR SUBSTRATE
The invention relates to a method for manufacturing a semiconductor substrate, in particular a semiconductor-on-insulator substrate by providing a donor...
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
Methods for manufacturing a semiconductor device with alternating P type and N type semiconductor conductive regions are disclosed. One method includes forming...
SEMICONDUCTOR THERMOCOUPLE AND SENSOR
Conventional "on-chip" or monolithically integrated thermocouples are very mechanically sensitive and are expensive to manufacture. Here, however, thermocouples...
In an infrared sensor (1) having a bolometer element (11) and a reference element (21), the reference element (21) comprises a bolometer film (22), a...
METHOD FOR THIN FILM THERMOELECTRIC MODULE FABRICATION
Methods of fabrication of a thermoelectric module from thin film thermoelectric material are disclosed. In general, a thin film thermoelectric module is...
SENSOR ELEMENT ISOLATION IN A BACKSIDE ILLUMINATED IMAGE SENSOR
The present disclosure provides methods and apparatus for sensor element isolation in a backside illuminated image sensor. In one embodiment, a method of...
An imaging device includes a plurality of lower electrodes, an upper electrode, an organic photoelectric conversion layer and a passivation layer. The plurality...
An electron injected APD with an embedded n electrode structure in which edge breakdown can be suppressed without controlling the doping profile of an n-type...
GEIGER-MODE AVALANCHE PHOTODIODE WITH HIGH SIGNAL-TO-NOISE RATIO, AND
CORRESPONDING MANUFACTURING PROCESS
An embodiment of a geiger-mode avalanche photodiode includes: a body of semiconductor material, having a first surface and a second surface; a cathode region of...
SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING THE SAME, AND
A solid state imaging device including a semiconductor layer comprising a plurality of photodiodes, a first antireflection film located over a first surface of...
WAFER LEVEL IMAGE SENSOR PACKAGING STRUCTURE AND MANUFACTURING METHOD OF
The present invention discloses a wafer level image sensor packaging structure and a manufacturing method of the same. The manufacturing method includes the...
MANUFACTURING METHOD AND STRUCTURE OF A WAFER LEVEL IMAGE SENSOR MODULE
WITH PACKAGE STRUCTURE
The present invention discloses a manufacturing method and structure of a wafer level image sensor module with package structure. The structure of the wafer...
BACKSIDE ILLUMINATION IMAGE SENSORS WITH REFLECTIVE LIGHT GUIDES
Image sensors with backside illumination image pixel arrays are provided. An image pixel array may have image pixels that are formed on a silicon substrate...
We introduce a new technology for Manufactureable, High Power Density, High Volume Utilization Nuclear Batteries. Betavoltaic batteries are an excellent choice...
X-ray pixels including double photoconductors and x-ray detectors
including the x-ray pixels
Example embodiments are directed to X-ray detectors including double photoconductors. According to example embodiments, the X-ray detector includes a first...
Semiconductor device and manufacturing method of the semiconductor device
An MTJ element is formed in a wiring layer located in a lower tier and yet application of heat to the MTJ element is suppressed. A first insulating layer is...
Magnetic Element Having Low Saturation Magnetization
A magnetic device including a magnetic element is described. The magnetic element includes a fixed layer having a fixed layer magnetization, a spacer layer that...
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE ASSEMBLY
A semiconductor device excellent in the magnetic shielding effect of blocking off external magnetic fields is provided. The semiconductor device includes: an...
MAGNETIC RANDOM ACCESS MEMORY
A magnetic random access memory (MRAM) has a perpendicular magnetization direction. The MRAM includes a first magnetic layer, a second magnetic layer, a first...
MAGNETORESISTIVE RANDOM ACCESS MEMORY ELEMENT AND FABRICATION METHOD
A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first...
Integrated Circuit and Fabricating Method thereof
A fabricating method of integrated circuit is provided. During the fabricating process of an interconnecting structure of the integrated circuit, a micro...
A MEMS device includes a substrate, an insulating layer section formed above the substrate and having a cavity, a functional element contained in the cavity,...
According to an embodiment of the present invention, a MEMS element includes: a semiconductor substrate; an island insulating layer formed on the substrate, the...
MICRO-CHANNEL CHIP AND MICRO-ANALYSIS SYSTEM
A micro-channel chip can be coated uniformly with a thin inorganic oxide film and can prevent an ionic hydrophobic substance from adsorbing through a surface of...
Semiconductor device and manufacturing method thereof
A semiconductor device has a gate electrode including polysilicon, and a hydrogen occluding layer covering at least a top face of the gate electrode and having...
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
The semiconductor device includes a thin film transistor; a first interlayer insulating film over the thin film transistor; a first electrode electrically...
SEMICONDUCTOR MEMORY DEVICE WITH BIT LINE OF SMALL RESISTANCE AND
MANUFACTURING METHOD THEREOF
A reduction of a resistance of a bit line of a memory cell array and a reduction of a forming area of the memory cell array are planed. Respective bit lines...
SEMICONDUCTOR DEVICE HAVING A BLOCKING STRUCTURE AND METHOD OF
MANUFACTURING THE SAME
A semiconductor device includes a blocking structure between a metal layer and at least one underlying layer. The blocking structure has a first layer...
TRANSISTOR, SEMICONDUCTOR DEVICE AND TRANSISTOR FABRICATION PROCESS
The present invention provides a transistor, a semiconductor device and a transistor fabrication process that thoroughly ameliorate electric fields in a...
MULTILAYER SIDEWALL SPACER FOR SEAM PROTECTION OF A PATTERNED STRUCTURE
A semiconducting device with a multilayer sidewall spacer and method of forming are described. In one embodiment, the method includes providing a substrate...
Well implant through dummy gate oxide in gate-last process
The present disclosure relates to methods for fabricating a field-effect transistor. The method includes performing a pocket implantation to a semiconductor...
RF CMOS TRANSISTOR DESIGN
An improved RF CMOS transistor design is described. Local, narrow interconnect lines, which are located substantially above the active area of the transistor,...
Power Semiconductor Device with Low Parasitic Metal and Package Resistance
A power semiconductor device includes a semiconductor die with a power transistor on a semiconductor substrate, a plurality of wiring layers vertically spaced...
SEMICONDUCTOR DEVICE COMPRISING HIGH-K METAL GATE ELECTRODE STRUCTURES AND
eFUSES FORMED IN THE SEMICONDUCTOR...
A semiconductor-based electronic fuse may be provided in a sophisticated semiconductor device having a bulk configuration by appropriately embedding the...
Semiconductor Devices and Methods of Manufacture Thereof
Methods of forming transistors and structures thereof are disclosed. A preferred embodiment comprises a semiconductor device including a workpiece, a gate...
There is provided a high-integrated complementary metal-oxide semiconductor static random-access memory including an inverter. The inverter includes: a first...
Semiconductor Devices Including SRAM Cell and Methods for Fabricating the
An SRAM cell of a semiconductor device includes a load transistor, a driver transistor and an access transistor. First source/drains of the load, driver and...
Field Effect Transistor Device and Fabrication
A method for forming a field effect transistor (FET) device includes forming a dielectric layer on a substrate, forming a first metal layer on the dielectric...
SYSTEM AND METHOD FOR PROVIDING ALIGNMENT MARK FOR HIGH-K METAL GATE
The alignment mark and method for making the same are described. In one embodiment, a semiconductor structure includes a substrate having a device region and an...