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Patent # Description
2011/0298133 SEMICONDUCTOR DEVICE
The reliability of a porous Low-k film is improved. The mean diameter of first pores and second pores in an interlayer insulation film of a second fine layer...
2011/0298132 ULTRA-LOW POWER SWNT INTERCONNECTS FOR SUB-THRESHOLD CIRCUITS
Ultra-low power single metallic single-wall-nano-tube (SWNT) interconnects for sub-threshold circuits are provided. According to some embodiments, an...
2011/0298131 Yttrium contacts for germanium semiconductor radiation detectors
A germanium semiconductor radiation detector contact made of yttrium metal. A thin (.about.1000 .ANG.) deposited layer of yttrium metal forms a thin...
2011/0298130 SEMICONDUCTOR DEVICES WITH THROUGH-SILICON VIAS
Through silicon vias (TSVs) include a first metal plug having a cylindrical shape, passing through a semiconductor substrate, and with an outer peripheral...
2011/0298129 STACKED PACKAGE
A stacked package for an electronic device and a method of manufacturing the stacked package include a first semiconductor package being formed with a first...
2011/0298128 MULTI-CHIP PACKAGE WITH PILLAR CONNECTION
A semiconductor device has a substrate having a first plurality of substrate bonding pads disposed on a bonding surface thereof. A plurality of semiconductor...
2011/0298127 Semiconductor Device
A semiconductor device has a semiconductor substrate which has a plurality of pad electrodes provided on a top surface thereof and has an approximately...
2011/0298126 CARRIER-FREE SEMICONDUCTOR PACKAGE AND FABRICATION METHOD
A method for fabricating a carrier-free semiconductor package includes: half-etching a metal carrier to form a plurality of recess grooves and a plurality of...
2011/0298125 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPART CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: providing a pillar ball; mounting an interposer having a first functional side and a...
2011/0298124 Semiconductor Structure
A semiconductor structure is provided. By using a composite bump with replace of a gold bump, the consumption of gold can be reduced and the manufacturing cost...
2011/0298123 CU PILLAR BUMP WITH NON-METAL SIDEWALL SPACER AND METAL TOP CAP
A bump has a non-metal sidewall spacer on a lower sidewall portion of Cu pillar, and a metal top cap on a top surface and an upper sidewall portion of the Cu...
2011/0298122 INTEGRATED CIRCUIT APPARATUS, SYSTEMS, AND METHODS
High density circuit modules are formed by stacking integrated circuit (IC) chips one above another. Unused input/output (I/O) locations on some of the chips...
2011/0298121 POWER SEMICONDUCTOR DEVICE
A power semiconductor device according to the present invention includes a heat sink made of Cu and having a thickness of 2 to 3 mm, an insulating substrate...
2011/0298120 Apparatus for Thermally Enhanced Semiconductor Package
A semiconductor package includes a semiconductor die having contact pads. An encapsulant is disposed around the semiconductor die, and conductive vias are...
2011/0298119 INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit package system includes: forming a non-inverted internal stacking module including: fabricating an internal...
2011/0298118 SEMICONDUCTOR DEVICE
A semiconductor device, including: a substrate having an upper face on which a first ground pad, a first power supply pad, a first signal pad, and a second...
2011/0298117 PAD CONFIGURATIONS FOR AN ELECTRONIC PACKAGE ASSEMBLY
Embodiments of the present disclosure provide an electronic package assembly comprising a solder mask layer, the solder mask layer having at least one opening,...
2011/0298116 SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREOF
An object of the present invention is to improve the quality control of a semiconductor device. By forming an inscription comprising a culled or pixel skipping...
2011/0298115 SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component is configured to permit the...
2011/0298114 STACKED INTERPOSER LEADFRAMES
A stacked leadframe assembly is disclosed. The stacked leadframe assembly includes a first die having a surface that defines a mounting plane, a first leadframe...
2011/0298113 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INCREASED CONNECTIVITY AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of an integrated circuit packaging system includes: forming a lead frame having contact pads and connection leads; coupling a base...
2011/0298112 SEMICONDUCTOR MODULE AND SEMICONDUCTOR DEVICE
A semiconductor module includes a semiconductor chip, a semiconductor frame, a circuit board, and a screw. The semiconductor frame has a main surface having a...
2011/0298111 SEMICONDUCTOR PACKAGE AND MANUFACTRING METHOD THEREOF
There is provided a semiconductor package capable of protecting a passive element, a semiconductor chip, or the like included in the package from external force...
2011/0298110 Semiconductor Device and Method of Forming Thermally Conductive Layer Between Semiconductor Die and Build-Up...
A semiconductor device has a thermally conductive layer with a plurality of openings formed over a temporary carrier. The thermally conductive layer includes...
2011/0298109 SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED EMI SHIELDING FRAME WITH CAVITIES CONTAINING...
A semiconductor device has a plurality of semiconductor die mounted to a temporary carrier. A prefabricated shielding frame has a plate and integrated bodies...
2011/0298108 NON-LEADED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE GROUND SITES
A non-leaded integrated circuit package system includes: a die paddle of a lead frame; a dual row of terminals including an outer terminal and an inner...
2011/0298107 SHIELDED STACKED INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACTURE THEREOF
A method of manufacture of a shielded stacked integrated circuit packaging system includes: forming a first integrated circuit structure having a first...
2011/0298106 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MAGNETIC FILM AND METHOD OF MANUFACTURE THEREOF
An integrated circuit packaging system including: connecting a first integrated circuit device and a package substrate; attaching a support bump to the package...
2011/0298105 Semiconductor Device and Method of Forming Shielding Layer After Encapsulation and Grounded Through...
A method of manufacturing a semiconductor device includes providing a substrate having a conductive bump formed over the substrate and a semiconductor die with...
2011/0298104 Semiconductor Body with a Protective Structure and Method for Manufacturing the Same
A semiconductor body comprises a protective structure. The protective structure (10) comprises a first and a second region (11, 12) which have a first...
2011/0298103 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
A semiconductor package and a method of manufacturing the semiconductor package are disclosed. A semiconductor package in accordance with an embodiment of the...
2011/0298102 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
A semiconductor package and a method of manufacturing the semiconductor package are disclosed. A semiconductor package in accordance with an embodiment of the...
2011/0298101 Semiconductor Device and Method of Forming EMI Shielding Layer with Conductive Material Around Semiconductor Die
A semiconductor device has a plurality of first semiconductor die mounted over an interface layer formed over a temporary carrier. An encapsulant is deposited...
2011/0298100 SEMICONDUCTOR DEVICE PRODUCING METHOD AND SEMICONDUCTOR DEVICE
Disclosed are a semiconductor device producing method and a semiconductor device. The semiconductor device producing method is comprised of a step of forming a...
2011/0298099 SILICON DIOXIDE LAYER DEPOSITED WITH BDEAS
A silicon dioxide layer is deposited onto a substrate using a process gas comprising BDEAS and an oxygen-containing gas such as ozone. The silicon dioxide layer...
2011/0298098 EXPITAXIAL FABRICATION OF FINS FOR FINFET DEVICES
A fin for a finFET is described. The fin is a portion of a layer of material, where, another portion of the layer of material resides on a sidewall.
2011/0298097 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device is provided wherein stacked semiconductor substrates are electrically coupled together in a satisfactory state by a conductor buried in...
2011/0298096 Semiconductor chip
A semiconductor wafer 10 has a plurality of semiconductor chip areas 10a and a scribe area 10b, each of the semiconductor chip areas 10a having semiconductor...
2011/0298095 PASSIVATION LAYER EXTENSION TO CHIP EDGE
Embodiments of the invention provide a semiconductor chip having a passivation layer extending along a surface of a semiconductor substrate to an edge of the...
2011/0298094 EPITAXIAL WAFER AND METHOD OF PRODUCING THE SAME
An epitaxial wafer comprises a silicon substrate, a gettering epitaxial film formed thereon and containing silicon and carbon, and a main silicon epitaxial film...
2011/0298093 Thermal Processing of Substrates with Pre- and Post-Spike Temperature Control
Provided are apparatuses and method for the thermal processing of a substrate surface, e.g., controlled laser thermal annealing (LTA) of substrates. The...
2011/0298092 DIODES WITH A DOG BONE OR CAP-SHAPED JUNCTION PROFILE TO ENHANCE ESD PERFORMANCE, AND OTHER SUBSTRUCTURES,...
An integrated circuit structure includes a semiconductor doped area (NWell) having a first conductivity type, and a layer (PSD) that overlies a portion of said...
2011/0298091 SEMICONDUCTOR DEVICE HAVING CAPACITORS
A capacitor is formed over a semiconductor substrate. The capacitor includes a lower electrode, a capacitor dielectric film and an upper electrode in this order...
2011/0298090 Capacitors, Systems, and Methods
Capacitors, systems, and methods are disclosed. In one embodiment, the capacitor includes a first electrode. The capacitor may also include a first insulator...
2011/0298089 TRENCH CAPACITOR AND METHOD OF FABRICATION
An improved trench capacitor and method of fabrication are disclosed. The trench capacitor utilizes a rare-earth oxide layer to reduce depletion effects,...
2011/0298088 Semiconductor Package with Integrated Inductor
A semiconductor package includes a semiconductor chip. An inductor is applied to the semiconductor chip. The inductor has at least one winding. An encapsulation...
2011/0298087 ELECTRICAL FUSE DEVICE BASED ON A PHASE-CHANGE MEMORY ELEMENT AND CORRESPONDING PROGRAMMING METHOD
A fuse device has a fuse element provided with a first terminal and a second terminal and an electrically breakable region, which is arranged between the first...
2011/0298086 Fuse Structures, E-Fuses Comprising Fuse Structures, and Semiconductor Devices Comprising E-Fuses
A fuse structure, an e-fuse including the fuse structure and a semiconductor device including the e-fuse are disclosed. The fuse structure includes first and...
2011/0298085 SHALLOW TRENCH ISOLATION AREA HAVING BURIED CAPACITOR
A semiconductor chip includes a substrate including a surface, an active transistor region and a substrate contact region formed on the substrate, a shallow...
2011/0298084 METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT
A method for manufacturing a semiconductor element of the present invention, has: a laser irradiation step of focusing a pulsed laser beam inside of a substrate...
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