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| Patent # | Description |
|---|---|
| 2012/0068775 |
Frequency Locking Oscillator A delay line of individually selectable delay elements can operate as an oscillator in an open loop mode to track process variation or drive a clock signal that... |
| 2012/0068774 |
Amplitude Control for Oscillator An amplitude control circuit includes a pair of peak detectors. The pair of peak detectors are responsive to a voltage reference generator. The amplitude... |
| 2012/0068773 |
HIGH FREQUENCY AMPLIFIER A high frequency amplifier includes a package substrate, an amplifying active device disposed on a top surface of the package substrate, a transmission line... |
| 2012/0068772 |
FIELD MODULATING PLATE AND CIRCUIT Consistent with various example embodiments, a field-controlling electrode applies a negative bias, relative to a source/drain electrode, increase voltage... |
| 2012/0068771 |
HETEROGENEOUS INTEGRATION OF HARMONIC LOADS AND TRANSISTOR FEEDBACK FOR
IMPROVED AMPLIFIER PERFORMANCE An RF power amplifier device in which the circuit is provided on two separate dies which are attached together vertically. According to one embodiment of the... |
| 2012/0068770 |
ANTI-GLITCH SYSTEM FOR AUDIO AMPLIFIER An audio amplification circuit comprises an amplifier having an input and an output, as well as an audio output to which a load can be connected. It... |
| 2012/0068769 |
HIGH-FREQUENCY DIFFERENTIAL AMPLIFIER CIRCUIT There is provided a high-frequency differential amplifier circuit comprising: a first MOS transistor, a second MOS transistor, a first positive feedback element... |
| 2012/0068768 |
TRANSMISSION APPARATUS AND DISTORTION COMPENSATION METHOD A transmission apparatus includes an analog digital converter that performs sampling on a demodulated signal obtained by demodulating a part of an output... |
| 2012/0068767 |
Power supply arrangement for multi-stage amplifier There is disclosed a multi-stage amplifier comprising: a first amplifier stage; a second amplifier stage; a first voltage supply stage arranged to provide a... |
| 2012/0068766 |
SAMPLE-AND-HOLD AMPLIFIER A sample-and-hold amplifier (400) having a sample phase of operation and a hold phase of operation. The sample-and-hold amplifier comprising one or more... |
| 2012/0068765 |
Method for Offset Compensation of a Switched-Capacitor Amplifier and
Switched Capacitor Amplifier Arrangement A method for offset compensation of a switched-capacitor amplifier comprises a reset phase (.phi.1) and at least one working phase (.phi.2). An output voltage... |
| 2012/0068764 |
SIGNAL AMPLIFIER, BRIDGE CONNECTION SIGNAL AMPLIFIER SIGNAL OUTPUT DEVICE,
LATCH-UP PREVENTION METHOD, AND... A signal amplifier includes an inverting amplification circuit, a first switching element, a second switching element, and a control section. The inverting... |
| 2012/0068763 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE According to one embodiment, a semiconductor integrated circuit device includes an output circuit which includes an inverter having a first transistor and a... |
| 2012/0068762 |
Method and Apparatus for Regulating a Power Supply of an Integrated
Circuit Disclosed is a circuit for adjusting a voltage supplied to an IC by a power supply circuit that produces a regulated-output voltage based on an output-control... |
| 2012/0068761 |
Method and apparatus for protection of an anti-fuse element in a
high-voltage integrated circuit A soft clamp semiconductor device for preventing inadvertent programming of an unselected anti-fuse (AF) element comprises a MOSFET which includes a first well... |
| 2012/0068760 |
APPARATUS AND METHOD FOR DETERMINING A TOUCH INPUT A capacitive sensor for detecting a stimulus. The capacitive sensor includes an electrode and a processing unit electrically coupled to the electrode and... |
| 2012/0068759 |
CONTACT SENSORS AND METHODS FOR MAKING SAME Disclosed herein are novel contact sensors. The contact sensors disclosed herein include a conductive composite material formed of a polymer and a conductive... |
| 2012/0068758 |
REFERENCE CURRENT SOURCES Systems, methods, and devices are disclosed, including an electronic device that includes a first data location, a quantizing circuit, and a reference current... |
| 2012/0068757 |
SEMICONDUCTOR SWITCH According to one embodiment, a semiconductor switch includes a power supply circuit, a control circuit and a switch circuit. The power supply circuit includes... |
| 2012/0068756 |
Two-Terminal M2LC Subsystem and M2LC System Including Same A two-level two-terminal modular multilevel converter subsystem. The subsystem includes a first capacitor and a second capacitor. The modular multilevel... |
| 2012/0068755 |
LEVEL SHIFTER According to one embodiment, a level shifter includes a high-side switch and a low-side switch. The high-side switch is connected between a high-potential power... |
| 2012/0068754 |
METHOD AND APPARATUS FOR TIMING CLOSURE Aspects of the disclosure provide a circuit, such as an integrated circuit. The circuit includes a first circuit and a second circuit. The second circuit... |
| 2012/0068753 |
ANALOG DELAY LINES AND ADAPTIVE BIASING Examples of analog delay lines and analog delay systems, such as DLLs incorporating analog delay lines are described, as are circuits and methods for adaptive... |
| 2012/0068752 |
Systems and Methods for Low Latency Noise Cancellation Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes... |
| 2012/0068751 |
High-speed latch circuit A high-speed latch circuit includes a latching unit for latching an inputted signal, a signal input unit connected to the latching unit and a clock control unit... |
| 2012/0068750 |
SWITCHING CIRCUITS, LATCHES AND METHODS Switching circuits, latches and methods are provided, such as those that may respond to an input signal that transitions from a first binary level to a second... |
| 2012/0068749 |
MASTER-SLAVE FLIP-FLOP WITH TIMING ERROR CORRECTION A digital logic circuit includes a logic element for providing a data signal, a clock for providing a clock signal and a master-slave flip-flop. The... |
| 2012/0068748 |
Phase Detection Method and Phase Detector This invention relates to a phase detection method. An input signal (51, 91, 111) is sampled (13, 14, 15, 16) for obtaining several samples (1, 2, 3) at... |
| 2012/0068747 |
METHOD AND APPARATUS FOR IMPROVING ACCURACY OF SIGNALS DELAY A delay module, includes a first delay unit, a second delay unit and an inverter. Each of the first and second delay units includes: a logic gate for gating and... |
| 2012/0068746 |
PHASE-LOCKED LOOP CIRCUIT AND DELAY-LOCKED LOOP CIRCUIT A phase-locked loop circuit includes a phase comparator that compares phases between a reference signal and a feedback signal and outputs a phase difference... |
| 2012/0068745 |
INJECTION-LOCKED FREQUENCY DIVIDER A representative injection-locked frequency divider includes a differential direct injection pair that is configured to receive and mix differential injection... |
| 2012/0068744 |
Phase Locked Loop Circuits A phase locked loop circuit is provided. The PLL circuit receives an input clock signal and generates an output clock signal according to internal clock signals... |
| 2012/0068743 |
Feedback-Based Linearization of Voltage Controlled Oscillator Embodiments of the present invention enable a feedback-based VCO linearization technique. Embodiments include a frequency locked loop formed by feeding back a... |
| 2012/0068742 |
METHOD AND APPARATUS FOR EFFICIENT TIME SLICING Apparatus for efficient time slicing including a phase lock loop circuit having a voltage controlled oscillator, an auto-frequency calibration circuit coupled... |
| 2012/0068741 |
PHASE LOCKED LOOP AND METHOD FOR OPERATING THE SAME A phase locked loop includes a phase lock unit configured to compare a phase of a reference clock with a phase of a feedback clock and to generate an internal... |
| 2012/0068740 |
VOLTAGE OUTPUT CIRCUT According to one embodiment, a voltage output circuit is disclosed. The circuit has: a transistor connected between a first terminal and a second terminal, the... |
| 2012/0068739 |
HIGHLY EFFICIENT CLASS-D AMPLIFIER A simplistic low cost circuit that generates the necessary drive voltage for use in a source follower totem pole power switching circuit is described where the... |
| 2012/0068738 |
DEVICE AND METHOD FOR GENERATING THREE MODE SIGNAL The device for generating three mode signals includes: a voltage setting block including an input terminal receiving three input signals of driving voltage,... |
| 2012/0068737 |
SYNCHRONOUSLY SAMPLED SINGLE BIT SWITCH MODE POWER SUPPLY A power supply is described. The power supply includes a synchronous sampled comparator. The synchronous sampled comparator includes a first input that receives... |
| 2012/0068736 |
DESIGN APPARATUS, DESIGN METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT A design apparatus according to the present embodiment includes a scheduling section, a group ID assigning section, a transition violation detecting section and... |
| 2012/0068735 |
INCORPORATING AN INDEPENDENT LOGIC BLOCK IN A SYSTEM-ON-A-CHIP In one embodiment, the present invention includes a logic having a first link interface to enable communication with an intellectual property (IP) logic adapted... |
| 2012/0068734 |
Integrated Circuit Leakage Power Reduction using Enhanced Gated-Q Scan
Techniques Specific logic gates for q-gating are selected by determining the minimum leakage state for a circuit design and then selecting logic gates that hold the... |
| 2012/0068733 |
UNIVERSAL FUNCTIONALITY MODULE Methods and apparatus are provided for a Universal functionality Module (UFM). The apparatus comprises a programmable logic device (PLD) configured to be... |
| 2012/0068732 |
NONVOLATILE LOGIC CIRCUIT AND A METHOD FOR OPERATING THE SAME A nonvolatile logic circuit includes logic configuration electrodes and input electrodes. The nonvolatile logic circuit is programmable to any one of the logics... |
| 2012/0068731 |
CIRCUIT FOR RESTRAINING SHOOT THROUGH CURRENT A circuit for restraining a shoot through current comprises a master selecting unit and a logic unit. The master selecting unit receives an input signal, and... |
| 2012/0068730 |
System and Method for Evaluating the Electromagnetic Compatibility of
Integrated Circuits in an In-Situ Environment A device is configured to evaluate electromagnetic characteristics of an integrated circuit. The device includes a fluid chamber, a first impeller, a second... |
| 2012/0068729 |
METHOD FOR DETERMINING THE PARAMETERS OF A PHOTOVOLTAIC DEVICE A method for determining the parameters of a photovoltaic device having at least one multi-junction solar cell is provided. The solar cell includes at least two... |
| 2012/0068728 |
Probe Card A probe card to be used with a tester that tests an electrical characteristic of an electronic circuit formed in in a wafer is disclosed. The probe card... |
| 2012/0068727 |
COMPLIANT WAFER LEVEL PROBE ASSEMBLY A probe assembly that acts as a temporary interconnect between terminals on a circuit member and a test station. The probe assembly can include a base layer of... |
| 2012/0068726 |
ELECTRICAL TEST PROBE AND PROBE ASSEMBLY An embodiment disperses a force acting on a border portion between an extending portion and a pedestal portion or a reinforcing member to prevent breakage of a... |
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