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DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
A display apparatus includes a base substrate, a pixel on the base substrate, and a color filter part between the base substrate and the pixel. The pixel...
SYSTEM AND METHOD OF MANUFACTURING A THIN FILM TRANSISTOR SUBSTRATE
In a method of manufacturing a thin film transistor substrate, a first metal layer is formed on a first surface of a base substrate. The base substrate is...
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided are a display device and a method of manufacturing of the display device. The display device includes a substrate subjected to a primary preprocess; a...
Hybrid Pixel Control Circuits for Light-Emitting Diode Display
An electronic device may include a display. The display may be formed by an array of light-emitting diodes mounted to the surface of a substrate. The...
Metal Wiring and Method of Manufacturing the Same, and Metal Wiring
Substrate and Method of Manufacturing the Same
A metal wiring suitable for a substrate of large size is provided. The present invention is characterized in that at least one layer of conductive film is...
A display panel includes a substrate, a plurality of first signal lines, a plurality of second signal lines, a plurality of pixel units, a plurality of...
Wiring Layer and Manufacturing Method Therefor
To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a...
SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
To provide a novel semiconductor device or a semiconductor device capable of operating at high speed. The semiconductor device includes a plurality of circuits...
THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
A thin film transistor includes an active pattern formed on a substrate; a gate pattern formed on the active pattern and comprising a gate electrode and a gate...
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, a semiconductor memory device includes a substrate; a memory cell array including a plurality of memory cells and stacked on the...
THREE DIMENSIONAL STACKED SEMICONDUCTOR STRUCTURE AND METHOD FOR
MANUFACTURING THE SAME
A 3D stacked semiconductor structure is provided, comprising a plurality of multi-layered pillars formed on a substrate and spaced apart from each other, a...
Memory Hole Structure in Three Dimensional Memory
In a three dimensional nonvolatile memory, memory holes extend vertically through two or more physical levels in which memory cells are formed. Memory hole...
METHOD OF INTEGRATING A CHARGE-TRAPPING GATE STACK INTO A CMOS FLOW
A method of fabricating a memory device is described. Generally, the method includes: forming on a surface of a substrate a dielectric stack including a...
MEMORY HAVING A CONTINUOUS CHANNEL
The present disclosure includes memory having a continuous channel, and methods of processing the same. A number of embodiments include forming a vertical...
An insulating film, which is sandwiched between a gate electrode formed on an SOI layer constituting an SOI substrate and an epitaxial layer formed on the SOI...
THREE DIMENSIONAL NAND DEVICE WITH SILICON GERMANIUM HETEROSTRUCTURE
A method of making a monolithic three dimensional NAND string including forming a stack of alternating layers of a first material and a second material...
INTEGRATED FIN AND STRAP STRUCTURE FOR AN ACCESS TRANSISTOR OF A TRENCH
At least one dielectric pad layer is formed on a semiconductor-on-insulator (SOI) substrate. A deep trench is formed in the SOI substrate, and a combination of...
SEMICONDUCTOR MEMORY DEVICE WITH IMPROVED ACTIVE AREA/WORD LINE LAYOUT
One semiconductor device includes a bit line extending in a straight line in an X direction, a first and a second horizontal active region extending in the X...
SEMICONDUCTOR DEVICES WITH CAPACITORS
A semiconductor device includes bottom electrodes two-dimensionally arranged on a substrate and transistors connected to the bottom electrodes, respectively....
STRUCTURE AND METHOD TO INCREASE CONTACT AREA IN UNMERGED EPI INTEGRATION
FOR CMOS FINFETS
Source/drain contact structures with increased contact areas for a multiple fin-based complementary metal oxide semiconductor field effect transistor (CMOSFET)...
SEMICONDUCTOR DEVICES WITH SIDEWALL SPACERS OF EQUAL THICKNESS
Semiconductor structures with different devices each having spacers of equal thickness and methods of manufacture are disclosed. The method includes forming a...
Methods of Forming Semiconductor Devices and Structures Thereof
Methods of forming semiconductor devices and structures thereof are disclosed. In some embodiments, a semiconductor device includes a substrate that includes...
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device, and a method of manufacturing the same, includes first and second gate structures extending in a first direction and spaced apart from...
SEMICONDUCTOR DEVICE EMPLOYING TRENCHES FOR ACTIVE GATE AND ISOLATION
A semiconductor device includes a semiconductor layer of a first conductivity type formed on a substrate; a first trench formed in the semiconductor layer...
N-TYPE METAL OXIDE SEMICONDUCTOR (NMOS) TRANSISTOR FOR ELECTROSTATIC
One or more techniques or systems for forming an n-type metal oxide semiconductor (NMOS) transistor for electrostatic discharge (ESD) are provided herein. In...
INTEGRATED ELECTROSTATIC DISCHARGE (ESD) CLAMPING
A method of fabricating a laterally diffused metal-oxide-semiconductor (LDMOS) transistor device having a bipolar transistor for electrostatic discharge (ESD)...
METHODS, APPARATUS AND SYSTEM FOR REDUCTION OF POWER CONSUMPTION IN A
At least one method, apparatus and system disclosed herein involves performing power reduction process on a FinFET device. A first design is provided. The...
EMBEDDED PACKAGE AND METHOD THEREOF
The present invention discloses anew embedded package comprising: a pre-mold lead frame with a plurality of chips attached thereon, where the molding material...
MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEADS FOR
STACKED DIE PACKAGES, AND ASSOCIATED...
Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked...
LIGHT EMITTING LAMP
Disclosed is a light emitting lamp including a light source module including at least one light source and a light guide layer disposed on a substrate burying...
METHOD OF MANUFACTURING A SINGLE LIGHT-EMITTING STRUCTURE
The instant disclosure provides a light-emitting module and a method of manufacturing a single light-emitting structure. The light-emitting module includes two...
USING INTERRUPTED THROUGH-SILICON-VIAS IN INTEGRATED CIRCUITS ADAPTED FOR
In an integrated circuit (IC) adapted for use in a stack of interconnected ICs, interrupted through-silicon-vias (TSVs) are provided in addition to...
HETEROGENEOUS ANNEALING METHOD AND DEVICE
A method of integrating a first substrate having a first surface with a first insulating material and a first contact structure with a second substrate having...
FINGERPRINT RECOGNITION SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
A fingerprint recognition semiconductor device includes an insulation layer, a wiring pattern formed on a lower surface of the insulation layer, and a sensor...
SEMICONDUCTOR PACKAGE ASSEMBLY
The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package and a second semiconductor...
MULTI-CHIP PACKAGE, TEST SYSTEM AND METHOD OF OPERATING THE SAME
A multi-chip package includes: a plurality of semiconductor chips that are coupled with each other through normal through silicon vias and repair through...
SEMICONDUCTOR DEVICES HAVING THROUGH ELECTRODES, SEMICONDUCTOR PACKAGES
INCLUDING THE SAME, METHODS OF...
A semiconductor device includes a substrate having a first surface and a second surface that are opposite to each other, a plurality of through electrodes...
METHOD AND APPARATUS FOR DIE-TO-DIE PAD CONTACT
A semiconductor device includes at least a first semiconductor die and a second semiconductor die. The first semiconductor dies comprises a first and second...
FLEXIBLE INTERCONNECTS FOR MODULES OF INTEGRATED CIRCUITS AND METHODS OF
MAKING AND USING THE SAME
Flexible interconnects, flexible integrated circuit systems and devices, and methods of making and using flexible integrated circuitry are presented herein. A...
CIRCUIT SUBSTRATE INTERCONNECT
A packaged integrated circuit (IC) includes a substrate including a first substrate pad disposed on a first side of the substrate, an IC die disposed on the...
Die Bonder and Bonding Method
A die bonder and a bonding method are provided that are capable of surely mounting a die on an intermediate stage and surely picking up the die from the...
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device according to the present invention includes an insulating substrate having a circuit pattern, semiconductor elements bonded on the...
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method of manufacturing a semiconductor structure includes receiving a substrate including a die pad disposed thereon; disposing a passivation over the...
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDER BUMP METALLIZATION AND
METHOD OF MANUFACTURE THEREOF
An integrated circuit packaging system and method of manufacture thereof including: providing a substrate; forming contact pads on top of the substrate;...
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure includes a semiconductive substrate, a post passivation interconnect (PPI) and a polymer layer. The PPI is disposed above the...
HIGH ISOLATION WIDEBAND SWITCH
A high isolation wideband switch is disclosed. In one aspect, the switch includes an integrated circuit package having an integrated circuit die with a first...
Semiconductor Device Having Features to Prevent Reverse Engineering
It is desirable to design and manufacture electronic chips that are resistant to modern reverse engineering techniques. Disclosed is a method and device that...
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
Provided is a method of manufacturing a semiconductor package. The method includes mounting a semiconductor device on a substrate; disposing a mold on the...
LINE LAYOUT AND METHOD OF SPACER SELF-ALIGNED QUADRUPLE PATTERNING FOR THE
A line layout and a spacer self-aligned quadruple patterning method thereof are provided. The line layout includes a first line, a second line, a third line,...
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME
A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure...