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Patent # Description
2016/0098365 EMULATED ENDPOINT CONFIGURATION
Techniques for emulating a configuration space by a peripheral device may include receiving a configuration access request, determining that the configuration...
2016/0098364 RECONFIGURABLE HARDWARE STRUCTURES FOR FUNCTIONAL PIPELINING OF ON-CHIP SPECIAL PURPOSE FUNCTIONS
A method and apparatus for reconfiguring hardware structures to pipeline the execution of multiple special purpose hardware implemented functions, without...
2016/0098363 INITIALIZING I/O DEVICES
A data processing system is provided which includes a processor nest communicatively coupled to an input/output bus by a bus controller, and a service...
2016/0098362 Methods and Systems for Filtering Communication Between Peripheral Devices and Mobile Computing Devices
The embodiments are directed to methods and systems for sending and receiving signals between one or more peripheral devices connected to a dongle system and...
2016/0098361 Optimization of Data Locks for Improved Write Lock Performance and CPU Cache usage in Mulit Core Architectures
Data access optimization features the innovative use of a writer-present flag when acquiring read-locks and write-locks. Setting a writer-present flag...
2016/0098360 Information Handling System Secret Protection Across Multiple Memory Devices
Information handling system secret protection is enhanced by encrypting secrets into a common file and breaking up the encrypted file into plural portions...
2016/0098359 System and Method for Secured Host-slave Communication
Slave device circuitry, including processing circuitry which is configured to determine a new session identification value; determine a seed value using a...
2016/0098358 PCI DEVICE, INTERFACE SYSTEM INCLUDING THE SAME, AND COMPUTING SYSTEM INCLUDING THE SAME
A peripheral component interconnect (PCI) device includes a first memory which includes a plurality of page buffers, a base address register which includes a...
2016/0098357 METHOD AND APPARATUS FOR DETERMINING PHYSICAL ADDRESS
A method and an apparatus for determining a physical address are disclosed. According to the present disclosure, a page size is obtained according to the...
2016/0098356 HARDWARE-ASSISTED MEMORY COMPRESSION MANAGEMENT USING PAGE FILTER AND SYSTEM MMU
Provided are methods and systems for managing memory using a hardware-based page filter designed to distinguish between active and inactive pages ("hot" and...
2016/0098355 OPTIMISTIC DATA READ
A storage module may include a controller that is configured to perform a read operation to read data stored in at least one memory, where the data is...
2016/0098354 SYSTEM INCLUDING HIERARCHICAL MEMORY MODULES HAVING DIFFERENT TYPES OF INTEGRATED CIRCUIT MEMORY DEVICES
Volatile memory devices corresponding to a first memory hierarchy may be on a first memory module that is coupled to a memory controller by a first signal...
2016/0098353 METHODS AND SYSTEMS FOR MEMORY DE-DUPLICATION
Provided are methods and systems for de-duplicating cache lines in physical memory by detecting cache line data patterns and building a link-list between...
2016/0098352 MEDIA CACHE CLEANING
Implementations disclosed herein provide a method comprising detecting a power supply status, determining a media cache cleaning scheme based on the detected...
2016/0098351 DEVICE AND METHOD FOR INTEGRATED DATA MANAGEMENT FOR NONVOLATILE BUFFER CACHE AND NONVOLATILE STORAGE
An integrated nonvolatile memory control subsystem and method are disclosed. The integrated nonvolatile memory control subsystem includes a nonvolatile buffer...
2016/0098350 SIZING A CACHE WHILE TAKING INTO ACCOUNT A TOTAL BYTES WRITTEN REQUIREMENT
A total bytes written (TBW) requirement associated with solid state storage is obtained. A size of a cache associated with the solid state storage is...
2016/0098349 APPARATUS AND METHOD FOR CONSOLIDATING MEMORY ACCESS PREDICTION INFORMATION TO PREFETCH CACHE MEMORY DATA
An apparatus is connected to a main memory, includes a cache memory holding data and a memory storing prediction information in plural areas thereof. The...
2016/0098348 DYNAMIC MEMORY ESTIMATIONS FOR MEMORY BOUNDED APPLICATIONS
Techniques are disclosed for improving application responsiveness, and particularly applications used to present rich media content, by precaching nearby but...
2016/0098347 TEMPORAL CLONES TO IDENTIFY VALID ITEMS FROM A SET OF ITEMS
Techniques are provided for using bitmaps to indicate which items, in a set of items, are invalid. The bitmaps include an "active" bitmap and one or more...
2016/0098346 ASSISTED GARBAGE COLLECTION IN A VIRTUAL MACHINE
A method relates to receiving, by a processing device executing a virtual machine, bytecode comprising an object to be loaded into a memory space, the object...
2016/0098345 MEMORY MANAGEMENT APPARATUS AND METHOD
A memory management apparatus and method are provided herein. The memory management apparatus includes a memory management list generation unit, a memory...
2016/0098344 HARDWARE AUTOMATION FOR MEMORY MANAGEMENT
A storage module may include a controller that has hardware path that includes a plurality of hardware modules configured to perform a plurality of processes...
2016/0098343 SYSTEM AND METHOD FOR SMART FRAMEWORK FOR NETWORK BACKUP SOFTWARE DEBUGGING
A system for network software debugging comprises a processor, an input interface, and an output interface. The processor is configured to determine a set of...
2016/0098342 SYSTEMS AND PROCESSES FOR COMPUTER LOG ANALYSIS
Existing program code, which is executable on one or more computers forming part of a distributed computer system, is analyzed. The analysis identifies log...
2016/0098341 WEB APPLICATION PERFORMANCE TESTING
A system for performance testing a web application initializes to be instrumented a subset of methods of the web application to be tested in response to a...
2016/0098340 METHOD AND SYSTEM FOR COMPARING DIFFERENT VERSIONS OF A CLOUD BASED APPLICATION IN A PRODUCTION ENVIRONMENT...
An application is implemented in the production environment in which the application will be used. Two or more backend systems are used to implement different...
2016/0098339 SMART POWER SCHEDULING FOR USER-DIRECTED BATTERY DURATION
The systems and method described herein provide smart power scheduling for an electronic device. A user can specify a desired battery duration for the...
2016/0098338 METHODS FOR MANAGING PERFORMANCE STATES IN AN INFORMATION HANDLING SYSTEM
An information handling system (IHS) is disclosed wherein the system includes a processor associated with at least one performance state (P-state), and a...
2016/0098337 SAMPLING OF DEVICE STATES FOR MOBILE SOFTWARE APPLICATIONS
A method for monitoring software application performance and one or more device states affecting a software application on a periodic basis on a mobile device....
2016/0098336 METHODS AND SYSTEMS FOR DYNAMIC RETIMER PROGRAMMING
Systems and methods for dynamically programming retimers for computer communications are disclosed. For example, in one aspect, a machine implemented method is...
2016/0098335 METHOD FOR AUTOMATIC DECOMMISSIONING OF NETWORK PARTICIPANTS
Disclosed is a memory device in which the state of the memory may be set by a mechanical action, with or without mains power present. The memory state may be...
2016/0098334 BENCHMARKING MOBILE DEVICES
According to aspects of the invention there are provided methods and apparatus for monitoring, analysing and/or optimising the performance of a mobile device....
2016/0098333 DETECTION OF FAULT INJECTION ATTACKS
An apparatus for detecting fault injection includes functional circuitry and fault detection circuitry. The functional circuitry is configured to receive one...
2016/0098332 DYNAMIC MULTI-PURPOSE EXTERNAL ACCESS POINTS CONNECTED TO CORE INTERFACES WITHIN A SYSTEM ON CHIP (SOC)
An integrated circuit device comprises multiple cores each comprising one or more separate input and output interfaces, the multiple cores integrated within...
2016/0098331 METHODS FOR FACILITATING HIGH AVAILABILITY IN VIRTUALIZED CLOUD ENVIRONMENTS AND DEVICES THEREOF
A method, non-transitory computer readable medium and host computing device that stores, by a first virtual storage controller, a plurality of received...
2016/0098330 TECHNIQUES FOR ERROR HANDLING IN PARALLEL SPLITTING OF STORAGE COMMANDS
Various embodiments are generally directed to techniques for handling errors affecting the at least partially parallel performance of data access commands...
2016/0098329 INFORMATION PROCESSING TECHNIQUE FOR UNINTERRUPTIBLE POWER SUPPLY
This information processing apparatus includes a display processing unit to perform, on a display device, display for requesting a user to collectively input,...
2016/0098328 Method and Device for Distributing Holdup Energy to Memory Arrays
The various embodiments described herein include methods and/or devices used to protect data in a storage device. In one aspect, a method includes performing a...
2016/0098327 BYPASSING FAILED HUB DEVICES IN HUB-AND-SPOKE TELECOMMUNICATION NETWORKS
In an embodiment, a method comprises using a first hub device: establishing one or more secure connections with one or more spoke devices logically arranged as...
2016/0098326 METHOD AND APPARATUS FOR ENABLING TEMPORAL ALIGNMENT OF DEBUG INFORMATION
A signal processing device includes at least one timestamp generation component arranged to generate at least one local timestamp value, and to provide the at...
2016/0098325 UNIFYING APPLICATION LOG MESSAGES USING RUNTIME INSTRUMENTATION
Unifying application log messages using runtime instrumentation includes capturing raw data associated as a log message from an application using an...
2016/0098324 DYNAMIC PROTECTION OF STORAGE RESOURCES FOR DISASTER RECOVERY
A recovery manager discovers replication properties of datastores stored in a storage array, and assigns custom tags to the datastores indicating the...
2016/0098323 INTELLIGENT PROTECTION OF OFF-LINE MAIL DATA
A system according to certain aspects improves the process of creating secondary copies of data (e.g., creating backup copies). The system can compute the...
2016/0098322 Background Initialization for Protection Information Enabled Storage Volumes
Technology is disclosed for performing background initialization on protection information enabled storage volumes or drives. In some embodiments, a storage...
2016/0098321 Efficient Memory Architecture for Low Density Parity Check Decoding
A low density parity check (LDPC) decoder integrated on a single semiconductor substrate may comprise one or more arrays of first-type memory cells and one or...
2016/0098320 EFFICIENTLY STORING DATA IN A DISPERSED STORAGE NETWORK
A method includes determining that one or more data blocks of a permanently stored data blocks are to be deleted. In response, the method further includes...
2016/0098319 SYSTEM AND METHOD FOR PRE-ENCODING OF DATA FOR DIRECT WRITE TO MULTI-LEVEL CELL MEMORY
A method and system for reducing data transfers between memory controller and multi-level cell (MLC) non-volatile memory during programming passes of a word...
2016/0098318 DYNAMIC PER-DECODER CONTROL OF LOG LIKELIHOOD RATIO AND DECODING PARAMETERS
An apparatus includes one or more error-correction decoders, a buffer, and at least one processor. The buffer may be configured to store data to be decoded by...
2016/0098317 WRITE MAPPING TO MITIGATE HARD ERRORS VIA SOFT-DECISION DECODING
An apparatus having mapping and interface circuits. The mapping circuit (i) generates a coded item by mapping write unit bits using a modulation or recursion...
2016/0098316 ERROR PROCESSING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROLLING CIRCUIT UNIT
An error processing method for a rewritable non-volatile memory module, a memory storage device and a memory controlling circuit unit are provided. The...
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