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Patent # Description
2016/0105218 METHOD AND APPARATUS FOR TRANSMITTING OR RECEIVING SIGNALS IN A TRANSPORTATION SYSTEM
Aspects of the subject disclosure may include, for example, a system for transmitting first electromagnetic waves that propagate on a surface of a component of...
2016/0105217 METHOD FOR TRANSMITTING A SIGNAL VIA A POWER LINE NETWORK, TRANSMITTER, RECEIVER, POWER LINE COMMUNICATION...
A method for transmitting signals over a power line network, wherein within the power line network at least one transmitter and at least one receiver...
2016/0105216 LINE INITIALIZATION METHOD, DEVICE, AND SYSTEM
Embodiments of the present invention provide a line initialization method, a device, and a system. The method includes: when a new line is added, releasing at...
2016/0105215 Crosstalk Cancellation Over Multiple Mediums
A method of cancelling crosstalk including receiving, by a vector processor, a first signal from a first medium and a second signal from a second medium,...
2016/0105214 CROSSTALK REDUCTION METHOD AND REPEATER
A crosstalk reduction method includes providing a signal transmission unit including first to eighth main transmission paths, the first and second paths, the...
2016/0105213 METHODS FOR CANCELLATION OF RADIO INTERFERENCE IN WIRELESS COMMUNICATION SYSTEMS
A full duplex radio includes self-interference cancellation circuitry for reducing self-interference. The self-interference cancellation circuitry may receive...
2016/0105212 HIGH RADIATION EFFICIENCY ANTENNA SYSTEMS
A system that incorporates teachings of the subject disclosure may include, for example, a communication device including a matching network for impedance...
2016/0105211 METHOD AND APPARATUS FOR RECONSTRUCTING DESIRED SIGNAL IN CASE OF USING FULL DUPLEX RADIO (FDR) SCHEME
The apparatus for reconstructing a desired signal using a full duplex radio (FDR) scheme includes: a digital self-interference cancellation unit configured to...
2016/0105210 WIDE BAND ANTENNA SYSTEMS
A system that incorporates teachings of the subject disclosure may include, for example, a communication device including a matching network for impedance...
2016/0105209 APPARATUS AND METHOD FOR SECURING OR PROTECTING ELECTRONIC DEVICES
An apparatus for providing impact protection to a cell phone comprises a flexible elongated member configured to loop around an upper end of the phone, and a...
2016/0105208 MOBILE PHONE COVER WITH MECHANICAL KEYBOARD
A mobile phone cover with mechanical keyboard is provided. The mobile phone cover includes a top cover, a bottom cover and a connecting assembly connecting the...
2016/0105207 MOBILE DEVICE CASE WITH GPS TRACKING
A mobile device case for a mobile device having a first battery to operate, said mobile device case comprising of a housing to receive said mobile device; a...
2016/0105206 Electronic Device and Method for Manufacturing Housing Thereof
An electronic device and a method for manufacturing the housing thereof are disclosed. The electronic device includes a housing made of a metal material, the...
2016/0105205 Hinged Sleeve for a Mobile Device
A sleeve for a mobile computing device. The sleeve includes a top surface, a bottom surface, and a friction hinge disposed between the top surface and the...
2016/0105204 PROTECTION COVER
A protection cover is provided, which includes a first cover that is foldable, a first electronic device being attachable to or detachable from the first...
2016/0105203 Interference Reduction for Multiple Signals
The present invention reduces the degradation in performance of one or more radio signals that are co-transmitted with a first radio signal from the same...
2016/0105202 CODING AND DECODING METHODS AND APPARATUS
According to an embodiment a decoder for decoding a received set of blocks each comprising a plurality of data symbols and a plurality of parity symbols,...
2016/0105201 METHOD AND INTERLEAVING APPARATUS FOR INTERLEAVING FOR ERROR DISPERSION AND COMPUTER READABLE RECORDING MEDIUM...
An interleaving apparatus, a computer-readable recording medium, and a method for interleaving data elements comprised in data frame which are transmitted via...
2016/0105200 APPARATUS AND METHOD FOR PROCESSING TRACE DATA STREAMS
An apparatus comprising: a lower-layer decoder configured to decode a data stream formatted according to a lower-layer protocol that interleaves portions of a...
2016/0105199 FAST MAPPING METHOD FOR LAYERED MIN-SUM DECODING OF LDPC CODES,
A method is disclosed for performing LDPC decoding, specifically layered min-sum decoding using a Tanner graph including check nodes (CN) and variable nodes...
2016/0105198 CODING METHOD, DECODING METHOD, CODER, AND DECODER
A coding method, a decoding method, a coder, and a decoder are disclosed herein. A coding method includes: obtaining the pulse distribution, on a track, of the...
2016/0105196 DIRECT SIGMA-DELTA RECEIVER
A sigma delta receiver achieves increased stability and noise reduction. The sigma delta receiver includes a first integrator stage, an isolation stage, a...
2016/0105195 Parallel Sample-and-Hold Circuit for a Pipelined ADC
A parallel sample-and-hold circuit includes a sampling switch and a hold capacitor for each of the ADC and MDAC of a converter stage for a pipelined ADC. Each...
2016/0105194 PASSIVE ANALOG SAMPLE AND HOLD IN ANALOG-TO-DIGITAL CONVERTERS
In an example embodiment, an analog to digital converter (ADC) facilitating passive analog sample and hold is provided and includes a pair of binary weighted...
2016/0105193 ANALOG-TO-DIGITAL CONVERTER PROBE FOR MEDICAL DIAGNOSIS AND MEDICAL DIAGNOSIS SYSTEM
Provided is an analog-to-digital converter capable of suppressing an increase in an occupation area. The analog-to-digital converter includes a multiplying...
2016/0105192 DIGITAL TO ANALOG CONVERTER
A digital to analog converter includes a reference voltage generation unit that generates a reference voltage, and a plurality of unit conversion units. A...
2016/0105191 FREQUENCY SYNTHESIZER
The output of a reference frequency generator is connected to the input of a high-order frequency multiplier, the output of which is connected to the input of...
2016/0105190 FREQUENCY SYNTHESIS DEVICE AND METHOD
A frequency synthesis device, including: a first generator configured to generate a periodical signal with a frequency f.sub.1; a second generator, coupled to...
2016/0105189 DELAY CIRCUIT, DELAY LOCKED LOOP CIRCUIT INCLUDING DELAY CIRCUIT AND PROCESSOR INCLUDING DELAY LOCKED LOOP CIRCUIT
A delay circuit comprises a plurality of delay buffers each including two or more serially connected delay units, each of the delay units being capable of...
2016/0105188 SEMICONDUCTOR DEVICE
A semiconductor device including a PLL providing candidate clocks of different phases in response to a first clock received from a reader via an antenna, a...
2016/0105187 FLL OSCILLATOR/CLOCK WITH AN FLL CONTROL LOOP INCLUDING A SWITCHED CAPACITOR RESISTIVE DIVIDER
An FLL (frequency locked loop) oscillator/clock generator includes a free-running oscillator (such as a ring oscillator), and generates an FLL_clk with an...
2016/0105186 SYSTEM LEVEL INTERCONNECT WITH PROGRAMMABLE SWITCHING
Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller....
2016/0105185 Clock Distribution Architecture for Logic Tiles of an Integrated Circuit and Method of Operation Thereof
An integrated circuit includes a plurality of logic tiles, wherein each logic tile is configurable to connect with at least one adjacent logic tile; a first...
2016/0105184 INVERTER, DRIVING CIRCUIT AND DISPLAY PANEL
An inverter includes first, second, third, fourth, and fifth transistors, and first and second capacitors. The transistors and capacitors are connected in such...
2016/0105183 RECEIVER CIRCUIT AND SIGNAL RECEIVING METHOD THEREOF
Provided is a receiver circuit which receives an input signal. A first restriction circuit provides a first reference voltage or an input signal higher than...
2016/0105182 LEVEL SHIFTING AN I/O SIGNAL INTO MULTIPLE VOLTAGE DOMAINS
Embodiments disclosed herein include an I/O module with multiple level shifters that establish a plurality of voltage domains. Using the level shifters, the...
2016/0105181 RECEIVING AN I/O SIGNAL IN MULTIPLE VOLTAGE DOMAINS
Embodiments disclosed herein include an I/O module with multiple level shifters that establish a plurality of voltage domains. Using the level shifters, the...
2016/0105180 RECEIVING AN I/O SIGNAL IN MULTIPLE VOLTAGE DOMAINS
Embodiments disclosed herein include an I/O module with multiple level shifters that establish a plurality of voltage domains. Using the level shifters, the...
2016/0105179 LEVEL SHIFTING AN I/O SIGNAL INTO MULTIPLE VOLTAGE DOMAINS
Embodiments disclosed herein include an I/O module with multiple level shifters that establish a plurality of voltage domains. Using the level shifters, the...
2016/0105178 METHODS AND APPARATUSES FOR MULTIPLE CONCURRENT SUB-THRESHOLD VOLTAGE DOMAINS FOR OPTIMAL POWER PER GIVEN...
A method and flow for implementing an ASIC using sub-threshold technology with optimized selection of voltage and process for a given application performance....
2016/0105177 CLOCK BUFFERS WITH PULSE DRIVE CAPABILITY FOR POWER EFFICIENCY
A clock driver is provided. The clock driver includes a multi-stage delay cell having an input, a positive pulse driving branch, a negative pulse driving...
2016/0105176 SPIN WAVE DEVICE AND LOGIC CIRCUIT USING SPIN WAVE DEVICE
As a technique for attaining a reduction in power consumption, there is a technique for reducing power consumption using a spin wave. No specific proposal...
2016/0105175 POWER SEMICONDUCTOR DRIVE CIRCUIT, POWER SEMICONDUCTOR CIRCUIT, AND POWER MODULE CIRCUIT DEVICE
A power semiconductor drive circuit includes a parallel circuit connected to a gate of a power semiconductor element and constituted by two transistors for...
2016/0105174 LOGIC CIRCUIT, PROCESSING UNIT, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE
A retention circuit provided in a logic circuit enables power gating. The retention circuit includes a first terminal, a node, a capacitor, and first to third...
2016/0105173 HIGH VOLTAGE ZERO QRR BOOTSTRAP SUPPLY
An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and...
2016/0105172 ACTIVE DIODE HAVING IMPROVED TRANSISTOR TURN-OFF CONTROL METHOD
An active diode that features improved control of transistor turn-off is provided. Such an active diode may include a comparator to compare voltages between...
2016/0105171 SEMICONDUCTOR DEVICE HAVING THROUGH CHIP VIA
A semiconductor device includes a plurality of chips; a first through-chip via vertically passing through the chips, a power-saving unit suitable for being...
2016/0105170 RESET SIGNAL GENERATOR AND INTEGRATED CIRCUIT HAVING THE SAME
A reset signal generator may include a voltage divider dividing a voltage level of a driving voltage, a reference voltage generator generating a reference...
2016/0105169 LOW POWER EXTERNALLY BIASED POWER-ON-RESET CIRCUIT
Various methods and devices that involve power-on-reset (POR) circuits are disclosed herein. An exemplary POR circuit for generating a POR signal upon...
2016/0105168 CHIP AND CHIP CONTROL METHOD
Provided is a chip in which operation state information on a main logic unit operating in response to an enable signal is acquired, and determining whether a...
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