Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
2016/0111335 SEMICONDUCTOR STRUCTURE WITH SELF-ALIGNED WELLS AND MULTIPLE CHANNEL MATERIALS
Embodiments of the present invention provide a semiconductor structure having a strain relaxed buffer, and method of fabrication. A strain relaxed buffer is...
2016/0111334 FINFET FORMATION PROCESS AND STRUCTURE
A FinFET and methods for forming a FinFET are disclosed. In a method, first trenches are formed in a substrate. First isolation regions are then formed in the...
2016/0111333 SUBSTRATE DIVIDING METHOD
A substrate dividing method which can thin and divide a substrate while preventing chipping and cracking from occurring. This substrate dividing method...
2016/0111332 Method and Apparatus for Plasma Dicing a Semi-conductor Wafer
The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma...
2016/0111331 WAFER PROCESSING METHOD
A wafer is divided into individual devices along division lines formed on the front side of the wafer. A protective tape having an adhesive layer is attached...
2016/0111330 METHOD FOR PRODUCING INTERCONNECTIONS FOR 3D INTEGRATED CIRCUIT
Method for producing one or more connection elements for integrated circuit including the formation of sacrificial elements passing through a porous layer...
2016/0111329 INTERCONNECT STRUCTURE AND FABRICATION METHOD THEREOF
A method for forming an interconnect structure is provided. The method includes providing a substrate with a surface; and forming a metal layer covering the...
2016/0111328 MULTILEVEL MASK CIRCUIT FABRICATION AND MULTILAYER CIRCUIT
Circuit fabrication uses a multilevel mask to pattern a first conductor layer of a multilayer circuit. The first conductor patterning is to provide electrical...
2016/0111327 Device and Method for Reducing Contact Resistance of a Metal
A method of fabricating an integrated circuit includes depositing a cap layer on a substrate; depositing a dielectric layer on the cap layer; and forming a...
2016/0111326 Early Bit Line Air Gap Formation
Dummy bit lines of are formed in a sacrificial layer at locations where bit lines are to be formed, with bit lines separated by trenches that extend through...
2016/0111325 ETCH STOP LAYER IN INTEGRATED CIRCUITS
An integrated circuit structure includes a dielectric layer and an etch stop layer. The etch stop layer includes a first sub layer including a metal nitride...
2016/0111324 Semiconductor Device and Method of Forming Same
Semiconductor devices and methods of forming the same are disclosed. A dielectric layer is formed over an underlying layer. A first mask layer and a second...
2016/0111323 MOSFETs with Channels on Nothing and Methods for Forming the Same
A method includes performing an epitaxy to grow a semiconductor layer, which includes a top portion over a semiconductor region. The semiconductor region is...
2016/0111322 FINFET SEMICONDUCTOR DEVICE HAVING LOCAL BURIED OXIDE
There is set forth herein in one embodiment a FinFET semiconductor device having a fin extending from a bulk silicon substrate, wherein there is formed wrapped...
2016/0111321 DEVICE ISOLATION STRUCTURE AND MANUFACTURE METHOD
A method for forming a semiconductor device includes forming a buried doped layer in a semiconductor substrate and forming a plurality of first trenches that...
2016/0111320 T-SHAPED FIN ISOLATION REGION AND METHODS OF FABRICATION
Semiconductor devices and fabrication methods are provided having an isolation feature within a fin structure which, for instance, facilitates isolating...
2016/0111319 Retainer, Method For Producing Same And Use Thereof
A retainer has a coating composed of silicon carbide, glassy carbon or pyrolytic carbon on its surface. A method for producing the retainer and the use of the...
2016/0111318 SUBSTRATE HOLDING METHOD, SUBSTRATE HOLDING APPARATUS, EXPOSURE APPARATUS AND EXPOSURE METHOD
A wafer holding apparatus for holding a wafer including a wafer holder on which the wafer is placed; and a lift pin that is configured to be lifted up and down...
2016/0111317 SEMICONDUCTOR MANUFACTURING APPARATUS
A semiconductor manufacturing apparatus includes: a collet which sucks a semiconductor chip having a main surface on which a bump is formed, and an actuator...
2016/0111316 Debonding Schemes
A method includes receiving a wafer stack having at least two wafers bonded together. At least one blade is inserted between a first wafer of the at least two...
2016/0111315 ELECTROSTATIC CHUCK ASSEMBLY FOR HIGH TEMPERATURE PROCESSES
An electrostatic chuck assembly includes a puck and a cooling plate. The puck includes an electrically insulative upper puck plate comprising one or more...
2016/0111314 ESC ASSEMBLY INCLUDING AN ELECTRICALLY CONDUCTIVE GASKET FOR UNIFORM RF POWER DELIVERY THERETHROUGH
A substrate processing apparatus for processing substrates comprises a processing chamber in which a substrate is processed. A process gas source is adapted to...
2016/0111313 APPARATUS FOR THE VACUUM TREATMENT OF SUBSTRATES
The invention relates to an apparatus for the vacuum treatment of substrates (130), comprising a vacuum chamber (1) having a plasma device (160) of a process...
2016/0111312 END EFFECTOR
An end effector according to the present invention includes: a hand; a substrate holder provided on the hand; a mapping detector provided at distal end...
2016/0111311 WAFER TRANSFER METHOD AND SYSTEM
A wafer transfer method includes the following steps. An initial position of a first wafer in a wafer cassette is detected. A picking entry position in the...
2016/0111310 Wafer Transfer System
A wafer transport system includes a pod that contains one or more wafers in an enclosed environment, a substrate transport surface that extends substantially...
2016/0111309 EQUIPMENT FRONT END MODULE FOR TRANSFERRING WAFERS AND METHOD OF TRANSFERRING WAFERS
An EFEM useful for transferring wafers to and from wafer processing modules comprises an enclosure having a controlled environment therein bounded by a front...
2016/0111308 REDUCED CAPACITY CARRIER, TRANSPORT, LOAD PORT, BUFFER SYSTEM
In accordance with an exemplary embodiment a semiconductor workpiece processing system having at least one processing tool for processing semiconductor...
2016/0111307 INTEGRATED SUBSTRATE DEFECT DETECTION USING PRECISION COATING
Apparatuses and methods for improved substrate defect detection is provided. Substrate defects may be detected, possibly with defect detection equipment such...
2016/0111306 OPTICAL SYSTEM
Implementations of the present disclosure generally relate to an improved lamphead assembly for use in a thermal processing chamber. In one implementation, a...
2016/0111305 APPARATUS FOR ADJUSTABLE LIGHT SOURCE
Apparatus for adjusting the position of lamp modules of a processing chamber are disclosed herein. Implementations generally include a process chamber...
2016/0111304 SUBSTRATE PROCESSING APPARATUS, SUBSTRATE PROCESSING METHOD AND STORAGE MEDIUM
There is provided a substrate processing apparatus of performing a predetermined substrate process on a plurality of target substrates under a vacuum...
2016/0111303 SUBSTRATE LIQUID PROCESSING APPARATUS, SUBSTRATE LIQUID PROCESSING METHOD, AND COMPUTER-READABLE STORAGE MEDIUM...
Disclosed is a substrate liquid processing apparatus. The apparatus includes: a pure water supply unit (a rinse liquid supply unit) configured to supply pure...
2016/0111302 Systems and Methods for Wet Processing Substrates with Rotating Splash Shield
Embodiments provided herein provide systems and methods for wet processing substrates with a rotating splash shield. The systems include a fluid dispenser...
2016/0111301 CORELESS PACKAGING SUBSTRATE AND METHOD OF FABRICATING THE SAME
A coreless packaging substrate includes: a circuit buildup structure having at least a dielectric layer, a wiring layer and a plurality of conductive elements,...
2016/0111300 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes the steps of placing, on a heat sink made of a metal, a semiconductor element and a frame surrounding...
2016/0111299 Methods of Fabricating Tape Film Packages
A tape film package is provided including an insulating pattern; a via contact in a via hole in the insulating pattern; first interconnection patterns...
2016/0111298 ETCHING METHOD USING PLASMA, AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE INCLUDING THE ETCHING METHOD
An etching method using plasma includes generating plasma by supplying process gases to at least one remote plasma source (RPS) and applying power to the at...
2016/0111297 ITERATIVE SELF-ALIGNED PATTERNING
A method for self-aligned patterning includes providing a substrate, forming a patterned mandrel layer that includes a plurality of mandrel features, the...
2016/0111296 SUBSTRATE PROCESSING APPARATUS, LINKED PROCESSING SYSTEM, AND SUBSTRATE PROCESSING METHOD
A substrate processing apparatus comprises: a substrate holding unit configured to hold and rotate a substrate; an etching unit configured to etch a surface of...
2016/0111295 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A method for fabricating a semiconductor device is provided. The method includes the following steps. A substrate including a memory cell region and a...
2016/0111294 USE OF ION BEAM ETCHING TO GENERATE GATE-ALL-AROUND STRUCTURE
Various embodiments herein relate to methods and apparatus for performing anisotropic ion beam etching to form arrays of channels. The channels may be formed...
2016/0111293 MANUFACTURING METHOD OF WAFER LEVEL CHIP SCALE PACKAGE STRUCTURE
A manufacturing method of wafer level chip scale package structure is provided. Firstly, a wafer including a plurality of semiconductor devices is provided. An...
2016/0111292 CHARGE TRAPPING SPLIT GATE EMBEDDED FLASH MEMORY AND ASSOCIATED METHODS
Semiconductor devices and methods of manufacturing such devices are described herein. According to embodiments, the semiconductor device can be made by forming...
2016/0111291 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
The present disclosure relates to a semiconductor memory, device and a method of forming a semiconductor memory device. The method of manufacturing a...
2016/0111290 CMOS Vt CONTROL INTEGRATION BY MODIFICATION OF METAL-CONTAINING GATE ELECTRODES
A method of forming a semiconductor device is disclosed in various embodiments. The method includes providing a substrate containing first and second device...
2016/0111289 Semiconductor Device and Method for Forming a Semiconductor Device
A method includes forming an emitter at the first side of a semiconductor substrate by doping, wherein the dopant concentration is higher in the emitter than...
2016/0111288 LOW-K DAMAGE REPAIR AND PORE SEALING AGENTS WITH PHOTOSENSITIVE END GROUPS
Methods of repairing damaged low-k dielectric films using UV-activated photosensitive organic compounds are described herein. Methods of sealing pores by...
2016/0111287 METHOD FOR FORMING MULTI-LAYER FILM AND PATTERNING PROCESS
A method for forming multi-layer film on substrate, which includes steps (1) forming under layer film on substrate by applying under layer film material...
2016/0111286 Method of Semiconductor Device Fabrication
A method of fabricating a semiconductor device is disclosed. The method includes forming a dielectric layer over a substrate, forming a hard mask (HM) layer...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.