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Photo-Induced MSM Stack
Selector elements that can be suitable for nonvolatile memory device applications are disclosed. The selector element can have low leakage currents at low...
Magnetic Tunnel Junctions And Methods Of Forming Magnetic Tunnel Junctions
A method of forming a line of magnetic tunnel junctions includes forming magnetic recording material over a substrate, non-magnetic material over the recording...
ISOLATED GLOBAL SHUTTER PIXEL STORAGE STRUCTURE
A pixel cell includes a photodiode disposed in a semiconductor material to accumulate image charge in response to incident light directed to the photodiode. A...
MANUFACTURING METHOD OF BACK ILLUMINATION CMOS IMAGE SENSOR DEVICE USING
Disclosed is a manufacturing method of a semiconductor device including a step of attaching semiconductor wafers together, in which it is prevented that the...
METHOD OF MANUFACTURING AN IMAGE SENSOR BY JOINING A PIXEL CIRCUIT
SUBSTRATE AND A LOGIC CIRCUIT SUBSTRATE AND...
The present technology includes: bonding a device formation side of a first substrate having a first device and a device formation side of a second substrate...
IMAGE PICKUP MODULE MANUFACTURING METHOD, AND IMAGE PICKUP MODULE
A manufacturing device holds a lens unit on a Z axis that is orthogonal to a chart surface of a measurement chart, holds an image pickup element unit on the Z...
Metal Shielding Layer in Backside Illumination Image Sensor Chips and
Methods for Forming the Same
A device includes a semiconductor substrate having a front side and a backside. A photo-sensitive device is disposed at a surface of the semiconductor...
SEMICONDUCTOR FABRICATION METHOD
A semiconductor fabrication method is disclosed. A substrate having thereon a plurality of semiconductor elements are provided. A dielectric layer is formed on...
IMAGE SENSOR WITH VERTICAL ELECTRODES
An image sensor arranged inside and on top of a semi-conductor substrate having a front surface and a rear surface, the sensor including a plurality of pixels,...
FRONT-SIDE IMAGER HAVING A REDUCED DARK CURRENT ON SOI SUBSTRATE
A front-side image sensor may include a substrate in a semiconductor material and an active layer in the semiconductor material. The front side image sensor...
STACKED TYPE IMAGE SENSOR INCLUDING COLOR SEPARATION ELEMENT AND IMAGE
PICKUP APPARATUS INCLUDING STACKED TYPE...
A stacked type image sensor including color separation elements, and an image pickup apparatus including the stacked type image sensor, are provided. The...
FOCUS DETECTING DEVICE AND ELECTRONIC DEVICE
The present technology relates to a focus detecting device and an electronic device that can adjust the maximum value and the minimum value of sensitivity in...
COLOR AND INFRARED IMAGE SENSOR WITH DEPLETION ADJUSTMENT LAYER
An image sensor pixel includes a photodiode region formed in a semiconductor layer, a pinning layer and a depletion adjustment layer. The photodiode region...
CHIP SCALE PACKAGE OF IMAGE SENSOR HAVING DAM COMBINATION
Disclosed is a chip scale package of image sensor having a dam combination, comprising an image sensor chip, a dam combination, a transparent lid disposed on...
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor...
Imaging Device and Electronic Device
An imaging device with excellent imaging performance is provided. In the imaging device, a first layer, a second layer, and a third layer have a region...
SPLIT-GATE CONDITIONAL-RESET IMAGE SENSOR
In a pixel array within an integrated-circuit image sensor, a pixel (870) includes a photodetector (260) and floating diffusion (262) formed within a...
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A solid-state image sensing element including a transistor with stable electrical characteristics (e.g., significantly low off-state current) is provided. Two...
IMAGING ELEMENT AND METHOD OF MANUFACTURING THE SAME
A solid-state image sensor including a substrate having a photoelectric conversion element disposed therein, the photoelectric conversion element converting an...
METHOD FOR MANUFACTURING ARRAY SUBSTRATE
The present invention provides a method for manufacturing an array substrate, wherein each data line in a plurality of data line groups forms an integral...
THIN-FILM TRANSISTOR ARRAY SUBSTRATE AND ORGANIC LIGHT-EMITTING DISPLAY
APPARATUS INCLUDING THE SAME
A thin-film transistor (TFT) array substrate includes a driving TFT, a storage capacitor, a first wire, a first interlayer insulating film, a second interlayer...
THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
A thin film transistor array panel includes a substrate, a gate line and a gate pad disposed on the substrate, a gate insulating layer disposed on the gate...
An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state...
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
An aperture ratio of a semiconductor device is improved. A driver circuit and a pixel are provided over one substrate, and a first thin film transistor in the...
DISPLAY DEVICE, MANUFACTURING METHOD OF DISPLAY DEVICE, AND ELECTRONIC
A display device in which a peripheral circuit portion has high operation stability is provided. The display device includes a first substrate and a second...
ARRAY SUBSTRATE, DISPLAY PANEL AND METHOD OF MANUFACTURING THIN FILM
An array substrate, a display panel and a method of manufacturing a thin film transistor (TFT) are provided. The array substrate includes a base substrate and...
DUAL THREE-DIMENSIONAL AND RF SEMICONDUCTOR DEVICES USING LOCAL SOI
Co-fabrication of a radio-frequency (RF) semiconductor device with a three-dimensional semiconductor device includes providing a starting three-dimensional...
THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY APPARATUS
A thin film transistor (TFT) substrate comprises a substrate, a plurality of pixel electrodes, a gate layer, an active layer, a first source layer and a second...
An e-book reader including a display panel having a thin film transistor with stable electrical characteristics is provided. Alternatively, an e-book reader...
TFT ARRAY SUBSTRATE, DISPLAY PANEL, AND TFT STRUCTURE
A TFT array substrate includes a plurality of scan lines, a plurality of date lines, a plurality of pixels, a first TFT, and a second TFT. The number of scan...
A display device including: a substrate including first and second sides which face and are parallel to each other, and third and fourth sides which are...
TFT ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE
A TFT array substrate is disclosed. The TFT array substrate includes a base, a display region disposed on the base, and a gate drive circuit region disposed on...
ARRAY SUBSTRATE AND DISPLAY DEVICE
Disclosed is an array substrate including gate lines (210), data lines (220) formed on a base substrate and a plurality of pixel units defined by intersecting...
In a semiconductor device having an SRAM memory cell, its reliability is improved. In the semiconductor device having the SRAM memory cell, ...
Semiconductor Structure with Active Device and Damaged Region
A semiconductor structure is formed with an active layer having an active device including a body region. The active device is formed by top side processing in...
APPARATUSES HAVING A FERROELECTRIC FIELD-EFFECT TRANSISTOR MEMORY ARRAY
AND RELATED METHOD
An apparatus comprises field-effect transistor (FET) structures stacked horizontally and vertically in a three-dimensional memory array architecture, gates...
THREE-DIMENSIONAL NON-VOLATILE FERROELECTRIC RANDOM ACCESS MEMORY
The present invention provides a design of three-dimensional non-volatile ferroelectric random access memory (FeRAM) devices for increasing the storage...
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a channel layer including a sidewall having protrusions and depressions alternating with each other in a direction in which the...
Semiconductor Constructions and NAND Unit Cells
Some embodiments include methods of forming semiconductor constructions. Alternating layers of n-type doped material and p-type doped material may be formed....
METHODS OF FORMING A THIN FILM AND METHODS OF FABRICATING A SEMICONDUCTOR
DEVICE INCLUDING USING THE SAME
Provided are methods of forming a thin film and methods of fabricating a semiconductor device including the same. The thin film forming methods may include...
SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FORMING THE SAME
Methods of forming semiconductor devices may be provided. A method of forming a semiconductor device may include patterning first and second material layers to...
THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
A three-dimensional (3D) semiconductor memory device that includes a peripheral logic structure including peripheral logic circuits disposed on a semiconductor...
SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE, AND METHOD OF FABRICATING THE
Provided are a three dimensional semiconductor memory device and a method of fabricating the same. In the three dimensional semiconductor memory device, a...
NAND MEMORY STRINGS AND METHODS OF FABRICATION THEREOF
Methods of making monolithic three-dimensional memory devices include performing a first etch to form a memory opening and a second etch using a different...
THREE DIMENSIONAL NAND DEVICE CONTAINING FLUORINE DOPED LAYER AND METHOD
OF MAKING THEREOF
A method of making a monolithic three dimensional NAND string comprising forming a stack of alternating layers of a first material and a second material...
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A semiconductor device and a method of fabricating the same are disclosed. The semiconductor device includes a pipe gate, a multi-layered word line formed over...
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
To improve a semiconductor device having a nonvolatile memory. A first MISFET, a second MISFET, and a memory cell are formed, and a stopper film made of a...
NAND MEMORY ARRAY WITH MISMATCHED CELL AND BITLINE PITCH
Embodiments of the present disclosure describe methods, apparatus, and system configurations for NAND memory arrays with mismatched cell and bitline pitch....
CHARGE STORAGE APPARATUS AND METHODS
Methods of forming multi-tiered semiconductor devices are described, along with apparatus and systems that include them. In one such method, an opening is...
DEUTERIUM ANNEAL OF SEMICONDUCTOR CHANNELS IN A THREE-DIMENSIONAL MEMORY
A monolithic three-dimensional memory structure includes a memory stack structure including a memory film and a semiconductor channel. Traps and/or defects...