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Patent # Description
2016/0117290 Terminal and Information Interaction Method
The present invention provides a terminal and an information interaction method. The terminal comprises an identification generation unit and a notification...
2016/0117289 Modifying Native Document Comments In A Preview
A document preview system provides previews of a native document to client devices. The previews include comments associated with native objects in the native...
2016/0117288 TEARABLE DISPLAYS
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for presenting content on tearable displays. One of the methods...
2016/0117287 Method and Apparatus for Rendering Websites on Physical Devices
In at least one embodiment, the system and method described herein provides a concrete and tangible technical solution to the problem of activating and testing...
2016/0117286 NATURAL LANGUAGE PROCESSING-ASSISTED EXTRACT, TRANSFORM, AND LOAD TECHNIQUES
Embodiments presented herein disclose techniques for transforming input documents having disparate formats into a normalized format (e.g., Atom, RSS, HTML,...
2016/0117285 FINDING A CUR DECOMPOSITION
One embodiments is a computer-implemented method for finding a CUR decomposition. The method includes constructing, by a computer processor, a matrix C based...
2016/0117284 METHODS FOR USING TEMPORAL PROXIMITY OF SOCIAL CONNECTION CREATIONS TO PREDICT PROPERTIES OF A SOCIAL CONNECTION
Aspects of the subject technology relate to a social-networking system, including one or more computers communicatively coupled via a network. In certain...
2016/0117283 REMOTE DIRECT MEMORY ACCESS (RDMA) OPTIMIZED HIGH AVAILABILITY FOR IN-MEMORY DATA STORAGE
A method for RDMA optimized high availability for in-memory storing of data includes receiving RDMA key-value store write requests in a network adapter of a...
2016/0117282 TWO MODES OF A CONFIGURATION INTERFACE OF A NETWORK ASIC
Embodiments of the present invention are directed to a configuration interface of a network ASIC. The configuration interface allows for two modes of traversal...
2016/0117281 INFORMATION SYSTEM CAPABLE OF EXPANDING DRIVE AND BUS NUMBER ALLOCATION METHOD OF THE INFORMATION SYSTEM
In a storage device applying PCIe to a back-end network connection, in order to be capable of allocating bus numbers and making a PCIe switch expanded...
2016/0117280 INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND RECORDING MEDIUM
An information processing apparatus that includes a plurality of ports, selectively connects one of the plurality of ports, and is interconnected to a...
2016/0117279 Dynamic Connection of PCIe Devices and Functions to an Array of Hosts
Systems and methods for connecting a device to one of a plurality of processing hosts. A virtual interface card (VIC) adapter learns the number and location of...
2016/0117278 PERIPHERAL PROTOCOL NEGOTIATION
Systems and methods of operating a computing system may involve utilizing at least one of a peripheral protocol negotiation and a universal connector to...
2016/0117277 COLLABORATIVE HARDWARE INTERACTION BY MULTIPLE ENTITIES USING A SHARED QUEUE
A method for interaction by a central processing unit (CPU) and peripheral devices in a computer includes allocating, in a memory, a work queue for controlling...
2016/0117276 KVM SWITCH
A KVM (K: keyboard, V: video, M: mouse) switch to be connected between a computer, and a keyboard and a mouse, the KVM switch includes: a connector that is...
2016/0117275 APPARATUS AND METHODS FOR SERIAL INTERFACES
Apparatus and methods for serial interfaces are provided. In one embodiment, an integrated circuit operable to communicate over a serial interface is provided....
2016/0117274 USB PORT CONTROLLER WITH AUTOMATIC TRANSMIT RETRIES AND RECEIVE ACKNOWLEDGEMENTS
Described examples include USB controllers and methods of interfacing a host processor with one or more USB ports with the host processor implementing an upper...
2016/0117273 MULTIPLE-INTERRUPT PROPAGATION SCHEME IN A NETWORK ASIC
Embodiments of the present invention are directed to a multiple-interrupt propagation scheme, which is an automated mechanism for the specification and...
2016/0117272 PROGRAMMING INTERRUPTION MANAGEMENT
The present disclosure is related to programming interruption management. An apparatus can be configured to detect an interruption during a programming...
2016/0117271 SMART HOLDING REGISTERS TO ENABLE MULTIPLE REGISTER ACCESSES
A multiple access mechanism allows sources to simultaneously access different target registers at the same time without using a semaphore. The multiple access...
2016/0117270 SHARING CONTENT USING A DONGLE DEVICE
A content sharing device may receive, from a content providing device, information that identifies content to be shared with a dongle device via a content...
2016/0117269 SYSTEM AND METHOD FOR PROVIDING UNIVERSAL SERIAL BUS LINK POWER MANAGEMENT POLICIES IN A PROCESSOR ENVIRONMENT
One particular example implementation may include an apparatus that includes logic, at least a portion of which is in hardware, the logic configured to:...
2016/0117268 INVENTION TITLE METHOD AND SYSTEM OF CONNECTING AND SWITCHING GROUPED INPUT AND OUTPUT DEVICES BETWEEN COMPUTERS
A system, method, and computer readable medium for switching (via a hub connection device) peripheral devices (such as a display, keyboard, mouse, audio)...
2016/0117267 CONCURRENT VIRTUAL TAPE USAGE
A request to access a virtual tape volume is identified and a lock status is maintained for the virtual tape volume. The lock status includes a shared status...
2016/0117266 SELECTIVE MANAGEMENT OF SECURITY DATA
Security techniques may be selectively performed on data based on a classification of the data. One example technique includes receiving a memory access...
2016/0117265 MAINTAINING A SECURE PROCESSING ENVIRONMENT ACROSS POWER CYCLES
Embodiments of an invention for maintaining a secure processing environment across power cycles are disclosed. In one embodiment, a processor includes an...
2016/0117264 SYSTEMS AND METHODS FOR PREVENTING DATA REMANENCE IN MEMORY
A system for preventing data remanence in memory is provided. The system includes a computing device, a memory chip coupled to the computing device and...
2016/0117263 STORAGE DEVICE AND CONTROL METHOD FOR STORAGE DEVICE
Key information that is currently in use is archived in a management server to prevent the key information from being lost. A storage device 10 is...
2016/0117262 Hybrid Cryptographic Key Derivation
Cryptographic key management and usage is accomplished by employing a hybrid symmetric/asymmetric security context wherein seed values are associated with...
2016/0117261 RESPONSE VALIDATION MECHANISM FOR TRIGGERING NON-INVASIVE RE-TEST ACCESS OF INTEGRATED CIRCUITS
In an embodiment of the invention, response validation offers increased integrated circuit security by using a unique password or re-test key for every...
2016/0117260 Method and Computing Device for Encrypting Data Stored in Swap Memory
The following embodiments generally relate to the use of a "swap area" in a non-volatile memory as an extension to volatile memory in a computing device. These...
2016/0117259 STORAGE MANAGEMENT METHOD, STORAGE MANAGEMENT SYSTEM, COMPUTER SYSTEM, AND PROGRAM
A storage management method and the like for managing a hierarchical storage are provided. A storage management method is provided for managing a hierarchical...
2016/0117258 SEAMLESS APPLICATION ACCESS TO HYBRID MAIN MEMORY
A command from an application is received to access a data structure associated with one or more virtual addresses mapped to main memory. A first subset of the...
2016/0117257 HARDWARE-BASED ARRAY COMPRESSION
Technologies are generally described herein for compressing an array using hardware-based compression and performing various instructions on the compressed...
2016/0117256 NONVOLATILE MEMORY DEVICES AND METHODS OF CONTROLLING THE SAME
At least one example embodiment discloses a method of controlling a nonvolatile memory device including a plurality of blocks, each block including a plurality...
2016/0117255 DEVICE HAVING A CACHE MEMORY
A device has a cache memory for temporarily storing contents of a buffer memory. The device has a mirror unit coupled between the cache memory and the buffer...
2016/0117254 CACHE OPTIMIZATION TECHNIQUE FOR LARGE WORKING DATA SETS
A system and method for recognizing data access patterns in large data sets and for preloading a cache based on the recognized patterns is provided. In some...
2016/0117253 Method for Improving Mixed Random Performance in Low Queue Depth Workloads
Systems, methods and/or devices are used to enable improving mixed random performance in low queue depth workloads in a storage device (e.g., comprising a...
2016/0117252 Processing of Un-Map Commands to Enhance Performance and Endurance of a Storage Device
A storage device and method enable processing of un-map commands. In one aspect, the method includes (1) determining whether a size of an un-map command...
2016/0117251 MANAGING METHOD FOR CACHE MEMORY OF SOLID STATE DRIVE
A managing method for a cache memory of a solid state drive includes the following steps. When the solid state drive decides to perform a garbage collection, a...
2016/0117250 Apparatus and Method of Throttling Hardware Pre-fetch
Hardware based prefetching for processor systems is implemented. A prefetch unit can be provided in a cache subsystem that allocates a prefetch tracker in...
2016/0117249 SNOOP FILTER FOR MULTI-PROCESSOR SYSTEM AND RELATED SNOOP FILTERING METHOD
A snoop filter for a multi-processor system has a storage device and a control circuit. The control circuit manages at least a first-type entry and at least a...
2016/0117248 COHERENCY PROBE WITH LINK OR DOMAIN INDICATOR
A processor includes a set of processing modules, each of the processing modules including a cache and a coherency manager that keeps track of the memory...
2016/0117247 COHERENCY PROBE RESPONSE ACCUMULATION
A processor accumulating coherency probe responses, thereby reducing the impact of coherency messages on the bandwidth of the processor's communication fabric....
2016/0117246 METHOD AND APPARATUS FOR CROSS-CORE COVERT CHANNEL
Passing messages between two virtual machines that use a single multicore processor having inclusive cache includes using a cache-based covert channel. A...
2016/0117245 APPARATUS, A SYSTEM, A METHOD AND A COMPUTER PROGRAM FOR ERASING DATA STORED ON A STORAGE DEVICE
An approach for erasing data being stored in a data storage apparatus is provided, which may be provided e.g. as an apparatus, as a method, as a system or as a...
2016/0117244 DATA WRITING METHOD, MEMORY CONTROL CIRCUIT UNIT AND MEMORY STORAGE APPARATUS
A data writing method for a rewritable non-volatile memory module is provided. The method includes: compressing data to generate first data; determining...
2016/0117243 OPTIMIZATION OF NON-VOLATILE MEMORY IN MESSAGE QUEUING
Embodiments of the invention provide for the optimization of utilization of non-volatile memory in message queuing. In an embodiment of the invention, a method...
2016/0117242 OPTIMIZATION OF NON-VOLATILE MEMORY IN MESSAGE QUEUING
Embodiments of the invention provide for the optimization of utilization of non-volatile memory in message queuing. In an embodiment of the invention, a method...
2016/0117241 METHOD FOR USING SERVICE LEVEL OBJECTIVES TO DYNAMICALLY ALLOCATE CACHE RESOURCES AMONG COMPETING WORKLOADS
A method, device, and non-transitory computer readable medium that dynamically allocates cache resources includes monitoring a hit or miss rate of a service...
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