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Patent # Description
2016/0124909 COMPUTERIZED TOOL FOR CREATING VARIABLE LENGTH PRESENTATIONS
A computer based tool and method for automatically producing, from an existing presentation, a new presentation that fits within a specific presentation...
2016/0124908 FACILITATING A MEETING USING GRAPHICAL TEXT ANALYSIS
Embodiments relate to facilitating a meeting. A method for facilitating a meeting of a group of participants is provided. The method generates a graph of words...
2016/0124907 BALANCING PROVENANCE AND ACCURACY TRADEOFFS IN DATA MODELING
Generating a data model may include receiving a raw data set and generating a first repository based on a first set of features of the raw data set, a second...
2016/0124906 METHODS AND SYSTEMS FOR REPRESENTING A DEGREE OF TRAFFIC CONGESTION USING A LIMITED NUMBER OF SYMBOLS
Method of creating a computerized model for computing values representative of traffic congestion in respect of a geographic area for use in representing a...
2016/0124905 APPARATUS AND METHOD FOR VECTOR PROCESSING
An apparatus comprises processing circuitry for performing, in response to a vector instruction, a plurality of lanes of processing or respective data elements...
2016/0124904 PROCESSING DEVICE AND METHOD FOR PERFORMING A ROUND OF A FAST FOURIER TRANSFORM
A data processing device and a method for performing a round of an N point Fast Fourier Transform are described. The round comprises computing N output...
2016/0124903 Subspace-constrained partial update method for high-dimensional adaptive processing systems
A method is explained for any adaptive processor processing digital signals by adjusting signal weights on digital signal(s) it handles, to optimize adaptation...
2016/0124902 ACCELERATING PARTICLE-SWARM ALGORITHMS
Embodiments of the inventive subject matter include determining a plurality of potential full resolution locations for a particle representation for a second...
2016/0124901 Wireless vehicle-monitoring system
Embodiments of the present invention provide a wireless appliance for monitoring a vehicle. The wireless appliance includes a microprocessor configured to...
2016/0124900 COMPARISON-BASED SORT IN AN ARRAY PROCESSOR
A method for sorting data in an array processor. Each of a first tier of processing elements in the array processor receives data inputs from a load streaming...
2016/0124899 MULTI-CHIP PACKAGED FUNCTION INCLUDING A PROGRAMMABLE DEVICE AND A FIXED FUNCTION DIE AND USE FOR APPLICATION...
One or more processing functions may be off-loaded from a general-purpose processing device to auxiliary processing devices. The auxiliary processing devices...
2016/0124898 CACHE MANAGEMENT FOR RDMA DATA STORES
Embodiments relate to methods, systems and computer program products for cache management in a Remote Direct Memory Access (RDMA) data store. Aspects include...
2016/0124897 CACHE MANAGEMENT FOR RDMA DATA STORES
Embodiments relate to methods, systems and computer program products for cache management in a Remote Direct Memory Access (RDMA) data store. Aspects include...
2016/0124896 SIMULTANEOUS EDGE TOGGLING IMMUNITY CIRCUIT FOR MULTI-MODE BUS
A device is provided comprising a shared bus including a first and a second line, a first subset of devices and a second subset of devices coupled to the...
2016/0124895 Interface with Variable Data Rate
A device includes a transmitter coupled to a node, where the node is to couple to a wired link. The transmitter has a plurality of modes of operation including...
2016/0124894 METHOD, APPARATUS AND SYSTEM FOR MEASURING LATENCY IN A PHYSICAL UNIT OF A CIRCUIT
In an embodiment, an apparatus includes a counter to count between a start value and an end value according to a local clock signal, a first register to store...
2016/0124893 INFORMATION PROCESSING APPARATUS AND METHOD OF CONTROLLING THE SAME
Provided is an information processing apparatus including a processor and a PCI node connected to the processor via a first PCI bus, the processor obtaining a...
2016/0124892 PREDEFINED STATIC ENUMERATION FOR DYNAMIC ENUMERATION BUSES
Predefined static enumeration systems and processes for dynamic enumeration buses are disclosed. In one aspect, the dynamic enumeration bus may be a...
2016/0124891 METHODS AND CIRCUITS FOR DEADLOCK AVOIDANCE
A system is disclosed that includes a first communication circuit that communicates data over a first data port using a first communication protocol. The...
2016/0124890 Multicore Bus Architecture With Wire Reduction and Physical Congestion Minimization Via Shared Transaction Channels
The Multicore Bus Architecture (MBA) protocol includes a novel technique of sharing the same physical channel for all transaction types. Two channels, the...
2016/0124889 ASYNCHRONOUS FIFO BUFFER WITH JOHNSON CODE WRITE POINTER
An asynchronous data transfer system includes a bus interface unit (BIU), a FIFO write logic module, a write pointer synchronizer, a write pointer validator, a...
2016/0124888 Memory Bus Loading and Conditioning Module
A bus load module plugs into otherwise empty memory sockets on a memory bus. The bus load module conditions signals on the memory bus to improve signal quality...
2016/0124887 PHYSICAL LAYER NETWORK INTERFACE MODULE (PHY-NIM) ADAPTATION SYSTEM
A physical layer network interface module (PHY-NIM) adaptation system provides a PHY-NIM device and an attachable media access control (MAC) device. The...
2016/0124886 USB device and method thereof for automatically recognizing Microsoft windowing operating system version
Disclosed are a USB device and a method thereof for automatically recognizing a Microsoft windowing operating system version. The method comprises: a USB...
2016/0124885 SYSTEMS AND METHODS FOR PROVIDING PROTOCOL INDEPENDENT DISJOINT DRIVE LETTER SETS
A system and method for mounting multiple devices on an SLR enable information handling system is disclosed herein. A drive-letter may be assigned to a first...
2016/0124884 REDUNDANCY FOR PORT EXTENDER CHAINS
Techniques implementing redundancy in an extended bridge comprising a controller bridge (CB) unit and a plurality of port extender (PE) units are provided. In...
2016/0124883 Multicore Bus Architecture With Non-Blocking High Performance Transaction Credit System
This invention is a bus communication protocol. A master device stores bus credits. The master device may transmit a bus transaction only if it holds...
2016/0124882 Electronic Device, System, and Operation-Mode Selection Program
A vehicle-mounted electronic system includes a vehicle-mounted device and a mobile terminal connected to the vehicle-mounted device through a connection unit....
2016/0124881 CHIP SYNCHRONIZATION BY A MASTER-SLAVE CIRCUIT
A master-slave circuit is disclosed that maintains synchronization between two integrated circuit chips, using minimal chip resources. In one embodiment, a...
2016/0124880 METHODS AND SYSTEMS FOR ACCESSING STORAGE USING A NETWORK INTERFACE CARD
Methods and systems for efficiently processing input/output requests are provided. A network interface card (NIC) is coupled to a storage device via a...
2016/0124879 SYSTEM INTERNAL LATENCY MEASUREMENTS IN REALTIME APPLICATIONS
Systems, methods, circuits and computer-readable mediums for system internal latency measurements in realtime applications are disclosed. In some...
2016/0124878 DATA TRANSFER
A controller coupled to a peripheral identifies an access type used by the controller for data transfer. The controller performs operations including: sending...
2016/0124877 Apparatus and Method for RDMA with Commit ACKs
Embodiments of apparatuses and methods for remote direct memory access (RDMA) with commit acknowledgements (ACKs) are described. In embodiments, a device may...
2016/0124876 METHODS AND SYSTEMS FOR NOTICING COMPLETION OF READ REQUESTS IN SOLID STATE DRIVES
The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting a...
2016/0124875 Method of Providing Timing Information for Interrupts
It is desirable for interrupt handling routines to be aware of the interrupt latency--the time between a interrupt request is received and the time when the...
2016/0124874 METHOD AND APPARATUS FOR INTERRUPT COALESCING
Apparatus and methods implemented therein moderate the rate at which a peripheral device interrupts the operation of a host device. Moderation of interrupts is...
2016/0124873 MEMORY SYSTEM WITH REGION-SPECIFIC MEMORY ACCESS SCHEDULING
An integrated circuit device includes a memory controller coupleable to a memory. The memory controller to schedule memory accesses to regions of the memory...
2016/0124872 DISAGGREGATED MEMORY APPLIANCE
Exemplary embodiments provide a disaggregated memory appliance, comprising: a plurality of leaf memory switches that manage one or more memory channels of one...
2016/0124871 EXTERNAL DATA PROCESSING FOR A DISPLAY DEVICE
A method, a device, and a non-transitory computer readable medium for performing external processing on a display device are presented. An application is...
2016/0124870 SYSTEM AND METHOD FOR LOGICAL DELETION OF STORED DATA OBJECTS
Systems and methods for providing object versioning in a storage system may support the logical deletion of stored objects. In response to a delete operation...
2016/0124869 METHOD AND SYSTEM FOR SECURE STORAGE AND RETRIEVAL OF MACHINE STATE
A machine state vector is received at a memory. The machine state vector has a machine state and a machine identifier. Write access qualification is met if the...
2016/0124868 IN-FIELD SMART DEVICE UPDATES
Methods and systems for causing a device to join a network or fabric. A joining device sends an indication that the electronic device is not connected to a...
2016/0124867 Reducing Decompression Time Without Impacting Compression Ratio
Aspects include computing devices, systems, and methods for implementing executing decompression of a compressed page. A computing device may determine a...
2016/0124866 CACHE MEMORY AND METHOD OF MANAGING THE SAME
A cache memory and a method of managing the same are provided. The method of managing a cache memory includes determining whether a number of bits of a data...
2016/0124865 DYNAMIC EVALUATION AND ADAPTION OF HARDWARE HASH FUNCTIONS
Creating hash values based on bit values of an input vector. An apparatus includes a first and a second hash table, a first and second hash function generator...
2016/0124864 MEMORY ADDRESSING MECHANISM USING A BUFFER OF A HIERARCHY OF COLLISION FREE HASH TABLES
Methods and apparatuses for insertion, searching, deletion, and load balancing using a hierarchical series of hash tables are described herein. The techniques...
2016/0124863 Efficient MAC Address Storage For Virtual Machine Applications
Examples of efficient MAC address storage are described, including methods and an apparatus. A method may involve obtaining a plurality of identifications...
2016/0124862 Method and Device for Storing Direct Table
Provides are a method and device for storing a direct table. The method includes that: it is determined that an internal table entry storage space of a chip is...
2016/0124861 CACHE MEMORY AND METHOD FOR ACCESSING CACHE MEMORY
A cache memory is equipped with a cache memory area, a conversion information storing unit, and a conversion circuit. In the cache memory area, a plurality of...
2016/0124860 METHODS AND SYSTEMS FOR HANDLING DATA RECEIVED BY A STATE MACHINE ENGINE
A data analysis system to analyze data. The data analysis system includes a data buffer configured to receive data to be analyzed. The data analysis system...
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