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Patent # Description
2016/0133651 LIGHT-EMITTING DEVICE
A light-emitting device capable of suppressing variation in luminance among pixels is provided. A light-emitting device includes a pixel and first and second...
2016/0133650 THIN FILM TRANSISTOR DEVICE, METHOD FOR MANUFACTURING SAME AND DISPLAY DEVICE
A thin film transistor device including: a substrate; a gate electrode; an electrode pair composed of a source electrode and a drain electrode; a channel...
2016/0133649 THIN FILM TRANSISTOR SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND LIQUID CRYSTAL DISPLAY
A thin film transistor substrate includes a semiconductor channel layer made of an oxide semiconductor, protective insulating layers that cover the...
2016/0133648 JUNCTIONLESS TUNNEL FET WITH METAL-INSULATOR TRANSITION MATERIAL
Embodiments of the present disclosure provide an integrated circuit (IC) structure, which can include: a doped semiconductor layer having a substantially...
2016/0133647 DISPLAY DEVICE
In view of the problem that a reduced thickness of an EL film causes a short circuit between an anode and a cathode and malfunction of a transistor, the...
2016/0133646 ARRAY SUBSTRATE, DISPLAY DEVICE AND REPAIR METHOD OF THE ARRAY SUBSTRATE
An array substrate, a display device and a repair method of the array substrate. The array substrate may include: a base (1); a gate-line repair line (2)...
2016/0133645 RADIO-FREQUENCY SWITCHES HAVING SILICON-ON-INSULATOR FIELD-EFFECT TRANSISTORS WITH REDUCED LINEAR REGION RESISTANCE
Disclosed are devices and methods related to radio-frequency (RF) switches having silicon-on-insulator (SOI) field-effect transistors (FETs). In some...
2016/0133644 SEMICONDUCTOR MEMORY DEVICES INCLUDING ASYMMETRIC WORD LINE PADS
Semiconductor memory devices may include a semiconductor substrate, a first stack disposed on the semiconductor substrate and a second stack disposed on the...
2016/0133643 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A semiconductor device is provided. The semiconductor includes a plurality of interlayer insulating layers and a plurality of gate electrodes alternately...
2016/0133642 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A semiconductor device and a method of fabricating the same are disclosed. The semiconductor device includes: a memory cell structure formed over a...
2016/0133641 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor device of the present invention has a first insulating film formed between a control gate electrode and a semiconductor substrate and a second...
2016/0133640 ALUMINUM OXIDE LANDING LAYER FOR CONDUCTIVE CHANNELS FOR A THREE DIMENSIONAL CIRCUIT DEVICE
A multitier stack of memory cells having an aluminum oxide (AlOx) layer as a noble HiK layer to provide etch stop selectivity. Each tier of the stack includes...
2016/0133639 Virtual Ground Non-volatile Memory Array
A memory device with memory cell pairs each having a single continuous channel region, first and second floating gates over first and second portions of the...
2016/0133638 MEMORY CELL PILLAR INCLUDING SOURCE JUNCTION PLUG
Some embodiments include apparatuses and methods having a source material, a dielectric material over the source material, a select gate material over the...
2016/0133637 GUARD RING FOR MEMORY ARRAY
A device and a method for forming a device are presented. The method includes providing a substrate having an array region in which memory cells are to be...
2016/0133636 Embedded Flash Memory Device with Floating Gate Embedded in a Substrate
An embedded flash memory device includes a gate stack, which includes a bottom dielectric layer extending into a recess in a semiconductor substrate, and a...
2016/0133635 FLASH CELL AND FLASH CELL SET
A flash cell includes a gate, a source/drain and a selector. The gate is disposed on a substrate, wherein the gate includes a control gate disposed on the...
2016/0133634 FIN FIELD-EFFECT TRANSISTOR STATIC RANDOM ACCESS MEMORY DEVICES WITH P-CHANNEL METAL-OXIDE-SEMICONDUCTOR PASS...
A complementary metal oxide semiconductor (CMOS) static random access memory (SRAM) cell. A CMOS SRAM cell in accordance with an aspect of the present...
2016/0133633 SRAM CELLS WITH VERTICAL GATE-ALL-ROUND MOSFETS
A Static Random Access Memory (SRAM) cell includes a first and a second pull-up transistor, a first and a second pull-down transistor forming cross-latched...
2016/0133632 INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME
A method includes providing a plurality of active regions on a substrate, and at least a first device isolation layer between two of the plurality of active...
2016/0133631 METAL TRENCH CAPACITOR AND IMPROVED ISOLATION AND METHODS OF MANUFACTURE
A high-k dielectric metal trench capacitor and improved isolation and methods of manufacturing the same is provided. The method includes forming at least one...
2016/0133630 VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME
A method of manufacturing a vertical memory device includes: providing a substrate including a cell array region and a peripheral circuit region; forming a...
2016/0133629 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes: a first transistor and a second transistor disposed in or on a silicon substrate; an element isolation structure that isolates...
2016/0133628 SEMICONDUCTOR STRUCTURE AND DEVICE AND METHODS OF FORMING SAME USING SELECTIVE EPITAXIAL PROCESS
Semiconductor structures, devices, and methods of forming the structures and device are disclosed. Exemplary structures include multi-gate or FinFET structures...
2016/0133627 Semiconductor Device
A semiconductor device is provided that includes a composite semiconductor body including a high voltage depletion-mode transistor and a low voltage...
2016/0133626 Methods, Structures, and Designs for Self-Aligning Local Interconnects Used in Integrated Circuits
An integrated circuit includes a gate electrode level region that includes a plurality of linear-shaped conductive structures. Each of the plurality of...
2016/0133625 Methods, Structures, and Designs for Self-Aligning Local Interconnects Used in Integrated Circuits
An integrated circuit includes a gate electrode level region that includes a plurality of linear-shaped conductive structures. Each of the plurality of...
2016/0133624 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device with neck fins comprises a substrate, a plurality of fins having a lower portion and a neck upper portion on the substrate, and...
2016/0133623 METHODS OF FORMING A COMBINED GATE AND SOURCE/DRAIN CONTACT STRUCTURE AND THE RESULTING DEVICE
One method disclosed herein includes, among other things, forming a gate cap layer above a recessed final gate structure and above recessed sidewall spacers,...
2016/0133622 SCHOTTKY DIODES FOR REPLACEMENT METAL GATE INTEGRATED CIRCUITS
An integrated circuit and method with a metal gate transistor and with a Schottky diode where the metal used to form the Schottky diode is the metal used to...
2016/0133621 SEMICONDUCTOR DEVICE AND AN ELECTRONIC APPARATUS
A semiconductor device includes a P-type substrate, and an N-well in the P-type substrate. A first N+ diffusion region is located in the P-type substrate, and...
2016/0133620 Power Semiconductor Device with Temperature Protection
A temperature protected power semiconductor device has a substrate which includes a power field effect transistor (FET) and a thermosensitive element. The...
2016/0133619 SEMICONDUCTOR ARRANGEMENT FACILITATING ENHANCED THERMO-CONDUCTION
A semiconductor arrangement includes a well region and a first region disposed within the well region. The first region includes a first conductivity type. The...
2016/0133618 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
A semiconductor device having a semiconductor substrate is provided. The semiconductor substrate includes an integrated circuit, which includes multi-layer...
2016/0133617 FORMING A PANEL OF TRIPLE STACK SEMICONDUCTOR PACKAGES
A method for forming a panel of stacked semiconductor packages includes providing a bottom leadframe (LF) panel including LFs downset each including at least a...
2016/0133616 PHOTO-SENSITIVE SILICON PACKAGE EMBEDDING SELF-POWERED ELECTRONIC SYSTEM
A self-powered electronic system comprises a first chip (401) of single-crystalline semiconductor embedded in a second chip (302) of single-crystalline...
2016/0133615 SEMICONDUCTOR LIGHT EMITTING DEVICE AND SEMICONDUCTOR LIGHT EMITTING DEVICE PACKAGE INCLUDING THE SAME
There is provided a semiconductor light-emitting device which includes a light-emitting diode (LED) chip having a first plane on which first and second...
2016/0133614 SEMICONDUCTOR PACKAGE WITH INCORPORATED INDUCTANCE ELEMENT
The present disclosure provides semiconductor packages and methods for fabricating semiconductor packages. The semiconductor package may comprise a...
2016/0133613 SEMICONDUCTOR PACKAGE AND ELECTRONIC DEVICE HAVING HEAT DISSIPATION
A semiconductor package is provided. The semiconductor package include a lower semiconductor package including a lower package substrate and a lower...
2016/0133612 LED MODULE WITH LED CHIPS
Various embodiments may relate to an LED module, including a number of first inherently unpackaged LED chips, which are in each case designed to emit light of...
2016/0133611 LIGHT EMITTING DEVICE
A light emitting device includes a substrate, a first light emitting element, a second light emitting element, a first conductive pattern, and a second...
2016/0133610 LIGHT EMITTING DIODE (LED) COMPONENTS AND METHODS
Light emitting diode (LED) components and related methods are disclosed. LED components include a submount, at least one LED chip on a first surface of the...
2016/0133609 ELECTRONIC CIRCUIT
A semiconductor device includes a first chip including a PN junction diode, and a second chip including a Schottky barrier diode, connected in parallel to the...
2016/0133608 DEVICES AND STACKED MICROELECTRONIC PACKAGES WITH PACKAGE SURFACE CONDUCTORS AND METHODS OF THEIR FABRICATION
Embodiments of methods for forming a device include performing an oxidation inhibiting treatment to exposed ends of first and second device-to-edge conductors,...
2016/0133607 SEMICONDUCTOR SYSTEM
A semiconductor system may include first semiconductor device including a first pad, a second pad and a first test input pad, and suitable for storing data...
2016/0133606 SEMICONDUCTOR DEVICE INCLUDING AN EMBEDDED SURFACE MOUNT DEVICE AND METHOD OF FORMING THE SAME
Embodiments of the present disclosure include devices and methods of forming the same. An embodiment is a device including a solder resist coating over a first...
2016/0133605 SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
A semiconductor device includes a substrate, a first semiconductor package disposed on the substrate, and a second semiconductor package spaced apart from the...
2016/0133604 SEMICONDUCTOR PACKAGE
A semiconductor package includes: an upper package to which an element is mounted, and which includes a metal pad portion; a metal post connected to the metal...
2016/0133603 STACK MEMORY
A semiconductor memory is formed by stacking a plurality of substrates and memory cells on each substrate are connected by data dump lines. A switch may...
2016/0133602 Packages with Thermal Management Features for Reduced Thermal Crosstalk and Methods of Forming Same
An embodiment package includes a first die stack on a surface of a package component, a second die stack on the surface of the package component, and a contour...
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