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WAFER-LEVEL STACK CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME
A semiconductor product in the form of a stack chip package and a method of manufacturing the same, where a plurality of semiconductor chips are stacked one on...
MICROELECTRONIC ASSEMBLIES WITH INTEGRATED CIRCUITS AND INTERPOSERS WITH
CAVITIES, AND METHODS OF MANUFACTURE
Semiconductor integrated circuits (110) or assemblies are disposed at least partially in cavities between two interposers (120). Conductive vias (204M) pass...
A method of making a flat no lead package including attaching a first plurality of leads in spaced apart relationship in a predetermined pattern on a tape and...
DIRECT METAL BONDING METHOD
Method including the steps of a) Providing a first stack including a first substrate on which is deposited a first metal layer including a first metal, and a...
A semiconductor device includes: a semiconductor chip having a switching element and multiple pads electrically connected to the switching element; and...
DEBOND INTERCONNECT STRUCTURES
The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to...
ELECTRICAL APPARATUS AND METHOD FOR MANUFACTURING THE SAME
An electrical apparatus includes a first electrical component; a second electrical component; and an In--Sn--Ag alloy connecting the first electrical component...
The invention provides a semiconductor package. The semiconductor package includes a base having a device-attach surface and a solder-ball attach surface...
ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF
An electronic package is provided, which includes: an electronic element having an active surface with a plurality of electrode pads, an inactive surface...
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME
A semiconductor device according to the present invention includes a semiconductor substrate, a pad formed on the semiconductor substrate, a rewiring that is...
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device and a manufacturing method thereof, which can reduce a size of the semiconductor device. As a non-limiting example, various aspects of...
Packaged Semiconductor Die with Bumpless Die-Package Interface for
Bumpless Build-Up Layer (BBUL) Packages
A packaged semiconductor die with a bumpless die-package interface and methods of fabrication are described. For example, a semiconductor package includes a...
SILICON SPACE TRANSFORMER FOR IC PACKAGING
An apparatus includes at least a first integrated circuit (IC) and a wafer-fabricated space transformer (ST). The IC includes bonding pads of a first inter-pad...
CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
A chip package includes a chip, a laser stopper, an isolation layer, a redistribution layer, an insulating layer, and a conductive structure. The chip has a...
SUBSTRATES AND INTEGRATED CIRCUIT CHIP WITH IMPROVED PATTERN
The present invention relates to a substrate and integrated circuit chip with improved patterns, and more particularly to technology that is efficient in terms...
A semiconductor device includes a main pad part and a sub pad part formed in a peripheral area of at least one side of the main pad part. The sub pad part is...
CHIP USING TRIPLE PAD CONFIGURATION AND PACKAGING METHOD THEREOF
A chip includes a core layer, at least one redistribution layer formed on the core layer, and at least one triple pad connected to a pad of the core layer...
SEMICONDUCTOR DEVICE AND AN ELECTRONIC DEVICE
According to various embodiments, a semiconductor device may include: a contact pad; a metal clip disposed over the contact pad; and a porous metal layer...
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE THEREOF HAVING GUARD RING
In some embodiments, an integrated circuit (IC) device includes a substrate having a first functional region, a second functional region and a third functional...
DEVICE FOR DETECTING A LASER ATTACK IN AN INTEGRATED CIRCUIT CHIP
A device for detecting a laser attack made on an integrated circuit chip comprises a bipolar transistor of a first type formed in a semiconductor substrate,...
ACTIVATING REACTIONS IN INTEGRATED CIRCUITS THROUGH ELECTRICAL DISCHARGE
Embodiments of the present invention provide integrated circuits and methods for activating reactions in integrated circuits. In one embodiment, an integrated...
SCRIBE SEALS AND METHODS OF MAKING
A semiconductor die includes a plurality of layers, the plurality of layers having a top surface. A scribe seal is located in the plurality of layers and...
ELECTROMAGNETIC WAVE SHIELDING SUPPORT BASE-ATTACHED ENCAPSULANT,
ENCAPSULATED SUBSTRATE HAVING SEMICONDUTOR...
The present invention provides an electromagnetic wave shielding support base-attached encapsulant for collectively encapsulating a semiconductor device...
DESIGN RULE CLEAN LAYER MARKER
A method and apparatus for including human readable text in a semiconductor design which is both machine readable for printing on a wafer and human readable...
Wiring Structures and Methods of Forming the Same
A wiring structure includes a first insulation layer, a plurality of wiring patterns, a protection layer pattern and a second insulation layer. The first...
ULTRATHIN SUPERLATTICE OF MnO/Mn/MnN AND OTHER METAL OXIDE/METAL/METAL
NITRIDE LINERS AND CAPS FOR COPPER LOW...
An electrical device comprising including an opening in a low-k dielectric material, and a copper including structure present within the opening for...
AIR GAP STRUCTURE WITH BILAYER SELECTIVE CAP
A semiconductor substrate including one or more conductors is provided. A first layer and a second layer are deposited on the top surface of the conductors. A...
THOUGH-SUBSTRATE VIAS (TSVs) AND METHOD THEREFOR
A semiconductor device includes a semiconductor substrate having a first major surface and a second major surface opposite the first major surface. A via...
MICROSTRUCTURE OF METAL INTERCONNECT LAYER
A metal interconnect layer, a method of forming the metal interconnect layer, a method of forming a device that includes the metal interconnect layer are...
METHODS OF FORMING A PROTECTIVE LAYER ON AN INSULATING LAYER FOR
PROTECTION DURING FORMATION OF CONDUCTIVE...
One illustrative method disclosed herein includes, among other things, performing at least one etching process through an overall masking layer to define an...
INTEGRATED DEVICE PACKAGE COMPRISING SILICON BRIDGE IN AN ENCAPSULATION
Some novel features pertain to an integrated device package that includes an encapsulation portion and a redistribution portion. The encapsulation portion...
SEMICONDUCTOR DEVICE, CIRCUIT SUBSTRATE, AND ELECTRONIC DEVICE
A semiconductor device has a through electrode formed in a through hole which penetrates a Si substrate from one surface to the other surface of the Si...
SEMICONDUCTOR INTEGRATED CIRCUITS AND METHODS OF MANUFACTURING THE SAME
First and second active regions are doped with different types of impurities, and extend in a first direction and spaced apart from each other in a second...
Contact Structure for Nand Based Non-Volatile Memory Device and a Method
A NAND-based non-volatile memory contact structure includes a trench located adjacent to layered alternating conducting and insulating layers, the layers...
IO POWER BUS MESH STRUCTURE DESIGN
A MOS device includes an IO pad ring. The MOS device includes a first IO pad located on a first side of the IO pad ring, and a second IO pad located on a...
MULTI-LAYER TRANSMISSION LINE STRUCTURE FOR MISALIGNMENT RELIEF
A circuit includes a dielectric layer and a stacked inductor. A first metal line is disposed on a first side of the dielectric layer. A second metal line is...
INTEGRATED CIRCUITS INCLUDING MAGNETIC CORE INDUCTORS AND METHODS FOR
FABRICATING THE SAME
Magnetic core inductors implemented on integrated circuits and methods for fabricating such magnetic core inductors are disclosed. An exemplary magnetic core...
SEMICONDUCTOR DEVICE WITH DAMASCENE BIT LINE AND METHOD FOR FABRICATING
A semiconductor device includes a substrate having a plurality of contact surfaces, an interlayer dielectric layer formed over the substrate and having a first...
METHODS FOR THERMALLY FORMING A SELECTIVE COBALT LAYER
Methods for selectively depositing a cobalt layer are provided herein. In some embodiments, methods for selectively depositing a cobalt layer include: exposing...
SEMICONDUCTOR PACKAGE INCLUDING EMBEDDED COMPONENTS AND METHOD OF MAKING
The present disclosure relates to a semiconductor package and method of making the same. The semiconductor package includes an encapsulation layer, a component...
DUAL SIDED CIRCUIT FOR SURFACE MOUNTING
A method of forming an integrated circuit, including providing a first substrate layer having a center piece and two side pieces on opposite sides of the...
Capacitors with Barrier Dielectric Layers, and Methods of Formation
A device including a first metal feature is disposed in a first insulating layer. A second metal feature is disposed in a second insulating layer and separated...
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure includes a substrate comprising a plurality of layers formed thereon, at least a first device formed in one of the layers formed...
A power module, having a printed circuit board core, which contains at least one electronic power component embedded in an insulating layer, the core being...
OFFSET INTERPOSERS FOR LARGE-BOTTOM PACKAGES AND LARGE-DIE
An offset interposer includes a land side including land-side ball-grid array (BGA) and a package-on-package (POP) side including a POP-side BGA. The land-side...
SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF
A semiconductor package is provided, including: an insulating base body having a first surface with an opening and a second surface opposite to the first...
WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
A wiring board includes a core substrate including an insulating layer and a conductor layer formed on the insulating layer, and a build-up layer laminated on...
BALL GRID ARRAY AND LAND GRID ARRAY ASSEMBLIES FABRICATED USING TEMPORARY
Ball grid assembly (BGA) bumping solder is formed on the back side of a laminate panel within a patterned temporary resist. Processes such as singulation and...
PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
A printed circuit board includes: an insulation layer including circuit patterns, the circuit patterns having a groove formed therein; a metal protection layer...
HIGH DENSITY ORGANIC BRIDGE DEVICE AND METHOD
Embodiments that allow multi-chip interconnect using organic bridges are described. In some embodiments an organic package substrate has an embedded organic...