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Patent # Description
2016/0133551 PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF
A package structure is provided, which includes: a dielectric layer having opposite first and second surfaces; a first circuit layer embedded in the dielectric...
2016/0133550 DOUBLE-SIDED CHIP ON FILM PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF
A double-sided chip on film (COF) packaging structure and a manufacturing method thereof are disclosed. The double-sided COF structure includes a metal layer,...
2016/0133549 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device is inhibited from being degraded in reliability. The semiconductor device has a tab including a top surface, a bottom surface, and a...
2016/0133548 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
A semiconductor device, includes a die pad that has a first main surface and a second main surface located on the opposite side of the first main surface; a...
2016/0133547 SEMICONDUCTOR DIE ARRANGEMENT
A semiconductor die arrangement comprising a first die including at least one semiconductor device; a second die including at least one semiconductor device; a...
2016/0133546 METHOD OF MAKING A SEMICONDUCTOR DEVICE PACKAGE
A semiconductor device package includes a first substrate, which has a lower substrate surface and an upper substrate surface. A conductive dummy gate...
2016/0133545 SEMICONDUCTOR DEVICES HAVING THROUGH-ELECTRODES
Semiconductor devices having through-electrodes are provided. The semiconductor devices may include a substrate, a through-electrode penetrating vertically...
2016/0133544 CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
A chip package includes a chip, a laser stopper, an isolation layer, a redistribution layer, an insulating layer, and a conductive structure. The chip has a...
2016/0133543 PHASE CHANGING ON-CHIP THERMAL HEAT SINK
A method of forming an on-chip heat sink includes forming a device on a substrate. The method also includes forming a plurality of insulator layers over the...
2016/0133542 SEMICONDUCTOR PACKAGES
A semiconductor package includes a package substrate including a first region, a thermal block penetrating the first region and exposed at top and bottom...
2016/0133541 Semiconductor Device
A semiconductor device includes a wiring substrate, a semiconductor element mounted on the wiring substrate, a heat dissipation plate arranged on an upper...
2016/0133540 MULTI-LAYER PACKAGING SCHEME FOR IMPLANT ELECTRONICS
The present invention provides a micropackaged device comprising: a substrate for securing a device with a corrosion barrier affixed to the substrate, wherein...
2016/0133539 MOLD PACKAGE AND MANUFACTURING METHOD THEREOF
A mold package includes a substrate having a first surface and a second surface disposed opposite to the first surface, a wiring part disposed on the first...
2016/0133538 Packaged Semiconductor Devices and Methods of Packaging Semiconductor Devices
Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an...
2016/0133537 SEMICONDUCTOR PACKAGE WITH EMBEDDED COMPONENT AND MANUFACTURING METHOD THEREOF
The present disclosure relates to a semiconductor package and method of making the same. The semiconductor package includes an encapsulation layer, a...
2016/0133536 Semiconductor Device Packaging Methods and Structures Thereof
In some embodiments, a semiconductor device includes a first die, a second die coupled to a first surface of the first die, and a third die coupled to the...
2016/0133535 SILICON PACKAGE HAVING ELECTRICAL FUNCTIONALITY BY EMBEDDED PASSIVE COMPONENTS
A packaged electronic system comprises a slab (210) of low-grade silicon (l-g-Si) configured as ridges (114) framing a depression of depth (112) including a...
2016/0133534 SILICON PACKAGE FOR EMBEDDED SEMICONDUCTOR CHIP AND POWER CONVERTER
A packaged transistor device (100) comprises a semiconductor chip (101) including a transistor with terminals distributed on the first and the opposite second...
2016/0133533 SUBSTRATE STRUCTURES AND METHODS OF MANUFACTURE
A semiconductor package. Implementations may include a substrate including a metallic baseplate coupled with an electrically insulative layer and a plurality...
2016/0133532 PRINTED CIRCUIT BOARD
A printed wiring board includes a power supply conductor pattern arranged on one conductor layer, one ground conductor pattern arranged on the one conductor...
2016/0133531 TEST STRUCTURE FOR MONITORING LINER OXIDATION
Embodiments of a method for forming a device using test structures are presented. The method includes providing a wafer with a device layer. The device layer...
2016/0133530 PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD
A plasma processing apparatus includes a processing chamber configured to perform a plasma processing on a sample, a first radio frequency power supply...
2016/0133529 CIRCUIT AND METHOD FOR MONOLITHIC STACKED INTEGRATED CIRCUIT TESTING
A method for testing a monolithic stacked integrated circuit (IC) is provided. The method includes receiving a layer of the IC. The layer has a first surface...
2016/0133528 FORMING STRAINED FINS OF DIFFERENT MATERIAL ON A SUBSTRATE
A method, and the resulting structure, of forming two fins with different types of strain and material on the same substrate.
2016/0133527 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A first well in a first conductivity type which is formed at a first region and is electrically connected to a first power supply line, a second well in a...
2016/0133526 DEVICES HAVING INHOMOGENEOUS SILICIDE SCHOTTKY BARRIER CONTACTS
A method of fabricating Schottky barrier contacts for an integrated circuit (IC). A substrate including a silicon including surface is provided. A plurality of...
2016/0133525 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
In a method of manufacturing a semiconductor device, a first gate structure and a second gate structure are formed on a substrate in a first region and a...
2016/0133524 METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH IMPROVED ACTIVE REGIONS
Methods for fabricating integrated circuits having improved active regions are provided. In an embodiment, a method for fabricating an integrated circuit...
2016/0133523 Method For Improving Fin Isolation
A method of processing a workpiece to create a doped fin structure is disclosed. A portion of the workpiece is subjected to a pre-amorphizing implant to create...
2016/0133522 SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF
Provided are a semiconductor device and a fabricating method thereof. The fabricating method includes forming first to fourth fins, each extending in a first...
2016/0133521 Method of Manufacturing a Semiconductor Device
A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon,...
2016/0133520 METHOD OF SEVERING A SEMICONDUCTOR DEVICE COMPOSITE
A method of severing a semiconductor device composite includes a carrier having a main surface and a semiconductor layer sequence arranged on the main surface...
2016/0133519 TRANSFER ARM FOR FILM FRAME SUBSTRATE HANDLING DURING PLASMA SINGULATION OF WAFERS
Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a plasma etch...
2016/0133518 SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF
A semiconductor device includes a substrate; an inter layer dielectric disposed on the substrate; a TSV penetrating the substrate and the ILD. In addition, a...
2016/0133517 Self-Limited, Anisotropic Wet Etching of Transverse Vias in Microfluidic Chips
The present invention is notably directed to a method of fabrication of a microfluidic chip (1). comprising: providing (S10-S20) a wafer (10, 12) of...
2016/0133516 SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME AND CAMERA
A semiconductor device is provided. The device includes a substrate with a cell and a peripheral area, and an insulating layer. The insulating layer comprises...
2016/0133515 METHOD FOR COPPER PLATING THROUGH SILICON VIAS USING WET WAFER BACK CONTACT
A method and apparatus for processing a substrate are provided. In some implementations, the method comprises providing a silicon substrate having an aperture...
2016/0133514 MECHANISMS OF FORMING DAMASCENE INTERCONNECT STRUCTURES
A method of forming a conductive structure includes forming a first opening and a second opening in a dielectric layer on a substrate, wherein the first...
2016/0133513 METAL OXYSILICATE DIFFUSION BARRIERS FOR DAMASCENE METALLIZATION WITH LOW RC DELAYS AND METHODS FOR FORMING THE...
A method is disclosed to form a metal-oxysilicate diffusion barrier for a damascene metallization. A trench is formed in an Inter Layer Dielectric (ILD)...
2016/0133512 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING A PLURALITY OF ETCH STOP LAYERS
A method of manufacturing the semiconductor device includes providing a first interlayer dielectric layer having a conductive pattern, sequentially forming a...
2016/0133511 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes an interlayer insulating layer having openings, contact plugs formed in lower parts of the openings, wherein the contact plugs...
2016/0133510 METHOD OF FABRICATING INTEGRATED CIRCUIT
A method of fabricating an integrated circuit includes the following steps. A first reticle is used to form a first pattern and a first alignment mark and a...
2016/0133509 Methods and Apparatus of Metal Gate Transistors
In some embodiments, a method of manufacturing a device includes providing a first device with an isolation area, an active area next to the isolation area, a...
2016/0133508 AIR GAP STRUCTURE WITH BILAYER SELECTIVE CAP
A semiconductor substrate including one or more conductors is provided. A first layer and a second layer are deposited on the top surface of the conductors. A...
2016/0133507 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
An object of the invention is to provide a semiconductor device having improved performance. A method of manufacturing a semiconductor device includes: forming...
2016/0133506 Method of Fabricating Semiconductor Device Isolation Structure
A semiconductor device including reentrant isolation structures and a method for making such a device. A preferred embodiment comprises a substrate of...
2016/0133505 SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device including a cell region and a peripheral region formed outside the cell region, comprising the steps of (a)...
2016/0133504 SUSCEPTOR DESIGN TO REDUCE EDGE THERMAL PEAK
Implementations of the present disclosure generally relate to a susceptor for thermal processing of semiconductor substrates. In one implementation, the...
2016/0133503 SUBSTRATE GRIPPING APPARATUS
The present invention relates to a substrate gripping apparatus includes a base, a plurality of support posts which are vertically movable relative to the...
2016/0133502 WAFER TRANSFER ROBOT, METHOD OF CONTROLLING THE SAME, AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING...
A wafer transfer robot includes a robot transfer mechanism including a robot axis member and a robot arm member connected to the robot axis member, a robot...
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