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Patent # Description
2016/0133351 CONDUCTIVE PASTE FOR A SOLAR CELL ELECTRODE
The invention relates to a conductive paste composition useful in the manufacture of photovoltaic cell electrodes, especially electrodes contacting the p-type...
2016/0133350 CONDUCTIVE RESIN COMPOSITION FOR MICROWAVE HEATING
Provided is a conductive resin composition for microwave heating capable of suppressing the generation of sparks when microwave heating is performed. A...
2016/0133349 NANOSTRUCTURE, METHOD OF PREPARING THE SAME, AND PANEL UNITS COMPRISING THE NANOSTRUCTURE
Example embodiments relate to a nanostructure including a conductive region and a nonconductive region, wherein the conductive region includes at least one...
2016/0133348 METAL WIRE AND DISPLAY DEVICE INCLUDING THE SAME
Provided is a metal wire. The metal wire includes a copper layer, and at least one barrier layer. The barrier layer is disposed on at least one of an upper...
2016/0133347 VENTILATION SYSTEM OPERATING METHOD FOR USE DURING A SERIOUS INCIDENT IN A NUCLEAR PLANT
A ventilation system operating method for a service personnel-accessible operations room or control room in a nuclear plant or nuclear power plant enables a...
2016/0133346 RACK FOR UNDERWATER STORAGE OF SPENT NUCLEAR FUEL
A fuel rack for nuclear fuel assemblies includes a base plate and an array of cells for holding fuel assemblies. The array of cells includes: a plurality of...
2016/0133345 VISUAL INDICATOR AND FLUID DISPENSER
A visual indicator display device includes a bracelet, a transparent capillary chamber, and a displacement member. The transparent capillary chamber is matched...
2016/0133344 REPAIR CIRCUIT, SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME
A repair circuit includes a column repair signal generation block suitable for comparing an input address with respective first and second repair addresses in...
2016/0133343 ELECTRONIC DEVICE AND METHOD FOR OPERATING ELECTRONIC DEVICE
An electronic device comprising a semiconductor memory unit that may include a plurality of data transfer lines; a plurality of columns including a plurality...
2016/0133342 INTEGRATED CIRCUIT HAVING VOLTAGE MISMATCH REDUCTION
An integrated circuit has a first circuit portion on a first level and a second circuit portion on a second level different from the first level. The first...
2016/0133341 SIGNAL TRANSITION ANALYSIS OF A CIRCUIT
A first signal and a second signal associated with a circuit may be identified. A first count of a number of times that the second signal is associated with a...
2016/0133340 SELF-TESTING DATA STORAGE DEVICES AND METHODS
Systems and methods for self-testing archival memory devices are described. The memory device includes a data storage component capable of being coded with...
2016/0133339 TEST APPARATUS, TEST SYSTEM AND OPERATING METHOD OF TEST APPARATUS
A test system may include: a vector storage unit suitable for storing a first test vector corresponding to a first test operation; a test target suitable for...
2016/0133338 SELF-TESTING DATA STORAGE DEVICES AND METHODS
Systems and methods for self-testing archival memory devices are described. The memory device includes a data storage component capable of being coded with...
2016/0133337 SHIFT REGISTER UNIT, SHIFT REGISTER, GATE DRIVE CIRCUIT AND DISPLAY DEVICE
A shift register unit, a shift register, a gate drive circuit and a display device, the shift register unit, comprising: an input module; an output module...
2016/0133336 SHIFT REGISTER CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME
A shift register circuit may include a first latch capable of latching an input signal in synchronization with a first clock, a first flip-flop capable of...
2016/0133335 SEMICONDUCTOR DEVICE CAPABLE OF RESCUING DEFECTIVE CHARACTERISTICS OCCURRING AFTER PACKAGING
A memory device capable of rescuing defective characteristics that occur after packaging includes a memory cell array including a plurality of memory cells and...
2016/0133334 READ-THRESHOLD CALIBRATION IN A SOLID STATE STORAGE SYSTEM
A read-threshold calibration method in a solid state storage system including measuring a threshold voltage distribution of solid state storage elements;...
2016/0133333 OPTIMAL READ THRESHOLD ESTIMATION
An optimal read threshold estimation method includes determining a flip difference corresponding to an optimal step size .DELTA..sub.opt, estimating a first...
2016/0133332 RANDOM TELEGRAPH SIGNAL NOISE REDUCTION SCHEME FOR SEMICONDUCTOR MEMORIES
Embodiments are provided that include a method including providing a first voltage to a memory cell prior to an operation, wherein a magnitude of the first...
2016/0133331 METHOD OF ERASING INFORMATION AND DEVICE FOR PERFORMING SAME
Methods and devices for erasing information stored on an electronic semiconductor component in a plurality of non-volatile memory elements are described....
2016/0133330 NONVOLATILE MEMORY DEVICE AND AN ERASING METHOD THEREOF
An erase method of a nonvolatile memory device includes applying an erase voltage to a substrate; sensing a temperature of a memory cell array; setting a delay...
2016/0133329 OPERATING METHOD FOR NONVOLATILE MEMORY AND OPERATING METHOD FOR STORAGE DEVICE INCLUDING THE NONVOLATILE MEMORY
An operation method of a storage device including a nonvolatile memory and a memory controller controlling the nonvolatile memory, includes transmitting a...
2016/0133328 SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SAME
A method of operating the semiconductor device includes performing an erase operation on a plurality of memory cells, performing a back-tunneling operation by...
2016/0133327 MEMORY DEVICES AND BIASING METHODS FOR MEMORY DEVICES
Methods of biasing in memory devices facilitate memory device programming operations. In at least one embodiment, a first string of memory cells comprising a...
2016/0133326 APPARATUSES AND METHODS FOR NON-VOLATILE MEMORY PROGRAMMING SCHEMES
Apparatuses and methods for a non-volatile memory scheme are described herein. An example apparatus may include a memory block including a plurality of...
2016/0133325 LOW FORMING VOLTAGE NON-VOLATILE STORAGE DEVICE
A three-dimensional array of memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across...
2016/0133324 SHAPED DATA ASSOCIATED WITH AN ERASE OPERATION
A method includes, in a data storage device including a resistive memory, receiving an erase command to erase a portion of the resistive memory. The method...
2016/0133323 MEMORY DEVICE AND METHOD OF OPERATING THE SAME
A method is for operating a memory device including a plurality of memory cells disposed in regions where a plurality of first signal lines and a plurality of...
2016/0133322 DISTURB CONDITION DETECTION FOR A RESISTIVE RANDOM ACCESS MEMORY
A data storage device includes a memory die. The memory die includes a resistive random access memory (ReRAM) having a first portion and a second portion that...
2016/0133321 Memory Devices and Related Methods
A resistive memory device. Implementations may include an array of memory cells including resistive memory elements which are coupled to isolation transistors...
2016/0133320 SENSE AMPLIFIER INCLUDING A SINGLE-TRANSISTOR AMPLIFIER AND LEVEL SHIFTER AND METHODS THEREFOR
Methods are provided for use with a memory array that includes a selected memory cell coupled to a selected word line and a selected bit line, with the...
2016/0133319 APPARATUSES AND METHODS FOR ACCESSING VARIABLE RESISTANCE MEMORY DEVICE
The disclosed technology generally relates to memory apparatuses and methods of operating the same, and more particularly to a memory device having a...
2016/0133318 HIGH-SPEED READABLE SEMICONDUCTOR STORAGE DEVICE
According to one embodiment, a semiconductor storage device includes a memory cell array and a controller. The memory cell array includes a first memory cell,...
2016/0133317 NEUROMORPHIC DEVICE WITH EXCITATORY AND INHIBITORY FUNCTIONALITIES
Provided is a neuromorphic device including first and second lower electrodes formed on a substrate to be electrically separated, first and second lower...
2016/0133316 TRACKING CELL AND METHOD
A circuit includes a first power node that receives a first operational voltage having a first operational voltage level and a second power node that receives...
2016/0133315 SEMICONDUCTOR DEVICE
A semiconductor device with a memory unit of which the variations in the operation timing are reduced is provided. For example, the semiconductor device is...
2016/0133314 SEMICONDUCTOR MEMORY DEVICES, MEMORY SYSTEMS INCLUDING THE SAME, AND METHODS OF OPERATING MEMORY SYSTEMS
A semiconductor memory device includes a memory cell array and a refresh control circuit. The memory cell array includes a plurality of memory cell rows. The...
2016/0133313 SEMICONDUCTOR MEMORY AND METHOD FOR OPERATING THE SAME
A semiconductor memory may include: a storage unit suitable for storing a minimum operation interval between row command operations, a detection unit suitable...
2016/0133312 STACK SEMICONDUCTOR DEVICE AND MEMORY DEVICE INCLUDING SAME
A memory device including a stack semiconductor device including; an upper substrate vertically stacked on a lower substrate, the upper substrate including N...
2016/0133311 SEMICONDUCTOR DEVICE AND METHOD OF DRIVING THE SAME
A semiconductor device may include a common coupling block suitable for coupling a plurality of first data lines to a plurality of second data lines in...
2016/0133310 APPARATUSES AND METHODS TO PERFORM POST PACKAGE TRIM
Memory die can be stacked to form a three-dimensional integrated circuit. For example, through-silicon vias (TSVs) can permit signals to pass vertically...
2016/0133309 CIRCUITS AND METHODS FOR DQS AUTOGATING
In one aspect, a method includes receiving a differential strobe signal including first and second components; buffering, by a first buffer, both the first and...
2016/0133308 RESISTANCE CHANGE MEMORY
A resistance change memory includes a memory cell array comprising memory cells including magnetic tunnel junction (MTJ) elements; a write and read circuit...
2016/0133307 MAGNETIC MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
A magnetic memory device includes a reference magnetic pattern having a magnetization direction fixed in one direction, a free magnetic pattern having a...
2016/0133306 MEMORY DEVICE HAVING AN ADAPTABLE NUMBER OF OPEN ROWS
A memory device comprises a memory array, at least one row address buffer, a set of row data buffers, a row decoder, an array of sense amplifiers, and a...
2016/0133305 CALIBRATION IN A CONTROL DEVICE RECEIVING FROM A SOURCE SYNCHRONOUS INTERFACE
In an example, a control device includes a data path, a clock path, a multiplexing circuit, and a calibration unit. The data path comprises a data delay unit...
2016/0133304 CALIBRATION MEMORY CONTROL METHOD AND APPARATUS OF ELECTRONIC CONTROL UNIT
A calibration memory control method of an ECU connected to an external calibration device may include receiving a download command from the external...
2016/0133303 DOPED METAL-INSULATOR-TRANSITION LATCH CIRCUITRY
Some embodiments of the present invention may include one, or more, of the following features, characteristics or advantages: (i) latch device including...
2016/0133302 NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME
A nonvolatile memory device may include a power-on reset signal generation unit suitable for receiving a power supply voltage, and generating a power-on reset...
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