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SUPER JUNCTION FIELD EFFECT TRANSISTOR WITH INTERNAL FLOATING RING
A Super Junction Field Effect Transistor (FET) device includes a charge compensation region disposed on a substrate of semiconductor material. The charge...
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device is provided, the method including forming a first gate member on a semiconductor substrate through a gate...
Semiconductor to Metal Transition
A semiconductor device includes a diffusion barrier layer, a first semiconductor region having first charge carriers of a first conductivity type and a second...
Semiconductor Field Plate for Compound Semiconductor Devices
A transistor includes a source, a drain spaced apart from the source, and a heterostructure body having a two-dimensional charge carrier gas channel for...
STRUCTURE FOR A GALLIUM NITRIDE (GaN) HIGH ELECTRON MOBILITY TRANSISTOR
A high-electron mobility transistor (HEMT) device employing a gate protection layer is provided. A substrate has a channel layer arranged over the substrate...
Semiconductor Device and Insulated Gate Bipolar Transistor with Transistor
Cells and Sensor Cell
A transistor cell region of a semiconductor device includes transistor cells that are electrically connected to a first load electrode. An idle region includes...
A semiconductor substrate is provided with a first cell region, the first cell region including: an n-type emitter region; a p-type first top body region; an...
A semiconductor device has emitter regions disposed in at least one cell region in a first inter-trench region, not disposed in a middle inter-trench region,...
A semiconductor device is configured such that the distance between the trench gate in the IGBT and the trench gate in the diode is reduced or a p-well layer...
Method for Forming a Semiconductor Device and a Semiconductor Device
A method for forming a semiconductor device comprises implanting a defined dose of protons into a semiconductor substrate and tempering the semiconductor...
TUNNEL FIELD-EFFECT TRANSISTOR (TFET) WITH SUPERSTEEP SUB-THRESHOLD SWING
Technologies are generally described herein generally relate to tunnel field-effect transistor (TFETs) structures with a gate-on-germanium source (GoGeS) on...
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device including a transistor having a reduced number of oxygen vacancies in a channel formation region of an oxide semiconductor with stable...
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
To provide a semiconductor device having a nonvolatile memory improved in characteristics. In the semiconductor device, a nonvolatile memory has a high-k...
SiGe and Si FinFET Structures and Methods for Making the Same
FinFET structures and methods for making the same. A method includes: creating a plurality of Silicon fins on a first region of a substrate, creating a...
SEMICONDUCTOR DEVICE AND METHOD OF MAKING
A semiconductor device is provided. The semiconductor device includes a channel region disposed between a source region and a drain region, a gate structure...
A method includes forming a plurality of fins in a semiconductor substrate using a common patterning process. A conductive layer is formed above the plurality...
METHODS OF MANUFACTURING FINFET SEMICONDUCTOR DEVICES USING SACRIFICIAL
GATE PATTERNS AND SELECTIVE OXIDIZATION...
A method of manufacturing a semiconductor device includes patterning a substrate to form an active fin, forming a sacrificial gate pattern crossing over the...
Method for Reducing Contact Resistance in MOS
A method for growing a III-V semiconductor structure on a Si.sub.nGe.sub.1-n substrate, wherein n is from 0 to 1 is provided. The method includes the steps of:...
METHOD FOR MANUFACTURING DISPLAY PANEL
A method for manufacturing display panel is disclosed, which comprises: (A) providing a substrate, an oxide semiconductor layer disposed on the substrate, and...
Radiation Hardened MOS Devices and Methods of Fabrication
Radiation hardened NMOS devices suitable for application in NMOS, CMOS, or BiCMOS integrated circuits, and methods for fabricating them. A device includes a...
METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING MASKS HAVING VARYING
In a method, a dummy gate layer structure and a mask layer are formed on a substrate. The mask layer is patterned to form masks. Spacers are formed on...
FIN SHAPED STRUCTURE AND METHOD OF FORMING THE SAME
A fin shaped structure and a method of forming the same, wherein the method includes forming a fin structure on a substrate. Next, an insulation layer is...
METHOD FOR FORMING SEMICONDUCTOR DEVICE WITH LOW SEALING LOSS
A method for forming a semiconductor device, includes steps of: providing a substrate; forming a first seal layer over the substrate; forming a second seal...
METHOD OF MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE
A method of manufacturing a nitride semiconductor device includes: forming a transistor having a gate electrode Schottky-joined to a nitride semiconductor...
MASK-LESS DUAL SILICIDE PROCESS
A method of forming a semiconductor device is provided. The method includes forming a mask layer, such as an oxidized layer, over first source/drain regions in...
INTERLAYER DIELECTRIC LAYER WITH TWO TENSILE DIELECTRIC LAYERS
A semiconductor device is disclosed. The semiconductor device includes: a substrate; a first tensile dielectric layer on the substrate; a metal gate in the...
Fabrication of Nanoscale Vacuum Grid and Electrode Structure With High
Aspect Ratio Dielectric Spacers Between...
Some embodiments of vacuum electronics call for a grid that is fabricated in close proximity to an electrode, where, for example, the grid and electrode are...
SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME
Semiconductor devices and methods for fabricating the same are provided. The semiconductor devices include a fin active pattern formed to project from a...
Method for Manufacturing a Semiconductor Device, and Semiconductor Device
A method of manufacturing a semiconductor device includes providing a semiconductor substrate having a main surface and a gate electrode which is within a...
INTEGRATED CIRCUITS WITH MIDDLE OF LINE CAPACITANCE REDUCTION IN
SELF-ALIGNED CONTACT PROCESS FLOW AND...
Devices and methods for forming semiconductor devices with middle of line capacitance reduction in self-aligned contact process flow and fabrication are...
THIN FILM TRANSISTOR SUBSTRATE
A thin film transistor includes a gate electrode, a semiconductor layer, and source and drain electrodes contacting the semiconductor layer. The source and...
LOW TEMPERATURE SPACER FOR ADVANCED SEMICONDUCTOR DEVICES
Embodiments of the present invention provide semiconductor structures and methods for making the same that include a boron nitride (BN) spacer on a gate stack,...
Vertical Semiconductor Device and Method for Manufacturing Therefor
A vertical semiconductor device includes a semiconductor body having a front side, a backside arranged opposite to the front side and a lateral edge delimiting...
Field Plates on Two Opposed Surfaces of Double-Base Bidirectional Bipolar
Transistor: Devices, Methods, and Systems
Dual-base two-sided bipolar power transistors which use an insulated field plate to separate the emitter/collector diffusions from the nearest base contact...
ASPECT RATIO TRAPPING AND LATTICE ENGINEERING FOR III/V SEMICONDUCTORS
A method of forming a semiconductor structure. The method may include; forming a hardmask on a strained semiconductor, the strained semiconductor is on a...
SEMICONDUCTOR DEVICES INCLUDING FIELD EFFECT TRANSISTORS AND METHODS OF
FORMING THE SAME
A semiconductor device includes an active pattern provided on a substrate and a gate electrode crossing over the active pattern. The active pattern includes a...
Ga2O3 SEMICONDUCTOR ELEMENT
Provided is a Ga.sub.2O.sub.3-based semiconductor element having less leak current and a large on/off ratio. In one embodiment, provided is a ...
SILICON CARBIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
In order to provide a high-performance and reliable silicon carbide semiconductor device, in a silicon carbide semiconductor device including an n-type SiC...
HIGH ASPECT RATIO TRAPPING SEMICONDUCTOR WITH UNIFORM HEIGHT AND ISOLATED
FROM BULK SUBSTRATE
A semiconductor structure having an isolated device region separated from channel defects formed during Aspect Ratio Trapping (ART). The structure includes: an...
SEMICONDUCTOR AND METHOD OF FABRICATING THE SAME
Provided is a semiconductor and method of manufacturing the same, and a method of forming even doping concentration of respective semiconductor device when...
TALL STRAINED HIGH PERCENTAGE SILICON-GERMANIUM FINS
The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming one or more tall strained silicon...
SEMICONDUCTOR DEVICES INCLUDING CHANNEL DOPANT LAYER
A semiconductor device includes a semiconductor substrate including a well dopant layer having a first conductivity type, a gate electrode on the well dopant...
Field Effect Transistors and Methods of Forming Same
Semiconductor devices and methods of forming the same are provided. A first gate stack is formed over a substrate, wherein the first gate stack comprises a...
GATE-ALL-AROUND FIN DEVICE
A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a...
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
Provided is a semiconductor device comprising: a first conductivity type base layer having a MOS gate structure formed on its front surface side; a second...
METHOD OF IMPROVING LATERAL BJT CHARACTERISTICS IN BCD TECHNOLOGY
In a lateral BJT formed using a BiCMOS process, the collector-to-emitter breakdown voltage (BV.sub.CEO) and BJT's gain, are improved by forming a graded...
OUTPUT CAPACITANCE REDUCTION IN POWER TRANSISTORS
Technologies are described for reduction of an output capacitance of a transistor. In some examples, spacing of source-to-drain metallization may be increased...
NANOWIRE MOSFET WITH SUPPORT STRUCTURES FOR SOURCE AND DRAIN
Transistor devices and methods for forming transistor devices are provided. A transistor device includes a semiconductor substrate and a device layer. The...
III-V SEMICONDUCTOR DEVICES WITH SELECTIVE OXIDATION
Embodiments of the present invention provide methods for fabricating a semiconductor device with selective oxidation. One method may include providing a...
SEMICONDUCTOR STRUCTURE WITH SILICON OXIDE LAYER HAVING A TOP SURFACE IN
THE SHAPE OF CONTINUOUS HILLS AND...
A semiconductor structure is provided. The semiconductor structure includes a substrate, a silicon oxide layer disposed on the substrate, and at least part of...