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By applying an AC pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. However, in a case...
ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
A method of manufacturing an array substrate includes applying a first color filter and a second color filter over a first and second pixel regions...
METHOD FOR MANUFACTURING ARRAY SUBSTRATE, ARRAY SUBSTRATE THEREOR AND
The present disclosure provides a method for manufacturing an array substrate, an array substrate and a display device. The method includes: forming a gate...
ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE
An array substrate comprises a TFT, a data line, a gate line and a passivation layer covering the TFT, the data line and the gate line. The array substrate...
METHOD TO MATCH SOI TRANSISTORS USING A LOCAL HEATER ELEMENT
An integrated circuit with a matched transistor pair with a matching resistance heater coupled to each transistor of the matched transistor pair. A method for...
SEMICONDUCTOR MEMORY DEVICE
According to an embodiment, a semiconductor memory device comprises: a semiconductor substrate; a memory cell array configured having a plurality of memory...
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes stacked groups each including interlayer insulating patterns and conductive patterns and stacked in at least two tiers, wherein...
THREE DIMENSIONAL NON-VOLATILE MEMORY WITH SEPARATE SOURCE LINES
A three dimensional stacked non-volatile memory device comprises alternating dielectric layers and conductive layers in a stack, a plurality of bit lines below...
THREE-DIMENSIONAL MEMORY AND METHOD FOR MANUFACTURING THE SAME
A three-dimensional (3D) memory and a method for manufacturing the same are disclosed. According to one embodiment, the 3D memory comprises a thin-film...
VERTICAL AND 3D MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME
A memory device is described, which includes a block of memory cells comprising a plurality of stacks of horizontal active lines such as NAND string channel...
STI RECESS METHOD TO EMBED NVM MEMORY IN HKMG REPLACEMENT GATE TECHNOLOGY
The present disclosure relates to a structure and method for reducing contact over-etching and high contact resistance (Rc) on an embedded flash memory HKMG...
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
In one embodiment, a semiconductor device includes a substrate, and first to fourth interconnects provided on the substrate to be adjacent to one another. The...
RELIABLE NON-VOLATILE MEMORY DEVICE
Device and method for forming a device are disclosed. The method includes providing a substrate prepared with a memoir), cell region. At least first and second...
ONE TIME PROGRAMMABLE MEMORY CELL AND METHOD FOR PROGRAMMING AND READING A
MEMORY ARRAY COMPRISING THE SAME
A one time programmable (OTP) memory cell includes a select gate transistor, a following gate transistor, and an antifuse varactor. The select gate transistor...
THREE-DIMENSIONAL MEMORY STRUCTURE WITH MULTI-COMPONENT CONTACT VIA
STRUCTURE AND METHOD OF MAKING THEREOF
A contact via structure can include a ruthenium portion formed by selective deposition of ruthenium on a semiconductor surface at the bottom of a contact...
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, a semiconductor memory device includes a memory cell; and a peripheral transistor. The memory cell includes a first channel, a...
CMOS Gate Stack Structures and Processes
A semiconductor device includes a substrate having a semiconducting surface having formed therein a first active region and a second active region, where the...
METAL SEGMENTS AS LANDING PADS AND LOCAL INTERCONNECTS IN AN IC DEVICE
Methods for utilizing metal segments of an additional metal layer as landing pads for vias and also as local interconnects between contacts in an IC device and...
METHOD OF FORMING A MEMORY CAPACITOR STRUCTURE USING A SELF-ASSEMBLY
A capacitor structure and method of forming thereof on a substrate is described. The capacitor structure includes a substrate having a plurality of capacitor...
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
To provide a semiconductor device having improved reliability. An element isolation region comprised mainly of silicon oxide is buried in a trench formed in a...
FIN SHAPE STRUCTURE
A fin shaped structure and a method of forming the same. The method includes providing a substrate having a first fin structure and a second fin structure....
ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT, STRUCTURE AND METHOD OF MAKING
An ESD structure, including a first conductive type substrate, a second conductive type well region in the substrate, first/second doped regions (the first...
Carrier For An Optoelectronic Semiconductor Chip And Optoelectronic
A carrier (1) for an optoelectronic semiconductor chip comprising: (2) base body (10), which comprises a first main surface (10a) and a second main surface...
ELECTROSTATIC DISCHARGE (ESD) PROTECTION DEVICE
An electrostatic discharge (ESD) protection device includes a semiconductor substrate and a pair of first well regions formed in the semiconductor substrate,...
A transistor (2) is provided on a semiconductor substrate (8). A temperature detection diode (4) for monitoring temperature of an upper surface of the...
INTEGRATED THINFILM RESISTOR AND MIM CAPACITOR WITH A LOW SERIAL
An electronic device comprising a semiconductor structure having a back end capacitor and a back end thin film resistor and a method of manufacturing the same....
METHOD OF FABRICATING MULTI-SUBSTRATE SEMICONDUCTOR DEVICES
A first insulating layer is formed on a substrate. An opening is formed in the first insulating layer. A barrier layer is formed on the first insulating layer...
FABRICATION METHOD OF SEMICONDUCTOR PACKAGE HAVING EMBEDDED SEMICONDUCTOR
A semiconductor package is disclosed, which includes: a carrier having at least an opening; a plurality of conductive traces formed on the carrier and in the...
Device-Embedded Image Sensor, And Wafer-Level Method For Fabricating Same
A device-embedded image sensor includes an image sensor formed in a first semiconductor substrate; a top conductive pad formed on a top surface of the first...
METHODS FOR PERFORMING EXTENDED WAFER-LEVEL PACKAGING (eWLP) AND eWLP
DEVICES MADE BY THE METHODS
Embedded Wafer-Level Packaging (eWLP) devices, packages and assemblies and methods of making them are provided. The eWLP methods allow back side electrical...
LIGHT EMITTING DEVICE
A light emitting device includes a substrate, a plurality of micro light emitting chips and a plurality of conductive bumps. The substrate has a plurality of...
ARRANGEMENT AND METHOD FOR GENERATING MIXED LIGHT
The invention relates to an arrangement for generating mixed light, which comprises three semiconductor chips, emitting in the blue spectral range, of three...
LIGHT-EMITTING STRUCTURE FOR PROVIDING PREDETERMINED WHITENESS
A light-emitting structure for providing a predetermined whiteness includes a substrate and a light-emitting unit. The light-emitting unit includes a plurality...
SEMICONDUCTOR POWER MODULE USING DISCRETE SEMICONDUCTOR COMPONENTS
An electronic power module is disclosed. The module includes a baseplate and a plurality of internally isolated discrete electronic devices mounted to the...
NOVEL SEMICONDUCTOR DEVICE AND STRUCTURE
An Integrated Circuit device, including: a base wafer including single crystal, the base wafer including a plurality of first transistors; at least one metal...
This semiconductor device is formed by stacking a plurality of semiconductor chips that each have a plurality of bump electrodes, each of the plurality of...
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
A semiconductor device which is provided with: a wiring substrate which has a first region, and a relay pad and a connection pad that are arranged outside the...
SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME
A semiconductor package including a lower package and an upper package provided may be provided. The lower package includes a lower package substrate, a lower...
STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH IMPROVED THERMAL PERFORMANCE AND
ASSOCIATED SYSTEMS AND METHODS
Stacked semiconductor die assemblies with improved thermal performance and associated systems and methods are disclosed herein. In one embodiment, a...
MULTI-CHIP SEMICONDUCTOR DEVICE
A multi-chip semiconductor device includes a plate-shaped first semiconductor chip having a first connection portion in which a first semiconductor chip...
METHOD FOR MANUFACTURING SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR
A method for manufacturing a semiconductor-apparatus, including an encapsulating step of a device mounting surface of a substrate having semiconductor-devices...
SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND
There is provided a semiconductor device, including a semiconductor substrate, an interlayer insulating layer formed on the semiconductor substrate, a bonding...
METHOD OF BONDING WITH SILVER PASTE
A method for bonding with a silver paste includes coating a semiconductor device or a substrate with the silver paste. The silver paste contains a plurality of...
BUMPLESS BUILD-UP LAYER PACKAGE INCLUDING A RELEASE LAYER
An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die...
FLIP-CHIP BONDER WITH INDUCTION COILS
A method and apparatus for flip chip bonding using conductive and inductive heating to heat a plurality of solder bumps located between a chip carrier and a chip.
SEMICONDUCTOR DEVICE INCLUDING BUILT-IN CRACK-ARRESTING FILM STRUCTURE
According to at least one embodiment of the present invention, a wafer-to-wafer semiconductor device includes a first wafer substrate having a first bonding...
REDISTRIBUTION FILM FOR IC PACKAGE
A redistribution film for IC package is disclosed, which comprises a top redistribution layer configured on top of a bottom redistribution layer. The top...
Ball Amount Process in the Manufacturing of Integrated Circuit
An integrated circuit structure includes a semiconductor substrate, a metal pad over the semiconductor substrate, a passivation layer including a portion over...
PRE-PACKAGE AND METHODS OF MANUFACTURING SEMICONDUCTOR PACKAGE AND
ELECTRONIC DEVICE USING THE SAME
Methods of fabricating semiconductor packages are provided. One of the methods includes forming a protection layer including metal on a first surface of a...
Method of forming a bondpad and bondpad
Various embodiments provide a method of forming a bondpad, wherein the method comprises providing a raw bondpad, and forming a recess structure at a contact...