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| Patent # | Description |
|---|---|
| 2016/0149612 |
METHODS AND SYSTEMS FOR DETECTION AND ANALYSIS OF ABNORMALITIES IN A POWER
LINE COMMUNICATION NETWORK OF A VEHICLE Methods and systems are provided for detection and analysis of abnormalities in a power line communication network of a vehicle. The vehicle includes various... |
| 2016/0149611 |
INTERCONNECT ARRAY PATTERN WITH A 3:1 SIGNAL-TO-GROUND RATIO An electronic device including a plurality of interconnects are orthogonally arranged in a grid pattern and evenly spaced by a first distance, the plurality of... |
| 2016/0149610 |
TIME SYNCHRONIZATION SYSTEM A time synchronization system includes a clock supply apparatus that includes an oscillator and generates a first time signal; and a time synchronization... |
| 2016/0149609 |
WIRELESS TRANSMISSION SYSTEM, WIRELESS COMMUNICATION DEVICE, AND WIRELESS
COMMUNICATION METHOD A wireless transmission system includes: a communication unit for transmission; and a communication unit for reception. The communication units for... |
| 2016/0149608 |
Protective case for electronic device A protective case for an electronic device contains a first covering part and a second covering part which are connected together to define a hollow... |
| 2016/0149607 |
PROTECTION CASE FOR MOBILE COMMUNICATION DEVICE A protection case for a mobile communication device includes a main body for receiving the mobile communication device, a main circuit board with an amplifier... |
| 2016/0149606 |
PROTECTION DEVICE AND PROTECTION METHOD Method of protecting a device using a protection device is provided. The protection device includes a water pressure sensor, a visibility sensor, an airbag,... |
| 2016/0149605 |
SUBSCRIBER IDENTITY MODULE (SIM) SELECTION IN MULTI-SIM COMMUNICATION
DEVICES A method relates to identifying, by a processing device, a plurality of subscriber identity modules (SIMs) coupled to the processing device, each of the... |
| 2016/0149604 |
Image Rejection Calibration With A Passive Network In one aspect, an apparatus includes: a mixer to receive a radio frequency (RF) signal and downconvert the RF signal into a second frequency signal; an... |
| 2016/0149603 |
RADIO RECEPTION CIRCUIT, RADIO RECEPTION METHOD, AND RADIO RECEPTION
PROGRAM A radio reception circuit that allows for preventing the S/N ratio from being degraded due to the spurious of high-output adjacent channel signals, comprises:... |
| 2016/0149602 |
ACCURATE DESENSITIZATION ESTIMATION OF A RECEIVER Described herein are technologies related to an implementation of de-sensitization estimation in a receiver of a portable device. |
| 2016/0149601 |
WIRELESS POWER RECEIVER DEVICE AND WIRELESS COMMUNICATIONS DEVICE A wireless power receiver device capable of performing wireless power reception includes a processor and a communications module. The processor determines a... |
| 2016/0149600 |
METHOD FOR REDUCING THE CREST FACTOR WIDE BAND SIGNAL A method for reducing the crest factor of a wideband signal including N narrowband signals, N being a natural integer greater than or equal to two, the method,... |
| 2016/0149599 |
Communication-Satellite System That Causes Reduced Interference A system of low-orbiting communication satellites that can share radio spectrum with geostationary satellites and methods mitigating interference to enable... |
| 2016/0149598 |
APPARATUS FOR CONVERTING FREQUENCY AND RF TRANSMITTER COMPRISING SAME Disclosed is an apparatus for converting a frequency. The apparatus includes: an oscillator configured to generate a first oscillation signal having a first... |
| 2016/0149597 |
ELECTRONIC APPARATUS According to one embodiment, an electronic apparatus includes a first unit and circuitry. The first unit includes first and second sensors and a wireless... |
| 2016/0149596 |
TURBO DECODER WITH A LOW-POWER INPUT FORMAT AND ASSOCIATED METHOD A turbo decoder stores received data in words in systematic memory and parity memory in a way that is known that it will be used for later iterations by turbo... |
| 2016/0149595 |
FORWARD ERROR CORRECTION SYNCHRONIZATION Techniques for forward error correction synchronization are described herein. The techniques include receiving a bit stream over a transmission link and... |
| 2016/0149594 |
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD A data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code.... |
| 2016/0149593 |
APPARATUS AND METHOD FOR SENDING AND RECEIVING BROADCAST SIGNALS A broadcast signal transmitter is disclosed. A broadcast signal transmitter according to the present invention comprises a scrambler for scrambling signaling... |
| 2016/0149592 |
APPARATUS AND METHOD FOR TURBO PRODUCT CODES An apparatus for a turbo product codes includes a codeword generator and an interleaver. The codeword generator receives a data in a matrix, and generate a... |
| 2016/0149591 |
TURBO DECODERS WITH STORED COLUMN INDEXES FOR INTERLEAVER ADDRESS
GENERATION AND OUT-OF-BOUNDS DETECTION AND... A turbo decoder decodes encoded data using a regenerated interleaver sequence. An addressable column index memory stores column indexes of the encoded data... |
| 2016/0149590 |
LENGTH AND RATE COMPATIBLE LDPC ENCODER AND DECODER A method and apparatus for encoding data and for decoding data using LDPC (low density parity check) codes includes providing a mother LDPC matrix of a... |
| 2016/0149589 |
DATA PROCESSING DEVICE AND DATA PROCESSING METHOD The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data... |
| 2016/0149588 |
ENTROPY ENCODING AND DECODING SCHEME Decomposing a value range of the respective syntax elements into a sequence of n partitions with coding the components of z laying within the respective... |
| 2016/0149587 |
EFFICIENT DECODER FOR CURRENT-STEERING DIGITAL-TO-ANALOG CONVERTER A decoder for a current-steering digital-to-analog converter (DAC) is described herein. In an embodiment, the decoder is a dynamic element matching (DEM)... |
| 2016/0149586 |
DELTA-SIGMA MODULATOR HAVING DIFFERENTIAL OUTPUT Provided is a delta-sigma modulator having a differential output, the modulator including a switched-capacitor integrator configured to generate a non-inverted... |
| 2016/0149585 |
DELTA SIGMA MODULATOR A .DELTA..SIGMA. modulator converts an input analog quantity into a digital value quantized with a predetermined number of bits and outputs the digital value.... |
| 2016/0149584 |
Interpolator Systems and Methods A digital to time converter is disclosed and includes a code logic and an interpolator. The code logic is configured to receive a first phase signal and a... |
| 2016/0149583 |
METHOD OF CALIBRATING A SAR A/D CONVERTER AND SAR-A/D CONVERTER
IMPLEMENTING SAID METHOD The present disclosure relates to a method of self-calibration of a successive approximation register-analog-to-digital converter. The method includes... |
| 2016/0149582 |
Background Calibration of Time-Interleaved Analog-to-Digital Converters A robust and fast background calibration technique for correction of time-interleaved ADC offset, gain, bandwidth, and timing mismatches is proposed. The... |
| 2016/0149581 |
CLOCK GENERATOR A clock generator receives first and second clock signals, and input representing a desired frequency ratio. A comparison is made between frequencies of an... |
| 2016/0149580 |
System and Method for Managing Pipelines in Reconfigurable Integrated
Circuit Architectures A reconfigurable logic array(RLA) uses pipeline control methods. A do-not-end step signal is communicated to a controller in response to a backpressure... |
| 2016/0149579 |
VOLTAGE LEVEL SHIFTER CIRCUIT Embodiments include apparatuses, methods, and systems for voltage level shifting a data signal between a low voltage domain and a high voltage domain. In... |
| 2016/0149578 |
LOW VOLTAGE DIFFERENTIAL SIGNALING (LVDS) DRIVING CIRCUIT An LVDS (Low Voltage Differential Signaling) driving circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a first... |
| 2016/0149577 |
DIFFERENTIAL DRIVER CIRCUIT HAVING BIAS EQUALIZING PRE-DRIVERS A differential driver circuit includes a differential driver configured to drive an output signal based upon a positive leg pull up signal, a positive leg pull... |
| 2016/0149576 |
LOW VOLTAGE DIFFERENTIAL SIGNALING (LVDS) DRIVING CIRCUIT An LVDS (Low Voltage Differential Signaling) driving circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a first... |
| 2016/0149575 |
BUFFER CIRCUIT AND OPERATION METHOD THEREOF A buffer circuit includes an amplification unit suitable for sensing and amplifying an input signal and a reference voltage, a buffer enable unit suitable for... |
| 2016/0149574 |
Temperature Compensation Circuit, Temperature Compensation Method and
Liquid Crystal Display Disclosed are a temperature compensation circuit for a display panel, a temperature compensation method and a liquid crystal display. The temperature... |
| 2016/0149573 |
LOGIC CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING LOGIC CIRCUIT A logic circuit that can retain a state even without power supply is provided. The logic circuit includes a first circuit, a pair of retention circuits, and a... |
| 2016/0149572 |
METHOD FOR FORMING METAL MESH PATTERN AND TOUCH PANEL A method for forming a metal mesh pattern is provided. The method includes the operations below. First, at least one pitch of each of mesh base units of a mesh... |
| 2016/0149571 |
TOUCH- AND/OR PROXIMITY-SENSITIVE INPUT DEVICE, AND HOUSEHOLD APPLIANCE
HAVING THE INPUT DEVICE A touch- and/or proximity-sensitive input device has a cover plate with a control section. The side of the control section facing a user forms a control field... |
| 2016/0149570 |
POWER CIRCUIT AND ELECTRONIC DEVICE UTILIZING THE SAME A power circuit for an electronic device includes an input terminal, an output terminal, a voltage transform unit, and a control unit. The control unit... |
| 2016/0149569 |
A GATE DRIVE CIRCUIT AND A METHOD FOR SETTING UP A GATE DRIVE CIRCUIT A gate drive circuit includes a first switch and a first capacitor. A first terminal of the first capacitor is electrically coupled to the first switch. The... |
| 2016/0149568 |
PASS SWITCH CIRCUIT WITH IMPROVED TIME RESPONSE CHARACTERISTICS AND METHOD
OF CONTROLLING SAME A pass switch circuit for transferring the voltage of an input node to an output node and a method of controlling the pass switch circuit are disclosed herein.... |
| 2016/0149567 |
SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE In a configuration including a first circuit for retaining a plurality of analog voltages and a second circuit capable of reading one of the analog voltages as... |
| 2016/0149566 |
Devices, Methods and Computer Readable Storage Media Storing Instructions
for Generating Pulse Signals Devices, methods, and computer-readable storage media relate to generating a voltage according to a bit pattern. The device may include a memory storing a... |
| 2016/0149565 |
SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF A semiconductor device may include: a variable delay circuit configured to delay a data strobe signal according to a delay control signal and output a delayed... |
| 2016/0149564 |
DELAY LINE CIRCUIT A delay line circuit includes a plurality of delay units configured to receive an input signal and to provide a first output signal. The plurality of delay... |
| 2016/0149563 |
SEMICONDUCTOR DEVICE A semiconductor device includes a first variable delay circuit that delays inputted multiphase signals according to a delay control signal, a selection circuit... |
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