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Patent # Description
2016/0148862 SEMICONDUCTOR MODULE
A common connecting section for connection to terminals at the same potential in circuits is placed outside a mold section to allow a reduction in size of a...
2016/0148861 FIRST-PACKAGED AND LATER-ETCHED THREE-DIMENSIONAL FLIP-CHIP SYSTEM-IN-PACKAGE STRUCTURE AND PROCESSING METHOD...
A first-packaged and later-etched three-dimensional flip-chip system-in-package structure and a processing method thereof are provided. The package structure...
2016/0148860 LEADFRAME BASED LIGHT EMITTER COMPONENTS AND RELATED METHODS
Leadframe based light emitter components and methods are provided. In some aspects, a leadframe based light emitter component includes a leadframe element, an...
2016/0148859 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
On the assumption that a pair of hanging parts is provided in a lead frame and a clip includes a main body part and a pair of extension parts, the pair of the...
2016/0148858 METHOD OF FORMING THROUGH-HOLE IN SILICON SUBSTRATE, METHOD OF FORMING ELECTRICAL CONNECTION ELEMENT...
The present invention herein relates to a method of forming a through-hole in a silicon substrate. The present invention herein also relates to a method of...
2016/0148857 Semicondutor Device and Method of Manufacture
A semiconductor device and method for providing an enhanced removal of heat from a semiconductor die within an integrated fan out package on package...
2016/0148856 ELECTRONIC DEVICE HAVING HEAT CONDUCTING MEMBER
An electronic device includes a semiconductor module, a wiring substrate, a case member and a heat conducting member. The heat conducting member thermally...
2016/0148855 PACKAGING DEVICE AND MANUFACTURING METHOD THEREOF
A packaging device including a first semiconductor device, a thermal dissipating component, an encapsulation layer, a via, and a pad. The first semiconductor...
2016/0148854 PACKAGING SUBSTRATE WITH BLOCK-TYPE VIA AND SEMICONDUCTOR PACKAGES HAVING THE SAME
A packaging substrate includes a core layer having a first surface and a second surface. A group of ground pads is disposed on the second surface within a...
2016/0148853 SEMICONDUCTOR DEVICE
A semiconductor device includes an insulating substrate including a metal plate, an insulating plate, and a circuit plate laminated sequentially in order; a...
2016/0148852 SEMICONDUCTOR DEVICE
An insertion vertical electrode region and part of a case-contact horizontal electrode region of an electrode insertion part of an external electrode is...
2016/0148851 DRY ETCHING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A first etching rate of the first conductive film is calculated by acquiring correlation between an opening ratio of an etching mask and an etching rate of an...
2016/0148850 PROCESS CONTROL TECHNIQUES FOR SEMICONDUCTOR MANUFACTURING PROCESSES
Techniques for measuring and/or compensating for process variations in a semiconductor manufacturing processes. Machine learning algorithms are used on...
2016/0148849 VOLTAGE CONTRAST CHARACTERIZATION STRUCTURES AND METHODS FOR WITHIN CHIP PROCESS VARIATION CHARACTERIZATION
A method for designing, a structure, method of inspecting and a computer system for designing voltage contrast integrated circuit characterization. The design...
2016/0148848 METHODS FOR EXTREME ULTRAVIOLET MASK DEFECT MITIGATION BY MULTI-PATTERNING
Methods for extreme ultraviolet (EUV) mask defect mitigation by using multi-patterning lithography techniques. In one exemplary embodiment, a method for...
2016/0148847 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
A method of manufacturing a semiconductor device includes preparing a semiconductor substrate having a first and a second voltage device portion, each...
2016/0148846 SEMICONDUCTOR STRUCTURE CONTAINING LOW-RESISTANCE SOURCE AND DRAIN CONTACTS
Semiconductor structures having a source contact and a drain contact that exhibit reduced contact resistance and methods of forming the same are disclosed. In...
2016/0148845 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device is provided which includes an N-type semiconductor layer and a P-type semiconductor layer coexisting in the same wiring layer without...
2016/0148844 MOS Transistor Structure and Method
A method comprises depositing a first dielectric layer on a top surface of a substrate, implanting ions of a first conductivity type into the substrate,...
2016/0148843 PACKAGE SUBSTRATE DIVIDING METHOD
A package substrate is divided into a plurality of device packages. An adhesive tape is attached to a back side of the substrate by cutting the substrate along...
2016/0148842 DICING OF LOW-K WAFERS
Consistent with an example embodiment, there is a method for sawing a wafer substrate, the wafer substrate having a front-side surface containing active...
2016/0148841 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a semiconductor device includes forming a first via having a first diameter in a first main surface of a semiconductor substrate...
2016/0148840 THROUGH SILICON VIAS AND THERMOCOMPRESSION BONDING USING INKJET-PRINTED NANOPARTICLES
Apparatus and method for filling and optionally bumping through-silicon vias (TSVs) in device circuits utilizing inkjet printheads for ejecting sufficiently...
2016/0148839 USE OF AN INHIBITOR MOLECULE IN CHEMICAL VAPOR DEPOSITION TO AFFORD DEPOSITION OF COPPER ON A METAL SUBSTRATE...
Provided herein are methods for selectively forming layers of metal films on one portion of a substrate while leaving adjacent portions of the substrate...
2016/0148838 ARRAY SUBSTRATE AND FABRICATION METHOD THEREOF, AND DISPLAY DEVICE
Embodiments of the disclosure disclose an array substrate and a fabrication method thereof, and a display device. The fabrication method of the array substrate...
2016/0148837 METHOD OF TREATING A POROUS DIELECTRIC LAYER AND A METHOD OF FABRICATING A SEMICONDUCTOR DEVICE USING THE SAME
A method of treating a porous dielectric layer includes preparing a substrate on which the porous dielectric layer including an opening and pores exposed by...
2016/0148836 Vias and Methods of Formation Thereof
In accordance with an embodiment of the present invention, a semiconductor device includes a first metal line in a first insulating layer, and a via having a...
2016/0148835 SET OF STEPPED SURFACES FORMATION FOR A MULTILEVEL INTERCONNECT STRUCTURE
A trench can be formed through a stack of alternating plurality of first material layers and second material layers. A dielectric material liner and a trench...
2016/0148834 SOI WAFER FABRICATION METHOD AND SOI WAFER
An SOI wafer fabrication method includes a second process for forming an oxide layer by oxidizing a lamination surface of a support-substrate-forming wafer,...
2016/0148833 SEMICONDUCTOR DEVICE HAVING A SHALLOW TRENCH ISOLATION STRUCTURE AND METHODS OF FORMING THE SAME
A method includes a patterned hard mask layer formed over a substrate. The substrate is etched using the patterned hard mask layer to form a trench therein but...
2016/0148832 SEMICONDUCTOR DEVICE WITH BURIED LOCAL INTERCONNECTS
Embodiments of the present invention provide methods for fabricating a semiconductor device with buried local interconnects. One method may include providing a...
2016/0148831 Method and Apparatus to Assist the Processing of Deformed Substrates
A method and apparatus for detecting and handling deformed substrates, thus allowing them to be processed, and for increasing device yield on the substrate is...
2016/0148830 SUBSTRATE TRANSFER SYSTEM AND SUBSTRATE PROCESSING SYSTEM
A substrate transfer system includes a substrate transfer robot. The substrate transfer robot is provided between a first apparatus and a second apparatus...
2016/0148829 DEVICE AND METHOD FOR TRANSFERRING SUBSTRATE FOR FORMING COMPUND SEMICONDUCTOR FILM, AND SYSTEM AND METHOD FOR...
A transferring device includes a supporting part configured to support a substrate holder, an elevation member configured to raise and lower a substrate at a...
2016/0148828 DETACHABLE HIGH-TEMPERATURE ELECTROSTATIC CHUCK ASSEMBLY
A detachable high-temperature electrostatic chuck assembly including a chuck body for supporting a substrate, an interface plate coupled to the chuck body by a...
2016/0148827 SUBSTRATE PROCESSING SYSTEM
A substrate processing system includes: a holding plate provided to be rotatable around a vertical axis; a substrate holding member provided on the holding...
2016/0148826 DEVICE AND METHOD FOR ALIGNING SUBSTRATES
A method for alignment and contact-making of a first substrate with a second substrate using several detection units as well as a corresponding device.
2016/0148825 SUBSTRATE STORING CONTAINER
The lateral substrate support part has: a plurality of plate parts, which have a parallel positional relationship, and support end portions of a plurality of...
2016/0148824 Method and Apparatus of Manufacturing a Semiconductor Device by Forming a Film on a Substrate
Provided is a technique including forming a film by performing a cycle a predetermined number of times. The cycle includes: (a) forming a discontinuous first...
2016/0148823 BAKING DEVICE FOR A WAFER COATED WITH A COATING CONTAINING A SOLVENT
A baking device for a wafer coated with a coating containing a solvent is described, having a baking chamber, a support for the wafer, an inlet for a purge...
2016/0148822 SUBSTRATE CARRIER USING A PROPORTIONAL THERMAL FLUID DELIVERY SYSTEM
A substrate carrier is described that uses a proportional thermal fluid delivery system In one example the apparatus includes a heat exchanger to provide a...
2016/0148821 METHODS AND SYSTEMS TO ENHANCE PROCESS UNIFORMITY
A semiconductor processing chamber may include a remote plasma region, and a processing region fluidly coupled with the remote plasma region. The processing...
2016/0148820 PACKAGE-ON-PACKAGE STRUCTURES AND METHODS OF MANUFACTURE THEREOF
A method for manufacturing a package-on-package structure may include: providing a support structure having a package attached to an inclined surface of the...
2016/0148819 Method for Producing a Material-Bonding Connection between a Semiconductor Chip and a Metal Layer
A method for producing a material-bonding connection between a semiconductor chip and a metal layer is disclosed. For this purpose, a semiconductor chip, a...
2016/0148818 TITANIUM OXIDE FILM REMOVAL METHOD AND APPARATUS
In a titanium oxide film removal method and apparatus, a silicon substrate having the titanium oxide film is supported on a spin chuck. A first mixed aqueous...
2016/0148817 GALLIUM NITRIDE SUBSTRATE AND OPTICAL DEVICE USING THE SAME
A method of processing a gallium nitride substrate, includes providing a gallium nitride substrate, polishing a surface of the gallium nitride substrate, and...
2016/0148816 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a first material layer on the...
2016/0148815 Method for Patterning a Plurality of Features For Fin-Like Field-Effect Transistor (FINFET) Devices
A method for patterning fins for FinFET devices are disclosed. The method includes forming elongated protrusions on a semiconductor substrate and forming a...
2016/0148814 LIQUID TITANIUM OXIDE COMPOSITIONS, METHODS FOR FORMING THE SAME, AND METHODS FOR ETCHING MATERIAL LAYERS OF OR...
Liquid titanium oxide compositions, methods for forming such compositions, and methods for etching material layers using such compositions are provided. In...
2016/0148813 GAS INJECTION METHOD FOR UNIFORMLY PROCESSING A SEMICONDUCTOR SUBSTRATE IN A SEMICONDUCTOR SUBSTRATE PROCESSING...
A method of uniformly processing an upper surface of a semiconductor substrate in a plasma processing apparatus including a showerhead including gas outlets in...
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