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Patent # Description
2016/0172049 SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SAME
A semiconductor device and a method of operating the same are provided. The method includes determining whether a read operation on a selected page is a...
2016/0172048 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device is provided. The semiconductor memory device includes memory strings including drain-side memory cells connected between a bit...
2016/0172047 SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF
A semiconductor device includes a memory array including memory blocks; and an operation circuit suitable for performing a program loop and an erase loop on...
2016/0172046 STORAGE DEVICES AND METHODS OF OPERATING STORAGE DEVICES
A storage device includes a nonvolatile memory having a plurality of memory cells and a memory controller to control the nonvolatile memory. The operating...
2016/0172045 Partial Block Erase For Open Block Reading In Non-Volatile Memory
A non-volatile memory system mitigates the effects of open block reading by analyzing the un-programmed region of a block before programming to determine a...
2016/0172044 Method To Recover Cycling Damage And Improve Long Term Data Retention
Techniques for reversing damage caused by program-erase cycles in charge-trapping memory to improve long term data retention. A recovery process improves the...
2016/0172043 SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SAME
A semiconductor device and a method of operating the same are provided. The method includes performing a multi-plane erase operation on selected planes;...
2016/0172042 SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SAME
A method of operating a semiconductor device includes dividing an operation of the semiconductor device into a plurality of periods, and determining a...
2016/0172041 SEQUENTIAL WRITE AND SEQUENTIAL WRITE VERIFY IN MEMORY DEVICE
Some embodiments include apparatuses and methods for performing a first stage of an operation of storing information in a first memory cell and a second memory...
2016/0172040 MEMORY DEVICE AND DATA ERASING METHOD THEREOF
A memory device comprises a first memory string and a second memory string. The first memory string is coupled to a first bit line and a plurality of word...
2016/0172039 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME
A semiconductor memory device and a method of operating the same are provided. The device includes a memory cell array including a plurality of memory cells is...
2016/0172038 CONVERTING AN XY TCAM TO A VALUE TCAM
Approaches for an integrated circuit ternary content addressable memory (TCAM) are provided. A system includes an array of XY TCAM cells and respective...
2016/0172037 NOVEL LV NAND-CAM SEARCH SCHEME USING EXISTING CIRCUITS WITH LEAST OVERHEAD
Y-word Search schemes under preferred hierarchical broken-GBL and broken-LBL NAND-CAM arrays with 1) one CSL line shared by two NAND blocks as a match line or...
2016/0172036 MEMORY CELL WITH RETENTION USING RESISTIVE MEMORY
Described is an apparatus including memory cell with retention using resistive memory. The apparatus comprises: a memory element including cross-coupled cells...
2016/0172035 PSEUDO SRAM USING RESISTIVE ELEMENTS FOR NON-VOLATILE STORAGE
A memory device includes a first select transistor having a first current electrode coupled to a first bit line, a control electrode and a second current...
2016/0172034 RESISTIVE MEMORY DEVICE AND RESISTIVE MEMORY SYSTEM INCLUDING A PLURALITY OF LAYERS, AND METHOD OF OPERATING...
A method of operating a resistive memory system including a plurality of layers may include receiving a write request and first data corresponding to a first...
2016/0172033 STORAGE DEVICE WRITE PULSE CONTROL
According to an example, a method for storage device write pulse control may include writing a storage device to a first polarity by driving a row address line...
2016/0172032 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING SEMICONDUCTOR MEMORY DEVICE
According to one embodiment, a semiconductor memory device includes a cell array including a plurality of memory cells, a reference circuit, a sense amplifier...
2016/0172031 Memory Systems and Memory Programming Methods
Memory systems and memory programming methods are described. According to one arrangement, a memory system includes a memory array comprising a plurality of...
2016/0172030 METHODS, ARTICLES AND DEVICES FOR PULSE ADJUSTMENTS TO PROGRAM A MEMORY CELL
Embodiments disclosed herein may relate to adjusting an aspect of a programming pulse for one or more memory cells, such as based at least in part on one or...
2016/0172029 NONVOLITILE MEMORY REFRESH
A system and method of refreshing a nonvolatile memory having memory cells. The method includes identifying one or more of the memory cells that do not satisfy...
2016/0172028 RESISTIVE MEMORY DEVICE INCLUDING COLUMN DECODER AND OPERATING METHOD THEREOF
A resistive memory device includes a column decoder having a first switch unit, including at least one pair of switches arranged in correspondence to each of a...
2016/0172027 Polymer Memory
A integrated circuit device with a polymer memory array includes active circuits formed in lower layers of a multi-level interconnect structure and a...
2016/0172026 SEMICONDUCTOR MEMORY DEVICES HAVING SEPARATE SENSING CIRCUITS AND RELATED SENSING METHODS
A sensing circuit of a semiconductor memory device is provided which includes a bit line having a first edge and a second edge, a sensing line, a current...
2016/0172025 ACCESS SIGNAL ADJUSTMENT CIRCUITS AND METHODS FOR MEMORY CELLS IN A CROSS-POINT ARRAY
Systems, integrated circuits, and methods to generate access signals to facilitate memory operations in scaled arrays of memory elements, are described. In at...
2016/0172024 Non-Volatile SRAM With Multiple Storage States
Technologies are generally described herein for a non-volatile static random access memory device with multiple storage states. In some examples, the...
2016/0172023 SEMICONDUCTOR MEMORY DEVICE FOR STABLY READING AND WRITING DATA
In a semiconductor memory device, static memory cells are arranged in rows and columns, word lines correspond to respective memory cell rows, and word line...
2016/0172022 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SYSTEM
A semiconductor integrated circuit which can respond to changes of the amount of retained data at the time of standby is provided. The semiconductor integrated...
2016/0172021 MEMORY DEVICE AND SEMICONDUCTOR DEVICE INCLUDING MEMORY DEVICE
A memory cell retains (N-1)-bit data (N is an integer of more than 1) and an error detection bit. The memory cell has 2.sup.N data states A_1 to A_2.sup.N....
2016/0172020 OPTICAL INTERCONNECT IN HIGH-SPEED MEMORY SYSTEMS
A optical link for achieving electrical isolation between a controller and a memory device is disclosed. The optical link increases the noise immunity of...
2016/0172019 BOOSTED SUPPLY VOLTAGE GENERATOR FOR A MEMORY DEVICE AND METHOD THEREFORE
A boosted supply voltage generator is selectively activated and deactivated to allow operations that are sensitive to variations on the boosted voltage to be...
2016/0172018 APPARATUSES AND METHODS FOR CAPTURING DATA USING A DIVIDED CLOCK
Apparatuses and methods for capturing data using a divided clock are described. An example apparatus includes a clock divider configured to receive a DQS...
2016/0172017 TRACKING AND CORRECTION OF TIMING SIGNALS
Various embodiments include apparatus and methods to track and/or correct timing signals. Timing signals generated from an interface can be compared to the...
2016/0172016 SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
According to one embodiment, a semiconductor device includes, for example, a circuit board, a plurality of elements, a plurality of controllers, and a first...
2016/0172015 APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an...
2016/0172014 LEVERAGING INSTRUCTION RAM AS A DATA RAM EXTENSION DURING USE OF A MODIFIED HARVARD ARCHITECTURE PROCESSOR
On-chip instruction RAM is leveraged as an extension of on-chip data RAM during normal use of a modified Harvard Architecture processor. Unused space in an...
2016/0172013 ADDRESS AND CONTROL SIGNAL TRAINING
In one form, an apparatus comprises a delay circuit and a controller. The delay circuit delays a plurality of command and address signals according to a first...
2016/0172012 SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF
A semiconductor memory device includes a plurality of data buffering units corresponding to a data line, wherein the data buffering units include a first data...
2016/0172011 CMOS TRANSISTOR BIAS TEMPERATURE INSTABILITY BASED CHIP IDENTIFIER
Methods and devices for providing unclonable chip identification are provided. An integrated circuit device includes: a first transistor having a first gate...
2016/0172010 SEMICONDUCTOR DEVICE, MEMORY DEVICE, AND ELECTRONIC DEVICE
To provide a small, highly reliable memory device with a large storage capacity. A semiconductor device includes a circuit for retaining data and a circuit for...
2016/0172009 Semiconductor Device and Electronic Device
To provide a semiconductor device having large memory capacity and high reliability of data or a small-size semiconductor device having a small circuit area. A...
2016/0172008 Dissipating Heat During Device Operation
Apparatus for dissipating heat during the operation of a device. In accordance with some embodiments, the apparatus compares spaced-apart first and second heat...
2016/0172007 INFORMATION PROCESSING APPARATUS AND METHOD, AND PROGRAM STORAGE MEDIUM
Disclosed is an information processing method comprising the steps of: storing measured position information in association with first time information...
2016/0172006 CLOCK RECOVERY FOR VIDEO ENCODING/TRANSCODING APPLICATIONS
Approaches for clock synchronization in digital video environments. In an embodiment, an encoder/transcoder calculates a ratio between a system clock and a...
2016/0172005 EXTRACTION METHOD AND DEVICE
An extraction device includes a processor that executes a procedure. The procedure includes: extracting a point as an end of the turn at bat from footage of a...
2016/0172004 VIDEO CAPTURING APPARATUS
A video capturing apparatus includes imaging unit, generator, detector, storage unit, assigning unit, and output unit. The generator generates time information...
2016/0172003 METHOD AND SYSTEM TO PLAY LINEAR VIDEO IN VARIABLE TIME FRAMES
According to some embodiments, a method and apparatus are provided to receive a video media file comprising a first time-based portion divided into a plurality...
2016/0172002 MULTI-STAGE PRODUCTION PIPELINE SYSTEM
Multi-stage production pipeline system that may be utilized in conjunction with a motion picture project management system. The multi-stage production pipeline...
2016/0172001 GENERATING STATIC VIEWS AS A MOTION FILE
The embodiments herein provide a method and system for generating static views of one or more objects on an electronic device as a motion file. The method...
2016/0172000 AN APPARATUS OF PROVIDING A USER INTERFACE FOR PLAYING AND EDITING MOVING PICTURES AND THE METHOD THEREOF
The present invention relates to an apparatus of providing a user interface for playing and editing moving pictures (i.e., video) and the method thereof, the...
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