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Patent # Description
2016/0181444 SOLAR CELLS WITH IMPROVED LIFETIME, PASSIVATION AND/OR EFFICIENCY
A method of fabricating a solar cell can include forming a dielectric region on a silicon substrate. The method can also include forming an emitter region over...
2016/0181443 SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME
A solar cell according to an embodiment of the invention includes a substrate of a first conductive type, an emitter region of a second conductive type...
2016/0181442 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
A semiconductor device includes: a first conductive type semiconductor device; a first conductive type drift region formed by epitaxial growth on the...
2016/0181441 Semiconductor Device and Method for Manufacturing a Semiconductor Device
A semiconductor device includes a semiconductor material having a bandgap larger than 2 eV and less than 10 eV, and a contact layer in contact with the...
2016/0181440 FIELD EFFECT TRANSISTOR WITH SELF-ADJUSTING THRESHOLD VOLTAGE
Methods for forming field effect transistors (FETs) with improved ON/OFF current ratios in addition to short charging times and the resulting devices are...
2016/0181439 TRANSISTOR COMPRISING A CHANNEL PLACED UNDER SHEAR STRAIN AND FABRICATION PROCESS
A field-effect transistor including an active zone comprises a source, a channel, a drain and a control gate, which is positioned level with the channel,...
2016/0181438 Semiconductor Device
A semiconductor device is provided with a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide...
2016/0181437 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE
A thin film transistor, its manufacturing method, and a display device are provided. The method comprises: forming a gate metal layer (35), forming a step-like...
2016/0181436 Zero Cost NVM Cell Using High Voltage Devices in Analog Process
A non-volatile memory cell and array structure is disclosed situated within a high voltage region of an integrated circuit. The cell utilizes capacitive...
2016/0181435 FLOATING GATE TRANSISTORS AND METHOD FOR FORMING THE SAME
A method and structure for floating gate transistors provides floating gate transistors with floating gates having sharp, well-controlled edge profiles. The...
2016/0181434 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used...
2016/0181433 FIELD EFFECT TRANSISTOR
An insulating film is provided over one surface of a first semiconductor layer including a first oxide semiconductor including indium as a main component, and...
2016/0181432 SEMICONDUCTOR DEVICE
Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including...
2016/0181431 Manufacturing Method of Crystalline Semiconductor Film and Semiconductor Device
A change in electrical characteristics is inhibited in a semiconductor device using a transistor including an oxide semiconductor having crystallinity, and the...
2016/0181430 IGZO Devices with Metallic Contacts and Methods for Forming the Same
Embodiments described herein provide indium-gallium-zinc oxide (IGZO) devices, such as IGZO thin-film transistors (TFTs), and methods for forming such devices....
2016/0181429 FINFET WITH DUAL WORKFUNCTION GATE STRUCTURE
A semiconductor device includes a substrate having a fin structure, the fin structure having a height in a substantially perpendicular direction to the...
2016/0181428 Fin Field Effect Transistors Having Conformal Oxide Layers and Methods of Forming Same
An embodiment fin field-effect-transistor (finFET) includes a semiconductor fin comprising a channel region and a gate oxide on a sidewall and a top surface of...
2016/0181427 SEMICONDUCTOR DEVICE
A semiconductor device includes an isolation feature in a substrate. The semiconductor device further includes a first source/drain feature in the substrate,...
2016/0181426 METHODS OF FORMING EPI SEMICONDUCTOR MATERIAL IN A TRENCH FORMED ABOVE A SEMICONDUCTOR DEVICE AND THE RESULTING...
A device includes a gate structure having an axial length that is positioned above an active region of a semiconductor substrate and includes a first gate...
2016/0181425 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
There is provided a method for manufacturing a semiconductor device including a substrate including a plurality of active regions, a plurality of gate...
2016/0181424 METHODS OF FORMING LOW BAND GAP SOURCE AND DRAIN STRUCTURES IN MICROELECTRONIC DEVICES
Methods of forming a strained channel device utilizing dislocations disposed in source/drain structures are described. Those methods/structures may include...
2016/0181423 DISPLAY PANEL
A display panel is provided, which includes a first substrate, a first insulating layer on the first substrate, a semiconductor layer on the first insulating...
2016/0181422 ENHANCED BREAKDOWN VOLTAGES FOR HIGH VOLTAGE MOSFETS
An integrated circuit (IC) includes a high-voltage (HV) MOSFET on a substrate. The substrate includes a handle substrate region, an insulating region, and a...
2016/0181421 SEMICONDUCTOR DEVICES AND RELATED FABRICATION METHODS
Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device structure includes a body region of...
2016/0181420 LDMOS with Adaptively Biased Gate-Shield
An LDFET is disclosed. A source region is electrically coupled to a source contact. A lightly doped drain (LDD) region has a lower dopant concentration than...
2016/0181419 SEMICONDUCTOR DEVICE
The present examples relate to a semiconductor device used in an electric device or high voltage device. The present examples improve R.sub.sp by minimizing...
2016/0181418 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
A semiconductor device includes a well region of a first conductivity type, having a first depth, formed in a substrate. A source contact region of a second...
2016/0181417 Transistor Device with Field-Electrode
Disclosed is a transistor device. The transistor device includes a plurality of field structures which define a plurality of semiconductor mesa regions in a...
2016/0181416 Charge-Compensation Device
A charge-compensation semiconductor device includes a semiconductor body having a first surface, a lateral edge delimiting the semiconductor body in a...
2016/0181415 WIDE BAND GAP SEMICONDUCTOR DEVICE
A semiconductor substrate having a main surface and made of a wide band gap semiconductor is provided, the semiconductor substrate including a device region...
2016/0181414 SEMICONDUCTOR DEVICE INCLUDING FIN- FET AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a first fin structure for a first fin field effect transistor (FET). The first fin structure includes a first base layer...
2016/0181413 SEMICONDUCTOR DEVICE
A semiconductor device is provided with an N.sup.--type drift layer, a N.sup.+-type diffusion well region provided on a surface part of the N.sup.--type drift...
2016/0181412 SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME
Provided are a semiconductor device configured to block a physical diffusion path by forming an oxide layer between barrier layers to prevent impurities from...
2016/0181411 SEMICONDUCTOR DEVICE
To enhance electromigration resistance of an electrode. A drain electrode is partially formed on a side surface of a drain pad. In this case, the drain electrode...
2016/0181410 Semiconductor Device with Low-Conducting Field-controlling Element
A semiconductor device including a low conducting field-controlling element is provided. The device can include a semiconductor including an active region...
2016/0181409 Bidirectional Power Switching with Bipolar Conduction and with Two Control Terminals Gated by Two Merged...
Power semiconductor devices, methods, and systems, in which additional switches are added on both surfaces of a two-sided power device with bidirectional...
2016/0181408 Semiconductor Device with Stripe-Shaped Trench Gate Structures and Gate Connector Structure
A semiconductor device includes a transistor cell with a stripe-shaped trench gate structure that extends from a first surface into a semiconductor body. A...
2016/0181407 METHOD TO FABRICATE QUANTUM DOT FIELD-EFFECT TRANSISTORS WITHOUT BIAS-STRESS EFFECT
Disclosed herein are embodiments of a method to form quantum dot field-effect transistors (QD FETs) having little to no bias-stress effect. Bias-stress effect...
2016/0181406 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
An object is to provide a semiconductor device including an oxynitride semiconductor whose carrier density is controlled. By introducing controlled nitrogen...
2016/0181405 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another...
2016/0181404 FINFET TRANSISTOR WITH FIN BACK BIASING
A FinFET having fin back biasing and methods of forming the same are disclosed. The FinFET includes a substrate and a fin over the substrate. The fin includes...
2016/0181403 FinFETs and Methods for Forming the Same
A FinFET includes a semiconductor fin including an inner region, and a germanium-doped layer on a top surface and sidewall surfaces of the inner region. The...
2016/0181402 Method of Manufacturing a Semiconductor Device with Lateral FET Cells and Field Plates
A method of manufacturing a semiconductor device includes providing dielectric stripe structures extending from a first surface into a semiconductor substrate...
2016/0181401 HIGH-VOLTAGE TRANSISTOR WITH HIGH CURRENT LOAD CAPACITY AND METHOD FOR ITS PRODUCTION
An isolation area (10) is provided over a drift region (12) with a spacing (d) to a contact area (4) provided for a drain connection (D). The isolation area is...
2016/0181400 LDMOS Device and Its Manufacturing Method
The present invention discloses an LDMOS device, whose drift region is composed of a first drift region and a second drift region, the first drift region being...
2016/0181399 METHODS FOR FABRICATING SEMICONDUCTOR DEVICES
Methods of forming a semiconductor device are provided. The methods may include forming a gate structure on a substrate, forming a first sacrificial pattern...
2016/0181398 Composite dummy Gate With conformal Polysilicon layer For FinFet Device
A method includes providing a fin structure containing a semiconductor material. The method includes forming a gate dielectric layer over the fin structure,...
2016/0181397 METHOD TO IMPROVE RELIABILITY OF HIGH-K METAL GATE STACKS
A method of fabricating a gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer...
2016/0181396 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
A method for forming a semiconductor structure includes providing a semiconductor substrate having a metal gate structure formed on the semiconductor...
2016/0181395 FINFET DEVICE HAVING A HIGH GERMANIUM CONTENT FIN STRUCTURE AND METHOD OF MAKING SAME
A fin of silicon-germanium material is formed and covered with an epitaxially grown layer of silicon material. A dummy transistor gate is then formed to extend...
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