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Patent # Description
2016/0190020 SEMICONDUCTOR INSPECTION METHOD, SEMICONDUCTOR INSPECTION DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR ELEMENT
In a semiconductor inspection method using a semiconductor inspection device, by selecting an incident energy and a negative potential and scanning an...
2016/0190019 METHOD OF FORMING INTEGRATED CIRCUIT HAVING PLURAL TRANSISTORS WITH WORK FUNCTION METAL GATE STRUCTURES
The present invention provides a method of forming an integrated circuit including a substrate, a first transistor, a second transistor and a third transistor....
2016/0190018 DEVICE AND METHODS FOR HIGH-K AND METAL GATE SLACKS
A semiconductor device having five gate stacks on different regions of a substrate and methods of making the same are described. The device includes a...
2016/0190017 Structure and Method for Semiconductor Device
A semiconductor device and method of forming the same is disclosed. The semiconductor device includes a substrate having first and second device regions. The...
2016/0190016 ELONGATED CONTACTS USING LITHO-FREEZE-LITHO-ETCH PROCESS
A process of forming an integrated circuit containing elongated contacts which connect to three active areas and/or MOS gates, and elongated contacts which...
2016/0190015 METHOD OF PATTERNING DOPANT FILMS IN HIGH-K DIELECTRICS IN A SOFT MASK INTEGRATION SCHEME
A method of fabricating advanced node field effect transistors using a replacement metal gate process. The method includes dopant a high-k dielectric directly...
2016/0190014 FABRICATION METHODS FOR MULTI-LAYER SEMICONDUCTOR STRUCTURES
Methods are provided for fabricating multi-layer semiconductor structures. The methods include, for example: providing a first layer and a second layer over a...
2016/0190013 METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE WITH GATE
A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The substrate has a fin...
2016/0190012 INTEGRATED CIRCUITS WITH INACTIVE GATES AND METHODS OF MANUFACTURING THE SAME
Integrated circuits and methods for manufacturing the same are provided. A method for producing an integrated circuit includes forming a first active dummy...
2016/0190011 EPITAXIAL STRUCTURE AND PROCESS THEREOF FOR FORMING FIN-SHAPED FIELD EFFECT TRANSISTOR
An epitaxial process includes the following step for forming a fin-shaped field effect transistor. A plurality of fin structures are formed on a substrate and...
2016/0190010 METHOD OF DIVIDING WAFER INTO DIES
A method of dividing a wafer, having on one side a device area with a plurality of devices partitioned by a plurality of division lines and a peripheral...
2016/0190009 Previous Layer Self-Aligned Via and Plug Patterning for Back End of Line (BEOL)Interconnects
Previous layer self-aligned via and plug patterning for back end of line (BEOL) interconnects are described. In an example, an interconnect structure for an...
2016/0190008 TUNGSTEN FEATURE FILL
Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as...
2016/0190007 A METHOD FOR MICROVIA FILLING BY COPPER ELECTROPLATING WITH TSV TECHNOLOGY FOR 3D COPPER INTERCONNECTION AT...
A method for microvia filling by copper electroplating with a TSV technology for a 3D copper interconnection at a high aspect ratio, which includes: Step 1:...
2016/0190006 MECHANISMS FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE WITH FEATURE OPENING
A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a semiconductor substrate and forming a...
2016/0190005 PHYSICAL UNCLONABLE INTERCONNECT FUNCTION ARRAY
A method for fabricating an interconnect function array includes forming a first plurality of conductive lines on a substrate, forming an insulator layer over...
2016/0190004 METHODS FOR FABRICATING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICES FABRICATED BY THE SAME
The inventive concepts provide methods for fabricating a semiconductor device and semiconductor devices fabricated by the same. According to the method,...
2016/0190003 REDUCING DEFECTS AND IMPROVING RELIABILITY OF BEOL METAL FILL
A method of reducing defects in and improving reliability of Back-End-Of-Line (BEOL) metal fill includes providing a starting metallization structure for...
2016/0190002 High Boiling Temperature Solvent Additives for Semiconductor Processing
A method for forming an interconnect structure includes forming a patterned layer over a substrate, the patterned layer having an opening therein. A dielectric...
2016/0190001 GROUP III NITRIDE COMPOSITE SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR MANUFACTURING GROUP...
A group III nitride composite substrate includes a group III nitride film and a support substrate formed from a material different in chemical composition from...
2016/0190000 SYSTEMS AND METHODS FOR PRODUCING FLAT SURFACES IN INTERCONNECT STRUCTURES
In interconnect fabrication (e.g. a damascene process), a conductive layer is formed over a substrate with holes, and is polished to provide interconnect...
2016/0189999 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided is a semiconductor device and a method of manufacturing the same. The semiconductor device includes a plurality of stacked structures and a dielectric...
2016/0189998 WAFER TEMPORARY BONDING METHOD AND THIN WAFER MANUFACTURING METHOD
A method for temporarily bonding a wafer to a support via a temporary bonding arrangement is provided. The arrangement is a composite temporary adhesive layer...
2016/0189997 AUXILIARY SHEET FOR LASER DICING
An auxiliary sheet for laser dicing is provided, with which partial adhesion of a substrate film to a processing table is not caused even when dicing a...
2016/0189996 WAFER PROCESSING LAMINATE, TEMPORARY ADHESIVE MATERIAL FOR WAFER PROCESSING, AND METHOD FOR MANUFACTURING THIN...
Temporary adhesive material for wafer processing, the temporary adhesive material being used for temporarily bonding support to wafer having circuit-forming...
2016/0189995 PROCESS FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE WITH TEMPORARY BONDING VIA METAL LAYERS
A method for manufacturing a structure implementing temporary bonding a substrate to be handled with a handle substrate, including: providing the substrate to...
2016/0189994 ELECTROSTATIC CHUCKING METHOD AND SUBSTRATE PROCESSING APPARATUS
An electrostatic chucking method uses a substrate processing apparatus including an electrostatic chuck, a focus ring, a supply unit configured to supply a...
2016/0189993 SUBSTRATE PROCESSING APPARATUS, GAS-PURGING METHOD, METHOD FOR MANUFACURING SEMICONDUCTOR DEVICE, AND RECORDING...
A substrate processing apparatus includes a process chamber configured to process a substrate, a carrier mounting part configured to mount a carrier which...
2016/0189992 METHOD OF PROCESSING LOCATION INFORMATION AND METHOD OF PROCESSING MEASUREMENT INFORMATION INCLUDING THE SAME
A method of processing measurement information in which a determined parameter value is determined at each of a plurality of measurement times including...
2016/0189991 SUBSTRATE PROCESSING DEVICE, SUBSTRATE PROCESSING METHOD, AND SUBSTRATE PROCESSING SYSTEM
A second control device of a second substrate processing apparatus determines whether the processing-start expected time for a substrate is equal to or earlier...
2016/0189990 LASER CRYSTALLZIATION SYSTEM AND METHOD OF CONTROLLING CRYSTALLIZATION ENERGY THEREIN
A laser crystallization system and a method of controlling crystallization energy therein are disclosed. The laser crystallization system comprises: a Mura...
2016/0189989 PROCESSING APPARATUS
A processing apparatus including a chuck table for holding a workpiece, a processing unit for processing the workpiece held on the chuck table, a feeding unit...
2016/0189988 EVACUATION METHOD AND VACUUM PROCESSING APPARATUS
An evacuation method used for a vacuum processing apparatus including a vacuum processing chamber is provided. The vacuum processing chamber is evacuated by an...
2016/0189987 SUBSTRATE PROCESSING APPARATUS
A substrate processing apparatus includes a processing container configured to air-tightly accommodate substrates, a plurality of mounting stands configured to...
2016/0189986 MOLD RELEASE FILM AND PROCESS FOR PRODUCING SEMICONDUCTOR PACKAGE
A mold release film to be disposed on a cavity surface of a mold in a method for producing a semiconductor package wherein a semiconductor element is disposed...
2016/0189985 MOLD RELEASE FILM AND PROCESS FOR PRODUCING SEMICONDUCTOR PACKAGE
To provide a mold release film which is excellent in releasability and capable of suppressing contamination of a mold or a resin-encapsulation portion by the...
2016/0189984 METHODS FOR VACUUM ASSISTED UNDERFILLING
Methods for applying an underfill with vacuum assistance. The method includes receiving a substrate with the surface at least partially covered by a glass-like...
2016/0189983 METHOD AND STRUCTURE FOR FAN-OUT WAFER LEVEL PACKAGING
A method for fan-out wafer level chip packaging includes: providing a carrier substrate; forming a plurality of conductive base layers on a surface of the...
2016/0189982 METHOD FOR PROCESSING SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE IN WHICH SAID...
Provided are a method of processing a semiconductor substrate and a method of manufacturing a semiconductor device that uses this method of processing. The...
2016/0189981 MANUFACTURING METHOD OF SUBSTRATE STRUCTURE
A manufacturing method of a substrate structure is provided. The method includes the following steps. Firstly, a conductive carrier is provided. Then, a first...
2016/0189980 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this...
2016/0189979 METHOD FOR PRODUCING WIRING BOARD
The method for producing a wiring board according to the present invention includes the steps of: preparing an insulating board including a cavity forming area...
2016/0189978 LEAD FRAME, METHOD FOR MANUFACTURING LEAD FRAME, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING...
A lead frame includes a die pad and a plurality of lead portions each including an internal terminal and an external terminal. The external terminals of the...
2016/0189977 PATTERNING METHOD AND SEMICONDUCTOR STRUCTURE
A patterning method and a patterned material layer are provided. After providing a substrate including a material layer, a hard mask layer including trenches...
2016/0189976 POLISHING COMPOSITIONS AND METHODS FOR POLISHING COBALT FILMS
The present disclosure relates to polishing compositions that can polish Cobalt (Co) films in semiconductor substrates containing a multitude of films...
2016/0189975 ETCHING METHOD AND ETCHING APPARATUS
An etching method is provided. In the etching method, a temperature of a chiller configured to cool a pedestal is controlled so as to become -20 degrees C. or...
2016/0189974 Substrate processing method, non-transitory storage medium and heating apparatus
A substrate processing method includes a coating step that applies a coating liquid to a substrate having a front surface on which a pattern is formed, thereby...
2016/0189973 METHOD FOR PRODUCING POLISHED OBJECT AND POLISHING COMPOSITION KIT
[Problem] To provide a method for producing a polished object, which can remarkably reduce a haze level on a surface of the object to be polished while defects...
2016/0189972 WAFER POLISHING APPARATUS AND METHOD
A wafer polishing apparatus capable of maintaining a drive ring in a flat state and a wafer polishing method are provided. In the wafer polishing apparatus and...
2016/0189971 ETCH BIAS CONTROL
A semiconductor device and method for forming a semiconductor device are presented. The method includes providing a patterned reticle having a pattern...
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