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Patent # Description
2016/0197118 IMAGE SENSORS INCLUDING PHOTOELECTRIC CONVERSION PORTIONS WITH INCREASED AREA
An image sensor can include a photoelectric conversion part of an active region of a substrate and a trench in the substrate. A transfer transistor gate...
2016/0197117 SOLID-STATE IMAGE SENSING DEVICE AND CAMERA SYSTEM WITH DIVIDED PIXELS
A solid-state image sensing device includes: a pixel part in which pixels are arranged in a matrix; and a pixel signal readout part including an AD conversion...
2016/0197116 CMOS IMAGE SENSOR
According to one embodiment, a CMOS image sensor includes a photoelectric conversion element and an amplifier transistor. The photoelectric conversion element...
2016/0197115 Methods and Apparatus for Glass Removal in CMOS Image Sensors
Methods for glass removal while forming CMOS image sensors. A method for forming a device is provided that includes forming a plurality of pixel arrays on a...
2016/0197114 Semiconductor Devices, Methods of Manufacturing Thereof, and Image Sensor Devices
Semiconductor devices, methods of manufacturing thereof, and image sensor devices are disclosed. In some embodiments, a semiconductor device comprises a...
2016/0197113 IMAGE SENSOR DEVICE WITH SENSING SURFACE CAVITY AND RELATED METHODS
An image sensor device may include an interconnect layer, an image sensor IC carried by the interconnect layer and having an image sensing surface, and...
2016/0197112 OPTICAL GLASS
To provide an optical glass, being an optical glass manufactured by a cutting method using laser light, more increases strength to make it difficult to cause...
2016/0197111 INTEGRATED PHOTONICS INCLUDING GERMANIUM
A photonic structure can include in one aspect one or more waveguides formed by patterning of waveguiding material adapted to propagate light energy. Such...
2016/0197110 Methods of Manufacturing Semiconductor Devices
Methods of forming semiconductor devices are disclosed. In some embodiments, a first trench and a second trench are formed in a substrate, and dopants of a...
2016/0197109 SOLID-STATE IMAGING DEVICE, PRODUCTION METHOD THEREOF, AND ELECTRONIC DEVICE
Disclosed is a solid-state imaging device which includes a pixel section, a peripheral circuit section, a first isolation region formed with a STI structure on...
2016/0197108 SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS
There is provided a solid-state imaging device that includes: colored pixels each including a first photoelectric conversion element and a colored filler;...
2016/0197107 THIN FILM TRANSISTOR SUBSTRATE HAVING METAL OXIDE SEMICONDUCTOR AND MANUFACTURING THE SAME
A method for manufacturing a thin film transistor substrate, the method can include a first mask process for forming a gate electrode on a substrate; a step...
2016/0197106 PHOTO MASK AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR USING THE SAME
According to an exemplary embodiment of the present invention, a photomask includes a transparent substrate and a polarizing pattern. A polarizing pattern is...
2016/0197105 ELECTRONIC DEVICE AND ELECTRONIC APPARATUS
An EL display having high operating performance and reliability is provided. LDD regions 15a through 15d of a switching TFT 201 formed in a pixel are formed...
2016/0197104 LIQUID CRYSTAL DISPLAY HAVING WHITE PIXELS
A display device includes red, blue, green, and white pixels, a plurality of gate lines, a plurality of data lines, and a plurality of storage electrodes...
2016/0197103 THIN-FILM TRANSISTOR SUBSTRATE
A thin-film transistor (TFT) substrate including a first region including a semiconductor layer, a first etch barrier layer covering the semiconductor layer, a...
2016/0197102 ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, DISPLAY PANEL AND DISPLAY DEVICE
The present disclosure provides an array substrate, a manufacturing method thereof, a display panel and a display device. A base substrate of the array...
2016/0197101 GRAPHENE DOPED MATERIAL AND MANUFACTURING METHOD THEREOF, AND PIXEL STRUCTURE
Embodiments of the invention provide a graphene doped material and a manufacturing method thereof, and a pixel structure. The graphene doped material comprises...
2016/0197100 ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY APPARATUS
An array substrate and a manufacturing method thereof, a display apparatus are disclosed. The manufacturing method of the array substrate includes a forming a...
2016/0197099 DISPLAY DEVICE
A display device includes a substrate, a first insulating layer having a first side wall, an oxide semiconductor layer on the first side wall, a gate electrode...
2016/0197098 ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE
An array substrate, a manufacturing method thereof and a display device are provided. The array substrate comprises a plurality of gate lines (102) and a...
2016/0197097 DISPLAY DEVICE
A display device is disclosed. In one aspect, the device includes a Substrate and a pad portion positioned over the substrate. The display device also includes...
2016/0197096 ARRAY SUBSTRATE, MANUFACTURING METHOD THEREFOR AND DISPLAY DEVICE
An array substrate is provided. The array substrate includes a base substrate, and a buffer layer, a semiconductor layer, a gate insulation layer, a gate metal...
2016/0197095 SEMICONDUCTOR DEVICE
Disclosed herein is a technique for reducing, in an analog circuit that needs trimming adjustment in a semiconductor device, a variation to be caused in the...
2016/0197094 NON-VOLATILE MEMORY DEVICE
According to one embodiment, a non-volatile memory device includes electrodes, one semiconductor layer, conductive layers, and first and second insulating...
2016/0197093 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, a method for manufacturing a semiconductor memory device includes forming a stacked body by alternately stacking an insulating...
2016/0197092 VERTICAL MEMORY DEVICES AND RELATED METHODS OF MANUFACTURE
A vertical semiconductor memory device having conducting and charge-trapping columns separated by columns of holes is disclosed. The columns are formed in...
2016/0197091 FABRICATION METHOD AND STRUCTURE OF SEMICONDUCTOR NON-VOLATILE MEMORY DEVICE
A non-volatile semiconductor memory device with good write/erase characteristics is provided. A selection gate is formed on a p-type well of a semiconductor...
2016/0197090 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
According to one embodiment, a method for manufacturing a semiconductor device includes forming a stacked mask on a layer to be processed. The stacked mask has...
2016/0197089 NON-VOLATILE MEMORY CELL STRUCTURE, NON-VOLATILE MEMORY ARRAY STRUCTURE AND METHOD OF FABRICATING NON-VOLATILE...
A NVM cell structure includes a semiconductor substrate having a first conductivity type, a first well region having a second conductivity type, a floating...
2016/0197088 Split Gate Non-volatile Flash Memory Cell Having Metal Gates And Method Of Making Same
A non-volatile memory cell includes a substrate of a first conductivity type, having a first region of a second conductivity type, a second region of the...
2016/0197087 MASK READ-ONLY MEMORY DEVICE AND FABRICATION METHOD THEREOF
The disclosed subject matter provides a mask read-only memory (M-ROM) device and fabrication method thereof. In an M-ROM device, a first layer having a first...
2016/0197086 SEMICONDUCTOR DEVICE
A method of fabricating a semiconductor device including forming a charge storage layer, and forming a first tunnel insulating layer covering the charge...
2016/0197085 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF, AND STATIC RANDOM ACCESS MEMORY CELL
A method for forming a semiconductor having a plurality of FinFETs. The method includes providing a semiconductor substrate having a surface; and forming a...
2016/0197084 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a substrate having an active region defined by a device isolation layer and at least a gate trench linearly extending in a...
2016/0197083 METAL STRAP FOR DRAM/FINFET COMBINATION
A metal strap is formed in a middle-of-line (MOL) process for communication between an eDRAM and a FinFET. An oxide is deposited in a trench over the eDRAM to...
2016/0197082 Low Leakage Non-Planar Access Transistor for Embedded Dynamic Random Access Memory (eDRAM)
Low leakage non-planar access transistors for embedded dynamic random access memory (eDRAM) and methods of fabricating low leakage non-planar access...
2016/0197081 SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME
Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage...
2016/0197080 HIGH VOLTAGE LATERAL DOUBLE-DIFFUSED METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (LDMOSFET) HAVING A DEEP...
Disclosed are semiconductor structures. Each semiconductor structure can comprise a substrate and at least one laterally double-diffused metal oxide...
2016/0197079 Semiconductor Devices and Methods of Manufacture Thereof
Semiconductor devices and methods of manufacture are disclosed. A representative transistor device includes two fins over a workpiece. An insulating material...
2016/0197078 STRUCTURE AND METHOD FOR ADVANCED BULK FIN ISOLATION
A non-planar semiconductor structure containing semiconductor fins that are isolated from an underlying bulk silicon substrate by an epitaxial semiconductor...
2016/0197077 STRUCTURE AND METHOD FOR ADVANCED BULK FIN ISOLATION
A non-planar semiconductor structure containing semiconductor fins that are isolated from an underlying bulk silicon substrate by an epitaxial semiconductor...
2016/0197076 FIELD-EFFECT TRANSISTOR AND SEMICONDUCTOR DEVICE
According to one embodiment, a field-effect transistor includes a source region of a first conductivity type, a drain region of the first conductivity type and...
2016/0197075 FIN FIELD EFFECT TRANSISTORS AND FABRICATION METHOD THEREOF
A method for forming FinFETs includes providing a semiconductor substrate having at least a first fin in a first region and at least a second fin in a second...
2016/0197074 SEMICONDUCTOR DEVICES HAVING SILICIDE AND METHODS OF MANUFACTURING THE SAME
Semiconductor devices, having dual silicides, include a first fin, having N-type impurities, and a second fin, having P-type impurities, on a substrate. A...
2016/0197073 REDUCTION OF NEGATIVE BIAS TEMPERATURE INSTABILITY
A complementary metal-oxide semiconductor (CMOS) circuit and a method of fabricating the device are described. The circuit includes an n-channel field effect...
2016/0197072 SEMICONDUCTOR DEVICE WITH DIFFERENT FIN SETS
A semiconductor device which includes: a substrate; a first set of fins above the substrate of a first semiconductor material; a second set of fins above the...
2016/0197071 INTEGRATED CIRCUIT DEVICE AND METHOD FOR FORMING THE SAME
The invention provides an integrated circuit device. The integrated circuit device includes a semiconductor substrate. An isolation structure is positioned in...
2016/0197070 Semiconductor Device Having Contact Trenches Extending from Opposite Sides of a Semiconductor Body
A semiconductor device includes a semiconductor body having first and second opposing sides. Contact trenches extend, from the first and second sides, through...
2016/0197069 MONOLITHIC THREE-DIMENSIONAL (3D) ICs WITH LOCAL INTER-LEVEL INTERCONNECTS
Monolithic 3D ICs employing one or more local inter-level interconnect integrated intimately with at least one structure of at least one transistor on at least...
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