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Patent # Description
2016/0204810 Impulsive Noise Rejection
A method of rejecting impulsive noise in an OFDM receiver is described. The impulsive noise is rejected using channel state information (CSI) and is performed...
2016/0204809 HIGHLY INTEGRATED RADIO FREQUENCY TRANSCEIVER
For small cells, transceivers demand high performance while maintaining system efficiency. The present disclosure describes a highly integrated cellular...
2016/0204808 METHODS AND APPARATUS FOR PERFORMING IMPEDANCE MATCHING
A system that incorporates teachings of the subject disclosure may include, for example, determining a first voltage standing wave ratio (VSWR), selecting a...
2016/0204807 RECEPTION APPARATUS AND ASSOCIATED METHOD OF RECEIVING ENCODED DATA
A transmission apparatus includes an encoder that codes a data sequence with a parity check matrix, wherein the data sequence includes a final information bit...
2016/0204806 DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
The present technology relates to a data processing device and a data processing method so that an LDPC code with a good bit error rate is provided. An LDPC...
2016/0204805 DIGITAL BROADCASTING SYSTEM AND METHOD OF PROCESSING DATA IN DIGITAL BROADCASTING SYSTEM
A method of transmitting a broadcast signal includes encoding mobile data for FEC (Forward Error Correction); encoding signaling information for signaling the...
2016/0204804 DATA PROCESSING APPARATUS AND METHOD
A data processing apparatus includes a group-wise interleaving unit that performs group-wise interleaving; and a block interleaving unit that performs block...
2016/0204803 DECODING METHOD FOR CONVOLUTIONALLY CODED SIGNAL
A decoding method for a convolutionally coded signal is provided. The convolutionally coded signal includes a trellis. The decoding method includes determining...
2016/0204802 Low-Power Low Density Parity Check Decoding
In an example implementation of this disclosure, a message passing low density parity check (LDPC) decoder may, during decoding of a first group of bits, lock...
2016/0204801 DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
The present technology relates to a data processing device and a data processing method so that an LDPC code with a good bit error rate is provided. An LDPC...
2016/0204800 DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
The present technology relates to a data processing device and a data processing method so that an LDPC code with a good bit error rate is provided. An LDPC...
2016/0204799 HIERARCHICAL DATA COMPRESSION AND COMPUTATION
According to embodiments of the present invention, machines, systems, methods and computer program products for hierarchical compression of data are presented...
2016/0204798 HIERARCHICAL DATA COMPRESSION AND COMPUTATION
According to embodiments of the present invention, machines, systems, methods and computer program products for hierarchical compression of data are presented...
2016/0204797 HIERARCHICAL DATA COMPRESSION AND COMPUTATION
According to embodiments of the present invention, machines, systems, methods and computer program products for hierarchical compression of data are presented...
2016/0204796 ENHANCED COMPRESSION, ENCODING, AND NAMING FOR RESOURCE STRINGS
Technology is disclosed herein for compressing, encoding, and otherwise reducing the size of resource files. In at least one implementation, similarity...
2016/0204795 SYSTEMS AND METHODS FOR MODEL-FREE COMPRESSION AND MODEL-BASED DECOMPRESSION
An encoder generates a compressed data sequence from an original data sequence using many-to-one mapping independently of a source model associated with the...
2016/0204794 Efficient Dithering Technique for Sigma-Delta Analog-to-Digital Converters
A sigma-delta analog to digital converter (ADC) includes an M-bit digital-to-analog converter (DAC); a loop filter coupled to receive an output from DAC; and a...
2016/0204793 SIGMA-DELTA ADC WITH DITHER
Systems and methods for reducing spurious noise tones in sigma-delta analog-to-digital converters (ADCs) are described. A dither signal may be added to two...
2016/0204792 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OPERATING METHOD
A semiconductor device includes an analog-digital converter circuit. The analog-digital converter circuit includes a delay cell array that includes n-number (n...
2016/0204791 HIGH SPEED DATA TRANSFER FOR ANALOG-TO-DIGITAL CONVERTERS
This disclosure describes techniques for transferring data from an analog-to-digital converter (ADC) to a host device. The techniques may determine whether an...
2016/0204790 DIGITAL-TO-ANALOG CONVERTER, AND MOTOR DRIVING CONTROL APPARATUS AND METHOD USING THE SAME
A digital-to-analog converter may include: a signal modulator configured to receive a signal having a first digital value, and modulate the signal having the...
2016/0204789 MULTICHANNEL ANALOG-TO-DIGITAL CONVERTER
Multichannel successive approximation register (SAR) analog-to-digital converters (ADC), along with methods and systems for multichannel SAR analog-to-digital...
2016/0204788 QUANTUM INTERFERENCE DEVICE, ATOMIC OSCILLATOR, ELECTRONIC DEVICE, AND MOVING OBJECT
A quantum interference device includes: a gas cell in which metal atoms are sealed; a light emitting unit which emits light to the gas cell; a light receiving...
2016/0204787 APPARATUS AND METHOD FOR FAST PHASE LOCKING FOR DIGITAL PHASE LOCKED LOOP
Described is an integrated circuit (IC) with a phase locked loop with capability of fast locking. The IC comprises: a node to provide a reference clock; a...
2016/0204786 LOCAL OSCILLATOR
According to an embodiment, a local oscillator includes a digitally-controlled oscillator, a frequency multiplier, a phase data generator, a subtracter, a...
2016/0204785 Low Power and Integrable On-Chip Architecture for Low Frequency PLL
An integrated circuit including a phase detector; a first charge pump and a second charge pump coupled to the phase detector, and configured to receive inputs...
2016/0204784 System and Method for Synchronizing Multiple Oscillators Using Reduced Frequency Signaling
An embodiment method for voltage-controlled oscillator (VCO) control includes detecting a first VCO output signal of a first VCO. The first VCO output signal...
2016/0204783 Bulk Driven Low Swing Driver
A circuit is presented to reduce power while transmitting high speed signals across a long length of wire on an integrated circuit. A PMOS is used as a low...
2016/0204782 INTEGRATED CIRCUIT AND STORAGE DEVICE INCLUDING THE SAME
An integrated circuit includes an input/output pad, a driver circuit connected to the input/output pad, and a receiver circuit connected to the input/output...
2016/0204781 SYSTEMS AND METHODS FOR LEVERAGING PATH DELAY VARIATIONS IN A CIRCUIT AND GENERATING ERROR-TOLERANT BITSTRINGS
A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates...
2016/0204780 ANALOG SWITCH AND MULTIPLEXER
The analog switch includes a first DMOS transistor of a second conductivity type that is connected to an input terminal at a first end of a current path...
2016/0204779 Operating Point Optimization with Double-Base-Contact Bidirectional Bipolar Junction Transistor Circuits,...
The present application teaches, among other innovations, methods and circuits for operating a B-TRAN (double-base bidirectional bipolar junction transistor)....
2016/0204778 TRANSMISSION CHANNEL FOR ULTRASOUND APPLICATIONS
A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a current generator...
2016/0204777 CONTROL CIRCUIT FOR SOLID STATE POWER CONTROLLER
A control circuit is configured to apply a drive voltage to a solid state switching device comprising a first terminal (D), a second terminal (S) and a control...
2016/0204776 PROTECTED SWITCHING ELEMENT
A circuit is suggested comprising an electronic switching element, a logic unit coupled to control the electronic switching element, and a counter unit coupled...
2016/0204775 Dead-Time Compensation in a Power Supply System
One embodiment includes a power supply system. The system includes a pulse-width modulation (PWM) system configured to generate a PWM signal. The system also...
2016/0204774 PULSE WIDTH MODULATION SIGNAL GENERATION CIRCUIT AND METHOD
A pulse width modulation signal generation circuit and a pulse width modulation signal generation method are provided. A clock generator is configured for...
2016/0204773 SYSTEM AND METHOD FOR ANTI-AMBIPOLAR HETEROJUNCTIONS FROM SOLUTION-PROCESSED SEMICONDUCTORS
Van der Waals heterojunctions are extended to semiconducting p-type single-walled carbon nanotube (s-SWCNT) and n-type film that can be solution-processed with...
2016/0204772 POWER DROP DETECTOR CIRCUIT AND OPERATING METHOD OF SAME
A power drop detector circuit includes a detect element, for coupling to a first source voltage, for detecting a voltage level of the first source voltage, and...
2016/0204771 MITIGATION OF COMMON MODE DISTURBANCES IN AN H-BRIDGE DRIVER
A method for reducing common-mode disturbances during power-on and power-off modal transitions in a current driver includes providing a programmable current...
2016/0204770 Level Shifter Circuit with Improved Time Response and Control Method Thereof
A level shifter circuit with improved time response and a control method thereof are disclosed herein. The level shifter circuit includes the output stage...
2016/0204769 CIRCUIT AND METHOD FOR GENERATING AN OUTPUT SIGNAL HAVING A VARIABLE PULSE DUTY FACTOR
A circuit for generating an output signal having a second pulse duty factor from an input signal having a first pulse duty factor includes a first capacitor...
2016/0204768 DRIVER CIRCUIT WITH FEED-FORWARD EQUALIZER
A driver circuit for receiving input data and generating an output signal to a termination element is provided, wherein the input data has a first bit and...
2016/0204767 DRIVING CIRCUIT, DRIVING APPARATUS, AND METHOD FOR ADJUSTING OUTPUT IMPEDANCE TO MATCH TRANSMISSION LINE...
A driving circuit used in a transmission line includes an operational amplifier and an output circuit. The operational amplifier is used for receiving a...
2016/0204766 METHOD AND APPARATUS FOR GENERATING A SPREAD-SPECTRUM CLOCK
This disclosure provides an apparatus for generating a spread-spectrum clock, which comprises: a multi-phase clock generator generating a pre-determined number...
2016/0204765 BOOSTING VARACTOR CAPACITANCE RATIO
A voltage controlled oscillator comprises a negative resistance, a first inductor, a fixed capacitor, and a frequency control component. The frequency control...
2016/0204764 BOOSTING VARACTOR CAPACITANCE RATIO
A voltage controlled oscillator comprises a negative resistance, a first inductor, a fixed capacitor, and a frequency control component. The frequency control...
2016/0204763 RESONANT CIRCUIT AND HIGH-FREQUENCY FILTER
A resonant circuit includes a resonator. An inductor is connected in parallel with the resonator. An inductor is connected in series with the parallel circuit...
2016/0204762 ACOUSTIC WAVE DEVICE
The present invention relates to an acoustic wave device including: a substrate; an IDT arranged on the substrate; a connection electrode arranged on the...
2016/0204761 ACOUSTIC RESONATOR AND METHOD OF MANUFACTURING THE SAME
There are provided an acoustic resonator and a method of manufacturing the same. The acoustic resonator includes a resonance part including a first electrode,...
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