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Patent # Description
2016/0211225 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a substrate, and a nitride semiconductor layer provided on the substrate. An opening is provided through the nitride...
2016/0211224 System, Method and Apparatus to Relieve Stresses in a Semiconductor Wafer Caused by Uneven Internal...
Systems and methods for forming semiconductor wafers with wafer support structures includes: multiple semiconductor devices formed in multiple semiconductor...
2016/0211223 System, Method and Apparatus to Relieve Stresses in a Semiconductor Die Caused by Uneven Internal Metallization...
A system, method and apparatus for making a semiconductor die includes forming multiple semiconductor devices in a respective portion of a semiconductor wafer....
2016/0211222 SEMICONDUCTOR PACKAGES HAVING WIRE BOND WALL TO REDUCE COUPLING
A device (e.g., a Doherty amplifier) housed in an air cavity package includes one or more isolation structures over a surface of a substrate and defining an...
2016/0211221 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A selectively shielded and/or three-dimensional semiconductor device and a method of manufacturing thereof. For example and without limitation, various aspects...
2016/0211220 INDUCTOR SHIELDING STRUCTURE, INTEGRATED CIRCUIT INCLUDING THE SAME AND METHOD OF FORMING THE INTEGRATED CIRCUIT
An inductor shielding structure includes a first conductive layer including a plurality of first conductive lines having a first width and a plurality of...
2016/0211219 SEMICONDUCTOR DEVICE WITH AT LEAST ONE TRUNCATED CORNER AND/OR SIDE CUT-OUT
A method of producing a substantially rectangular semiconductor device having at least one corner truncation or corner cut-out or side cut-out, comprises: a)...
2016/0211218 PROCESS SUBSTRATE WITH CRYSTAL ORIENTATION MARK, METHOD OF DETECTING CRYSTAL ORIENTATION, AND READING DEVICE OF...
To provide a crystal orientation mark which can be formed easily and inexpensively, and which enables to perform high precision alignment and allows...
2016/0211217 SHEET FOR SEALING AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING SAID SHEET FOR SEALING
Provided is a thermosetting sheet for sealing which is used to seal an electronic device. One surface of the sheet has a surface roughness (Ra) of 3 .mu.m or...
2016/0211216 INTEGRATED CIRCUIT DEVICES AND METHODS
An integrated circuit device includes a first metal layer including aluminum. The integrated circuit device includes a second metal layer including an...
2016/0211215 SEMICONDUCTOR DEVICES
Semiconductor devices are provided. The semiconductor devices may include a first interconnection structure and a second interconnection structure which are...
2016/0211214 POWER AMPLIFIER PACKAGE AND METHOD THEREOF
A device is provided, which includes a wiring structure including a first surface and a second surface opposite the first surface. The device also includes a...
2016/0211213 INTEGRATED CIRCUIT HAVING SLOT VIA AND METHOD OF FORMING THE SAME
An integrated circuit includes a first conductive line on a first metal level of the integrated circuit. The integrated circuit further includes a second...
2016/0211212 FISHBONE STRUCTURE ENHANCING SPACING WITH ADJACENT CONDUCTIVE LINE IN POWER NETWORK
In some embodiments, a fishbone structure in a power network includes a first conductive segment in a first conductive layer running in a first direction, a...
2016/0211211 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device is provided. The semiconductor device includes a first porous interlayer insulating film having a low dielectric constant and including...
2016/0211210 FLEXIBLE DISPLAY AND METHOD OF MANUFACTURING THE SAME
A flexible display and method of manufacturing the same are disclosed. In one aspect, the display includes a flexible substrate having a bending area and a...
2016/0211209 SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING THE SAME
A semiconductor structure and a method for fabricating the semiconductor structure are provided. The semiconductor structure includes a substrate, a plurality...
2016/0211208 ELECTRICAL INTERCONNECT FOR AN INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME
An interconnect assembly for an embedded chip package includes a dielectric layer, first metal layer comprising upper contact pads, second metal layer...
2016/0211207 SEMICONDUCTOR ASSEMBLY HAVING WIRING BOARD WITH ELECTRICAL ISOLATOR AND MOISTURE INHIBITING CAP INCORPORATED...
A method of making a wiring board is characterized by the provision of moisture inhibiting caps covering interfaces between an electrical isolator/optional...
2016/0211206 MULTILAYER STRUCTURE FOR A SEMICONDUCTOR DEVICE AND A METHOD OF FORMING A MULTILAYER STRUCTURE FOR A...
A multilayer structure for a semiconductor device and a method of forming a multilayer structure for a semiconductor device. The multilayer structure...
2016/0211205 MOUNTING SUBSTRATE WAFER, MULTILAYER CERAMIC SUBSTRATE, MOUNTING SUBSTRATE, CHIP MODULE, AND MOUNTING SUBSTRATE...
A wafer for mounting substrates according to the present disclosure includes a multilayer ceramic substrate including top face electrodes, bottom face...
2016/0211204 ELECTRONIC PACKAGE
An electronic package is provided. The electronic package includes an insulator having a recessed portion formed therein; an electronic element embedded in the...
2016/0211203 ISOLATION METHOD FOR A STAND ALONE HIGH VOLTAGE LATERALLY-DIFFUSED METAL-OXIDE SEMICONDUCTOR (LDMOS) TRANSISTOR
A semiconductor package having a lead frame over which a first device and a second device are spaced is provided. The lead frame includes a die pad upon which...
2016/0211202 SEMICONDUCTOR DEVICE
A miniaturized semiconductor device includes a frame body having an opening region formed in a central portion, an insulating substrate which is provided in...
2016/0211201 MANUFACTURING AND EVALUATION METHOD OF A SEMICONDUCTOR DEVICE
Provided is a method of manufacturing a semiconductor device which includes a semiconductor chip, an insulating board mounted with the semiconductor chip and...
2016/0211200 SEMICONDUCTOR DEVICE
One embodiment provides a semiconductor device having a first chip for lowering an input voltage and a second chip for performing signal processing, mounted on...
2016/0211199 LEAD FRAME, ELECTRONIC CONTROL DEVICE USING LEAD FRAME, AND LEAD-FRAME MOUNTING METHOD
Conventional lead frames could neither be self-supporting nor be picked up by an automatic mounter through suction and mounted on a circuit board. Lead frame...
2016/0211198 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
The present invention provides a semiconductor device and a method for manufacturing a semiconductor device. The method comprises: Preparing a semiconductor...
2016/0211197 LEADLESS CHIP CARRIER HAVING IMPROVED MOUNTABILITY
Consistent with an example embodiment, there is surface-mountable non-leaded chip carrier for a semiconductor device. The device comprises a first contact. A...
2016/0211196 METHOD OF PRODUCING A SEMICONDUCTOR PACKAGE
A method of manufacturing a lead frame includes providing an electrically conductive layer having a plurality of holes at a top surface. The plurality of holes...
2016/0211195 ELECTRONIC PART MOUNTING SUBSTRATE AND METHOD FOR PRODUCING SAME
In a method for producing an electronic part mounting substrate wherein an electronic part 14 is mounted on one major surface (a surface to which the...
2016/0211194 SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
A semiconductor package structure and method for forming the same are provided. The semiconductor package structure includes a substrate and the substrate has...
2016/0211193 STACKED COOLER
A stacked cooler includes flow pipes that are stacked, each of the flow pipes having a flat shape and including a medium passage in which a heat medium flows,...
2016/0211192 COOLER
A cooler includes a cooling pipe having a cooling surface in contact with a heat-exchanged component, and a refrigerant passage. A pair of outer passages are...
2016/0211191 HEAT SINK ASSEMBLY WITH FRAME CLIP FOR FULLY ASSEMBLED ATTACHMENT TO HEAT GENERATING COMPONENT
An assembly for engaging a heat sink with an electrical component heat source includes a first retaining device with a frame that defines an opening to receive...
2016/0211190 DUAL-SIDED DIE PACKAGES
An apparatus including a die, a first side of the die including a first type of system level contact points and a second side including a second type of...
2016/0211189 Chip carrier laminate with high frequency dielectric and thermomechanical buffer
A chip carrier for carrying an encapsulated electronic chip, wherein the chip carrier comprises a laminate structure formed as a stack of a plurality of...
2016/0211188 SEMICONDUCTOR PACKAGES, METHODS OF MANUFACTURING THE SAME, ELECTRONIC SYSTEMS INCLUDING THE SAME, AND MEMORY...
A semiconductor package includes an adhesive member disposed on a package substrate to have a trapezoid cross-section view, and a semiconductor chip disposed...
2016/0211187 MONITORING SEMICONDUCTOR DEVICE, METHOD FOR PERFORMING DEEP N-TYPED WELL-CORRELATED (DNW-CORRELATED) ANTENNA...
A semiconductor monitoring device includes a substrate, a die seal ring formed on the substrate, a deep n-typed well formed in the substrate under the die seal...
2016/0211186 PLASMA PROCESSING APPARATUS
A processing apparatus and a processing method for a semiconductor wafer, which allow stable end point detection, are provided. In the plasma processing...
2016/0211185 SUBSTRATE-SCALE MASK ALIGNMENT
Methods and systems for alignment of substrate-scale masks are described. The alignment methods presented may improve the uniformity and repeatability of...
2016/0211184 METHOD FOR MAKING A THREE DIMENSIONAL INTEGRATED ELECTRONIC CIRCUIT
A method for making a three-dimensional integrated electronic circuit comprising steps for: making a first electrically conductive portion on a first...
2016/0211183 SEMICONDUCTOR DEVICE WITH METAL GATE AND HIGH-K DIELECTRIC LAYER, CMOS INTEGRATED CIRCUIT, AND METHOD FOR...
A semiconductor device includes a gate dielectric layer over a substrate, a metal layer over the gate dielectric layer, a capping layer over the metal layer,...
2016/0211182 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor device including: a first conductivity type transistor and a second conductivity type transistor, wherein each of the first conductivity type...
2016/0211181 TRANSISTOR STRUCTURE AND FABRICATION METHODS WITH AN EPITAXIAL LAYER OVER MULTIPLE HALO IMPLANTS
A method of forming a transistor can include forming a gate mask on a substrate having a vertical location aligned with that of a transistor control gate;...
2016/0211180 SEMICONDUCTOR PIECE MANUFACTURING METHOD
A semiconductor piece manufacturing method includes: a process of forming a fine groove on a front surface side including a first groove portion having a width...
2016/0211179 METHOD OF PROCESSING A SEMICONDUCTOR SUBSTRATE AND SEMICONDUCTOR CHIP
A method of processing a semiconductor substrate is provided. The method may include forming a film over a first side of a semiconductor substrate, forming at...
2016/0211178 METHOD OF DICING A WAFER AND SEMICONDUCTOR CHIP
A method of dicing a wafer may include forming a plurality of active regions in a wafer, each active region including at least one electronic component, the...
2016/0211177 METHOD OF MANUFACTURING THIN-FILM TRANSISTOR
According to one embodiment, a method of manufacturing a thin-film transistor includes forming a semiconductor layer on a gate electrode with an insulating...
2016/0211176 METHOD FOR FORMING INTEGRATED CIRCUIT STRUCTURE WITH THINNED CONTACT
Methods for forming integrated circuit structures are provided. The method includes providing a substrate including a first diffusion region, a second...
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