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Patent # Description
2016/0218078 ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT
An electronic component comprises: a resin frame; a semiconductor substrate housed in the resin frame; a plate shape metal member having at least one end fixed...
2016/0218077 Composite Sheet for Resin Film Formation
The present invention relates to a composite sheet for resin film formation composed of a pressure-sensitive adhesive sheet having a pressure-sensitive...
2016/0218076 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, a semiconductor device includes a first conductive portion, a second conductive portion, a first layer, and a second layer. The...
2016/0218075 Post-Passivation Interconnect Structure and Method of Forming Same
A semiconductor device including a dielectric layer formed on the surface of a post-passivation interconnect (PPI) structures. A polymer layer is formed on the...
2016/0218074 SEMICONDUCTOR PACKAGES WITH AN INTERMETALLIC LAYER AND RELATED METHODS
A method of forming a semiconductor package. Implementations include forming on a die backside an intermediate metal layer having multiple sublayers, each...
2016/0218073 SEMICONDUCTOR DEVICE
A semiconductor device includes a first metal wiring formed on a semiconductor substrate, a first organic insulating film formed on the first metal wiring, and...
2016/0218072 ANTENNA CAVITY STRUCTURE FOR INTEGRATED PATCH ANTENNA IN INTEGRATED FAN-OUT PACKAGING
An integrated fan-out package having a top-side redistribution wiring structure, a back-side redistribution wiring layer, a ground plane provided in the...
2016/0218071 SMART CARD AND METHOD OF MANUFACTURING SMART CARD
An integrated circuit includes a detector circuit including a sensor configured to sense an alteration to a physical characteristic of a substrate and to...
2016/0218070 MULTILAYER STRUCTURE IN AN INTEGRATED CIRCUIT FOR DAMAGE PREVENTION AND DETECTION AND METHODS OF CREATING THE SAME
Various embodiments facilitate die protection for an integrated circuit. In one embodiment, a multilayer structure is formed in multiple levels and along the...
2016/0218069 SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor device includes wiring layers formed over a semiconductor wafer, a via-layer between the wiring layers, conductive films in the wiring layers,...
2016/0218068 SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
A semiconductor device, including: an intermediate plate; a semiconductor element connected to one of surfaces of the intermediate plate by a brazing filler...
2016/0218067 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, a nitride semiconductor layer formed on the substrate, and a protection layer, comprising carbon, covering a side...
2016/0218066 Alignment Marks in Non-STI Isolation Formation and Methods of Forming the Same
A method includes forming a photo resist over a semiconductor substrate of a wafer, patterning the photo resist to form a first opening in the photo resist,...
2016/0218065 SEMICONDUCTOR PACKAGES AND PACKAGE MODULES USING THE SAME
A semiconductor package includes a flexible film substrate including a chip mounting region and a cut-line interposed between an inner region and an outer...
2016/0218064 SEMICONDUCTOR PACKAGE WITH EMBEDDED COMPONENTS AND METHOD OF MAKING THE SAME
A semiconductor package may include a lower substrate with one or more electronic components attached to a surface thereof and an upper substrate with one or...
2016/0218063 FAN -OUT WAFER LEVEL PACKAGING STRUCTURE
Described herein is a semiconductor device and the manufacturing method thereof, wherein the semiconductor device includes a first die including a first pad...
2016/0218062 THIN FILM RESISTOR INTEGRATION IN COPPER DAMASCENE METALLIZATION
An integrated circuit with copper damascene interconnects includes a thin film resistor. Copper damascene metal lines are formed in a first ILD layer. A...
2016/0218061 SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE
A highly reliable semiconductor device. In a configuration where a precharged source line is discharged to a bit line by establishing electrical continuity...
2016/0218060 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
An improvement is achieved in the performance of a semiconductor-device. The semiconductor device includes MISFETs formed in the upper surface of a substrate,...
2016/0218059 COMPOSITE CONTACT VIA STRUCTURE CONTAINING AN UPPER PORTION WHICH FILLS A CAVITY WITHIN A LOWER PORTION
A contact via cavity can be filled with a lower structure and an upper structure. The lower structure can be a conductive structure that is formed by...
2016/0218058 SEMICONDUCTOR DEVICE
A semiconductor device and a method of making the same. The device includes a semiconductor substrate provided in a chip-scale package (CSP). The device also...
2016/0218057 INTERPOSERS AND FABRICATION METHODS THAT USE NANOPARTICLE INKS AND MAGNETIC FIELDS
Interposer circuitry (130) is formed on a possibly sacrificial substrate (210) from a porous core (130') covered by a conductive coating (130'') which...
2016/0218056 INTERMETALLIC COMPOUND FILLED VIAS
Electronic devices including intermetallic columns within vias are provided. Vias are filled with one or more pastes containing metal particles. Thermal...
2016/0218055 SEMICONDUCTOR PACKAGING AND MANUFACTURING METHOD THEREOF
The present disclosure provides a semiconductor package includes a contact pad, a device external to the contact pad and a solder bump on the contact pad. The...
2016/0218054 DC-DC CONVERTER HAVING TERMINALS OF SEMICONDUCTOR CHIPS DIRECTLY ATTACHABLE TO CIRCUIT BOARD
A power supply system has a leadframe with leads and a pad. The pad surface facing a circuit board has a portion recessed with a depth and an outline suitable...
2016/0218053 CHIP-ON-FILM PACKAGE AND DISPLAY DEVICE INCLUDING THE SAME
A chip-on-film (COF) package includes a base film, a semiconductor chip mounted on a chip mounting region of a top surface of the base film, a plurality of top...
2016/0218052 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the...
2016/0218051 LEAD FRAME
A lead frame, as one product unit in a multi-row lead frame sharing a partition frame among other lead frames, has a non-mirrorsymmetric pad region and at...
2016/0218050 POWER MODULE AND FABRICATION METHOD FOR THE SAME
A power module includes: an insulating layer; a first metallic plate disposed on the insulating layer; a first semiconductor chip disposed on the first...
2016/0218049 Semiconductor Device and Method of Manufactures
A semiconductor device and method of manufacture is provided. A reflowable material is placed in electrical connection with a through via, wherein the through...
2016/0218048 MICROFLUIDIC CHANNELS FOR THERMAL MANAGEMENT OF MICROELECTRONICS
Heat spreading device using microfabricated microfluidic structures to cool microelectronic devices.
2016/0218047 SEMICONDUCTOR DEVICE
In a semiconductor device, a second heat sink and a third heat sink are electrically connected by a joint portion in an alignment direction in which a first...
2016/0218046 SEMICONDUCTOR DEVICE AND STRUCTURE
A 3D device, including: a first layer including first transistors, the first transistors interconnected by a first layer of interconnection; a second layer...
2016/0218045 GLASS FRIT WAFER BOND PROTECTIVE STRUCTURE
A bonded semiconductor device comprising a support substrate, a semiconductor device located with respect to one side of the support substrate, a cap substrate...
2016/0218044 Device Comprising a Ductile Layer and Method of Making the Same
Device comprising a ductile layer, a method for making a component comprising a ductile layer and a method for testing a component are disclosed. An embodiment...
2016/0218043 FIN FIELD EFFECT TRANSISTOR INCLUDING ASYMMETRIC RAISED ACTIVE REGIONS
Merged and unmerged raised active regions on semiconductor fins can be simultaneously formed on a same substrate by control of growth rates of a deposited...
2016/0218042 Nonplanar Device and Strain-Generating Channel Dielectric
A nonplanar circuit device having a strain-producing structure disposed under the channel region is provided. In an exemplary embodiment, the integrated...
2016/0218041 TECHNIQUE OF REDUCING SHALLOW TRENCH ISOLATION LOSS DURING FIN FORMATION IN FINFETS
A method of fabricating a semiconductor device includes: providing a semiconductor substrate including a hard mask layer; performing, using the hard mask...
2016/0218040 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
An insulating film and another insulating film are formed over a semiconductor substrate in that order to cover first, second, and third gate electrodes. The...
2016/0218039 Method for Handling a Product Substrate, a Bonded Substrate System and a Temporary Adhesive
A method for handling a product substrate includes bonding a carrier to the product substrate. A layer of a permanent adhesive is applied onto a surface of the...
2016/0218038 NOVEL PATTERNING APPROACH FOR IMPROVED VIA LANDING PROFILE
The present disclosure is directed to a semiconductor structure and a method of manufacturing a semiconductor structure in which a spacer element is formed...
2016/0218037 DEVICE MANUFACTURING METHOD
A device manufacturing method according to an embodiment includes forming a film on the side of a second surface of a substrate having a first surface and the...
2016/0218036 METHOD OF FABRICATING A SEMICONDUCTOR DEVICE WITH REDUCED LEAK PATHS
A method of manufacturing a semiconductor device includes fabricating a transistor, surrounding a gate of the transistor with a spacer, and applying an...
2016/0218035 INTERCONNECT STRUCTURE AND MANUFACTURING METHOD THEREOF
The present disclosure provides an interconnect structure, including a substrate, a first conductive feature over the substrate, a second conductive feature...
2016/0218034 METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING BACK-END-OF-THE-LINE INTERCONNECT STRUCTURES
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes selectively depositing a...
2016/0218033 Intermediate Layer for Copper Structuring and Methods of Formation Thereof
A method of forming a metallization layer over a semiconductor substrate includes depositing a blanket layer of a diffusion barrier liner over an inter level...
2016/0218032 Methods of forming a nanostructured polymer material including block copolymer materials
Methods for fabricating sub-lithographic, nanoscale microstructures utilizing self-assembling block copolymers, and films and devices formed from these methods...
2016/0218031 ROBOT
A seal belt includes inner and outer belt sections. The inner belt section revolves according to the movable member movement. The outer belt section includes,...
2016/0218030 END EFFECTOR FOR WAFER TRANSFER SYSTEM AND METHOD OF TRANSFERRING WAFERS
An end effector of a wafer transfer system includes synchronously movable blades operable to hold and release wafers. The end effector comprises an end...
2016/0218029 SEMICONDUCTOR PROCESS EQUIPMENT
A system for processing a substrate is provided including a first planar motor, a substrate carrier, a first processing chamber, and a first lift. The first...
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