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Patent # Description
2016/0226543 CARD HOLDER AND MOBILE TERMINAL
Provided are a card holder and a mobile terminal. The card holder includes: a first groove, disposed on a front surface of the card holder and configured to...
2016/0226542 WEARABLE SYSTEM
A wearable device includes a band having a flexible battery integrally formed therein; a processor powered by the flexible battery; a cellular transceiver to...
2016/0226541 Radio Receiver With Local Oscillator Modulation
An antenna subsystem receives an analog desired signal, noise, and interference via a communication channel. The desired signal includes modulated encoded...
2016/0226540 RECEPTION CIRCUIT AND COMMUNICATION SYSTEM
According to an embodiment, a reception circuit is configured to receive a reception signal from a transmission circuit through a receiving AC coupling...
2016/0226539 RECEIVER CONTROL BASED ON ERROR DETECTION IN MULTIPLE, SIMULTANEOUS RADIO ACCESS TECHNOLOGY ENVIRONMENTS
Systems, methods, apparatuses, and media are provided for improved receiver control based on error detection results in multiple, simultaneous radio access...
2016/0226538 METHOD AND APPARATUS FOR CANCELLING INTERFERENCE AND RECEIVING SIGNAL IN WIRELESS COMMUNICATION SYSTEM
The present invention relates to a wireless communication system. A method for cancelling interference and receiving a signal by a user equipment in a wireless...
2016/0226537 System for and Method of Removing Unwanted Inband Signals from a Received Communication Signal
A system for and method of removing one or more unwanted inband signals from a received communications signal is described. The inband signal or signals may...
2016/0226536 SWITCHING RESONATOR FILTER CIRCUITS AND METHODS
The present disclosure includes switching resonant filter circuits and methods. In one embodiment, a circuit includes a plurality of resonant switching...
2016/0226535 METHOD FOR PILOT SIGNAL BASED SELF-INTEFERENCE CANCELLATION TUNING
A method for pilot signal based self-interference cancellation tuning includes detecting a tuning trigger and in response to the tuning trigger, generating a...
2016/0226534 WIRELESS COMMUNICATION METHOD, ENODEB, AND USER EQUIPMENT
The wireless communication method used for transmitting interfering resource allocation information (IRAI) comprises a step of transmitting the IRAI through L1...
2016/0226533 WIRELESS RECEIVING DEVICE AND SIGNAL PROCESSING METHOD THEREOF
A wireless receiving device includes: a time-domain channel estimation circuit, generating channel information in the time domain according to a part of a...
2016/0226532 SPECTRUM SENSING DETECTOR AND SPECTRUM SENSING DETECTION METHOD THEREOF
A spectrum sensing detector and a spectrum sensing detection method thereof are provided. The spectrum sensing detector receives a radio signal, and generates...
2016/0226531 DATA TRANSFER APPARATUS
An apparatus for transferring data from a first part of a measuring apparatus to a second part includes a signal transmitting part mounted to the second part...
2016/0226530 Multi-Processor Platform for Wireless Communication Terminal Having a Partitioned Protocol Stack
A multi-mode wireless communication device and multi-mode communication method are disclosed. The multi-mode device includes a first baseband co-processor...
2016/0226529 System and Method for Real Time Video Communication Employing Fountain Coding
Real-time video can be efficiently and reliably streamed over wireless networks by fountain encoding a stream of video packets at the frame-level....
2016/0226528 NON-UNIFORM QUANTIZATION OF LOG LIKELIHOOD RATIOS
A method of processing a signal by non-uniform quantization of log likelihood ratios is disclosed. In particular a disclosed method comprising the steps of:...
2016/0226527 MAP DECODING METHOD USING AUGMENTED LATTICES
The invention relates to a MAP decoding method of a signal received through a noisy channel, the signal being composed of symbols in an alphabet having a...
2016/0226526 Systems and Methods for Soft Data Based Cross Codeword Error Correction
Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for error correction in a data processing system.
2016/0226525 METHOD AND APPARATUS FOR PROVIDING A JOINT ERROR CORRECTION CODE FOR A COMBINED DATA FRAME COMPRISING FIRST...
An apparatus (100) for providing an joint error correction code (140) for a combined data frame (254) comprising first data (112) of a first data channel and...
2016/0226524 CONVOLUTION-ENCODED HYPER-SPEED CHANNEL WITH ROBUST TRELLIS ERROR-CORRECTION
A method, system, and computer program product for performing robust, parallel data transfer by a processor device. Data is segmented into k-bit segments,...
2016/0226523 DECODING DEVICE AND DECODING METHOD
According to an embodiment, a decoding device includes a variable node processor, a check node processor, a first forwarder, and a second forwarder. The...
2016/0226522 SELECTING A DATA STORAGE RESOURCE OF A DISPERSED STORAGE NETWORK
A method begins by a computing device of a dispersed storage network (DSN) sending, to a set of storage units of the DSN, a set of write requests regarding a...
2016/0226521 Touch-on-Metal Keypad with N-1 Key Scan Averaging
For touch-on-metal (ToM) apparatus, an N-1 key scan averaging (with baseline drift compensation) technique, including: (a) during successive key-scan periods,...
2016/0226520 ENCODING METHOD AND ENCODING DEVICE
An encoding device searches input text data for a date-time notation string that represents at least a date or time. The encoding device generates, upon...
2016/0226519 METHOD AND DEVICE FOR COMPRESSING FIRMWARE PROGRAM, METHOD AND DEVICE FOR DECOMPRESSING FIRMWARE PROGRAM
A method and a device are provided for compressing/decompressing a firmware program in the field of computer technology. The method includes: acquiring a code...
2016/0226518 Parallel Processing of Data Having Data Dependencies for Accelerating the Launch and Performance of Operating...
Representative embodiments are disclosed for a rapid and highly parallel decompression of compressed executable and other files, such as executable files for...
2016/0226517 Modified Huffman Decoding
A plurality of bits is retrieved from a bitstream that comprises encoded media content. The plurality of bits may include at least a portion of a codeword. An...
2016/0226516 NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM, COMPRESSION METHOD, DECOMPRESSION METHOD, COMPRESSION...
At a preliminary stage, a compressing unit generates frequency information, outputs a compression code associated with a piece of first data of the longest...
2016/0226515 SYSTEM AND METHOD FOR DIGITAL SIGNALING
Systems and methods for communicating digital data over a group of conductors include encoding data based on electromagnetic parameter values associated with...
2016/0226514 ADAPTIVE COMPRESSION OF DATA
A method of encoding data includes determining a magnitude of change between a first value associated with first data and a second value associated with second...
2016/0226513 ADAPTIVE COMPRESSION OF DATA
A method of encoding data includes determining a magnitude of change between a first value associated with first data and a second value associated with second...
2016/0226512 COMPRESSION OF INTEGER DATA USING A COMMON DIVISOR
According to one embodiment of the present invention, a system for compressing data determines a common divisor for a set of values comprising integers. The...
2016/0226511 NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM, COMPRESSION METHOD, DECOMPRESSION METHOD, COMPRESSION DEVICE...
An information processing apparatus according to an embodiment determines whether a target character string is registered in a first dictionary, the target...
2016/0226510 D/A CONVERSION CIRCUIT, OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT
A D/A conversion circuit includes a plurality of resistors that are formed on a semiconductor substrate and that are connected in series to each other and a...
2016/0226509 Distributed Combiner for Parallel Discrete-to-Linear Converters
Provided are, among other things, systems, apparatuses methods and techniques for providing a complete output signal from a set of partial signals, which in...
2016/0226508 Semiconductor Device
In a semiconductor device, a sine wave signal is input to a first input part and a cosine wave signal is input to a second input part. A multiplexer...
2016/0226507 SUCCESSIVE APPROXIMATION RESISTER ANALOG-TO-DIGITAL CONVERTER HAVING SEPARABLE DUAL CAPACITOR ARRAY
A successive approximation register analog-to-digital converter including separable dual capacitor array is disclosed. The disclosed successive approximation...
2016/0226506 SWITCH CIRCUIT, ANALOG-TO-DIGITAL CONVERTER, AND INTEGRATED CIRCUIT
A switch circuit includes: a sampling transistor including a source connected to an input node and a drain connected to an output node; a control circuit which...
2016/0226505 SYSTEM FOR ANALYSING THE FREQUENCY OF A SIGNAL, A METHOD THEREOF AND A SYSTEM FOR MEASURING THE RELATIVE PHASE...
There is provided a frequency analysis system, comprising: an analogue to digital converter having a sampling frequency f.sub.s; a first band pass filter and a...
2016/0226504 INTEGRATED CIRCUIT HAVING A CLOCK DESKEW CIRCUIT THAT INCLUDES AN INJECTION-LOCKED OSCILLATOR
Methods and apparatuses featuring an injection-locked oscillator (ILO) are described. In some embodiments, an ILO can have multiple injection points and a...
2016/0226503 INTERFACE CIRCUIT FOR HIGH SPEED COMMUNICATION, AND SEMICONDUCTOR APPARATUS AND SYSTEM INCLUDING THE SAME
An interface circuit of a semiconductor apparatus may include a pulse generation unit, a data clock synchronization unit and a system clock synchronization...
2016/0226502 SINGLE CYCLE ASYNCHRONOUS DOMAIN CROSSING CIRCUIT FOR BUS DATA
Techniques are disclosed for managing the timing between two asynchronous clocks. The techniques are particularly well-suited for synchronizing the reference...
2016/0226501 System And Method For Fast-Capture Multi-Gain Phase Lock Loop
A phase locked loop system has a voltage-controlled variable-load ring oscillator (VLCO) that operates in a frequency band determined by a selected load on...
2016/0226500 PLL AND ADAPTIVE COMPENSATION METHOD IN PLL
In a method for mitigating the vibration-induced phase noise of an phase locked loop with an acceleration sensitive voltage controlled oscillator, a correction...
2016/0226499 SOURCE-SYNCHRONOUS RECEIVER USING EDGE-DETECTION CLOCK RECOVERY
A source-synchronous clocking signal is sampled by an edge sampler triggered by a phase-adjusted version of the clocking signal. The output of the edge sampler...
2016/0226498 Adaptive Clocking Scheme
Adaptive clocking schemes for synchronized on-chip functional blocks are provided. The clocking schemes enable synchronous clocking which can be adapted...
2016/0226497 OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT
An oscillator includes an oscillation element, an oscillation circuit, a heat generation element, a temperature control circuit, and a temperature correction...
2016/0226496 INTEGRATED CIRCUIT DEVICE HAVING AN INJECTION-LOCKED OSCILLATOR
A variable injection-strength injection-locked oscillator (ILO) is described. The variable injection-strength ILO can output an output clock signal based on an...
2016/0226495 APPARATUSES AND METHODS FOR LOW POWER COUNTING CIRCUITS
Apparatuses and methods for low power counting circuits are described herein. An example apparatus may include a frequency divider configured to receive an...
2016/0226494 MODULO-M BINARY COUNTER
An input value, where the input value is an amount which the current value of the counter is to be increased is received. The current value of the modulo...
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