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Patent # Description
2016/0225793 DIRECT BANDGAP SUBSTRATES AND METHODS OF MAKING AND USING
An indirect bandgap thin film semiconductor circuit can be combined with a compound semiconductor LED such as to provide an active matrix LED array that can...
2016/0225792 DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
A display device and a method of manufacturing the same are disclosed. In one aspect, the display device includes a display area formed over a substrate and...
2016/0225791 ULTRATHIN BODY (UTB) FINFET SEMICONDUCTOR STRUCTURE
For fabrication of a semiconductor structure, there is set forth herein a method of fabricating a semiconductor structure, the method including forming a...
2016/0225790 SEMICONDUCTOR DEVICE
A semiconductor device is described, which includes a first transistor, a second transistor, and a capacitor. The second transistor and the capacitor are...
2016/0225789 REPLACEMENT FIN PROCESS IN SSOI WAFER
A method of forming replacement fins in a complimentary-metal-oxide-semiconductor (CMOS) device that includes a p-type field effect transistor device (pFET)...
2016/0225788 THIN FILM TRANSISTOR ARRAY PANEL AND A METHOD FOR MANUFACTURING THE SAME
A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect...
2016/0225787 DISPLAY APPARATUS
An area of a region arranged on one side out of a display region in a direction in which scanning signal lines extend is reduced. A display apparatus includes:...
2016/0225786 VERTICAL MEMORY DEVICES HAVING CHARGE STORAGE LAYERS WITH THINNED PORTIONS
A semiconductor device includes a stack comprising insulating patterns vertically stacked on a substrate and gate patterns interposed between the insulating...
2016/0225785 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
A semiconductor memory device includes a stack including gate electrodes and insulating layers that are alternately and repeatedly stacked on a substrate. A...
2016/0225784 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
According to one embodiment, a method for manufacturing a semiconductor device includes modifying surfaces of the first mask films and surfaces of the second...
2016/0225783 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, a semiconductor memory device includes a substrate; a stacked body provided on the substrate and including a plurality of...
2016/0225782 METHODS OF ADJUSTING FLATBAND VOLTAGE OF A MEMORY DEVICE
Methods for adjusting a flatband voltage of a memory device, including applying a voltage to a control gate of the memory device such that charged species are...
2016/0225781 THREE-DIMENSIONAL NONVOLATILE MEMORY DEVICES INCLUDING INTERPOSED FLOATING GATES
Provided are three-dimensional nonvolatile memory devices and methods of fabricating the same. The memory devices include semiconductor pillars penetrating...
2016/0225780 Method of Forming a Logic Compatible Flash Memory
A method includes forming a first pad oxide layer and a second pad oxide layer over a first active region and a second active region, respectively, of a...
2016/0225779 SEMICONDUCTOR NONVOLATILE MEMORY ELEMENT AND MANUFACTURING METHOD THEREOF
A semiconductor nonvolatile memory element is used to form a constant current source in a semiconductor integrated circuit device. The semiconductor...
2016/0225778 NON-VOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing a semiconductor device includes providing a semiconductor substrate having a core region and a peripheral region, and prior to...
2016/0225777 NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF
A non-volatile memory having memory cells is provided. The memory cells include stack structures, floating gates, tunneling dielectric layers, erase gate...
2016/0225776 Method to Improve Floating Gate Uniformity for Non-Volatile Memory Devices
The present disclosure relates an integrated circuit (IC) for an embedded flash memory device. In some embodiments, the IC includes a memory array region and a...
2016/0225775 METHODS FOR PRODUCING A THIN FILM FERROELECTRIC DEVICE USING A TWO-STEP TEMPERATURE PROCESS
Methods for producing ferroelectric device are described. A method includes positioning an organic polymeric ferroelectric layer between two conductive...
2016/0225774 STORAGE ELEMENT, STORAGE DEVICE, AND SIGNAL PROCESSING CIRCUIT
A signal processing circuit whose power consumption can be suppressed is provided. In a period during which a power supply voltage is not supplied to a storage...
2016/0225773 SEMICONDUCTOR DEVICE
A semiconductor device capable of retaining data for a long time is provided. The semiconductor device includes first to third transistors, a fourth transistor...
2016/0225772 SEMICONDUCTOR DEVICE AND MEMORY DEVICE
A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor....
2016/0225771 FABRICATING FIN STRUCTURES WITH DOPED MIDDLE PORTIONS
Methods are provided for fabricating fin structures. The methods include: fabricating at least one fin structure, the at least one fin structure having a doped...
2016/0225770 REPLACEMENT FIN PROCESS IN SSOI WAFER
A method of forming replacement fins in a complimentary-metal-oxide-semiconductor (CMOS) device that includes a p-type field effect transistor device (pFET)...
2016/0225769 CIRCUIT DESIGN SYSTEM AND SEMICONDUCTOR CIRCUIT DESIGNED BY USING THE SYSTEM
A system and method may determine the operating parameters, such as voltages, of MOS transistors within a circuit design by testing or simulation, for example...
2016/0225768 III-V CMOS INTEGRATION ON SILICON SUBSTRATE VIA EMBEDDED GERMANIUM-CONTAINING LAYER
After forming a first trench and a second trench extending through a top elemental semiconductor layer present on a substrate including, from bottom to top, a...
2016/0225767 OFF-CENTER GATE CUT
A semiconductor device includes a diffusion area, a gate structure coupled to the diffusion area, and a dummy gate structure coupled to the diffusion area. The...
2016/0225766 SEMICONDUCTOR DEVICE WITH LOW-K SPACER
A semiconductor device includes gates and a low-k spacer. The low-k spacer includes low-k spacer portions formed upon the gate sidewalls and a low-k spacer...
2016/0225765 Multi-Fin Device and Method of Making Same
A multiple-fin device includes a substrate and a plurality of fins formed on the substrate. Source and drain regions are formed in the respective fins. A...
2016/0225764 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes first and second Fin FET transistors and a separation plug made of an insulating material and disposed between the first and...
2016/0225763 SPECIAL CONSTRUCT FOR CONTINUOUS NON-UNIFORM RX FINFET STANDARD CELLS
Methods for abutting two cells with different sized diffusion regions and the resulting devices are provided. Embodiments include abutting a first cell having...
2016/0225762 SINGLE DIFFUSION BREAK WITH IMPROVED ISOLATION AND PROCESS WINDOW AND REDUCED COST
Methods of forming a SDB with a partial or complete insulator structure formed over the SDB and resulting devices are provided. Embodiments include forming a...
2016/0225761 SEMICONDUCTOR DEVICE HAVING A PLURALITY OF FINS AND METHOD FOR FABRICATING THE SAME
A semiconductor device having a plurality of fins including at least one first fin and at least one second fin formed on a semiconductor substrate is provided....
2016/0225760 TRANSITION FREQUENCY MULTIPLIER SEMICONDUCTOR DEVICE
A transition frequency multiplier semiconductor device having a first source region, a second source region, and a common drain region is disclosed. A first...
2016/0225759 POWER FET WITH A RESONANT TRANSISTOR GATE
A semiconductor FET provides a resonant gate and source and drain electrodes, wherein the resonant gate is electromagnetically resonant at one or more...
2016/0225758 SEMICONDUCTOR DEVICE COMPRISING AN ESD PROTECTION CIRCUIT
A semiconductor device and method. The device includes a first domain and a second domain each having a power rail and a ground rail. The device further...
2016/0225757 ELECTROSTATIC DISCHARGE PROTECTION STRUCTURE IN A SEMICONDUCTOR DEVICE
An electrostatic discharge protection structure includes a laterally diffused metal oxide semiconductor (LDMOS) device. The LDMOS device includes an embedded...
2016/0225756 METHOD OF FORMING AN ESD DEVICE AND STRUCTURE THEREFOR
In one embodiment, an ESD device is configured to include a trigger device that assists in forming a trigger of the ESD device. The trigger device is...
2016/0225755 ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND ELECTROSTATIC DISCHARGE PROTECTION SYSTEM
An ESD device disposed on a substrate is provided. The ESD device includes a first well, a second well, a first poly-silicon region, a second poly-silicon...
2016/0225754 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Disclosed are a semiconductor device and a manufacturing method thereof. The semiconductor device includes: source select lines, word lines, drain select...
2016/0225753 MEMORY CIRCUIT, LAYOUT OF MEMORY CIRCUIT, AND METHOD OF FORMING LAYOUT
A memory circuit includes a first active structure extending along a first direction, a second active structure extending along the first direction, a first...
2016/0225752 SEMICONDUCTOR DEVICE AND LAYOUT METHOD THEREOF
In some embodiments, a semiconductor device comprises a first active region, a second active region, and a conductive metal structure. The second active region...
2016/0225751 Hollow Metal Pillar Packaging Scheme
An integrated circuit includes a bottom substrate, a metal layer disposed over the bottom substrate and a hollow metal pillar disposed on the metal layer. The...
2016/0225750 ELECTRIC POWER CONVERTER AND POWER MODULE
An electric power converter includes a switching device that performs electric-power conversion through switching, an insulated substrate having a first side...
2016/0225749 Optoelectronic Semiconductor Chip and Optoelectronic Component
An optoelectronic semiconductor chip includes a semiconductor layer sequence. The semiconductor layer sequence includes a first semiconductor region of a first...
2016/0225748 PACKAGE-ON-PACKAGE (POP) STRUCTURE
A method for forming a package-on-package (POP) structure is disclosed. The method includes placing a post on a first integrated circuit (IC) package such that...
2016/0225747 LIGHTING MODULE WITH SEMICONDUCTOR LIGHT SOURCES AND CARRIER PLATE
Various embodiments may relate to a lighting module which is equipped with several semiconductor light sources, in particular LED-chips and includes a metallic...
2016/0225746 MULTIPLE DIE STACKING FOR TWO OR MORE DIE
A microelectronic package can include a substrate having first and second opposed surfaces, and first and second microelectronic elements having front surfaces...
2016/0225745 Semiconductor Device Having a Chip Under Package
A semiconductor device package includes an electronic component and an electrical interconnect. The electronic component is attached to the electrical...
2016/0225744 SEMICONDUCTOR PACKAGES, METHODS OF FABRICATING THE SAME, MEMORY CARDS INCLUDING THE SAME AND ELECTRONIC SYSTEMS...
A semiconductor package includes a package substrate having a cavity therein and a second internal contact portion, a semiconductor die disposed in the cavity...
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