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Patent # Description
2016/0225743 PACKAGE-ON-PACKAGE TYPE STACK PACKAGE AND METHOD FOR MANUFACTURING THE SAME
A bottom package having a first semiconductor chip and first connection members; and a top package disposed over the bottom package, and having a second...
2016/0225742 POLYGON DIE PACKAGING
A lidded or lidless flip-chip package includes two or more polygon shaped dies. The polygon dies may be interconnected to a substrate or to an interposer...
2016/0225741 METHODS FOR CONSTRUCTING THREE DIMENSIONAL (3D) INTEGRATED CIRCUITS (ICs) (3DICs) AND RELATED SYSTEMS
Methods for constructing three dimensional integrated circuits and related systems are disclosed. In one aspect, a first tier is constructed by creating active...
2016/0225740 METHOD FOR MANUFACTURING SEMICONDUCTOR DISPLAY PANEL
A manufacturing method includes: attaching a film onto a bonding surface of a wafer; performing laser cutting on the wafer to obtain a plurality of...
2016/0225739 OFF SUBSTRATE KINKING OF BOND WIRE
An electrically conductive lead is formed using a bonding tool. After bonding the wire to a metal surface and extending a length of the wire beyond the bonding...
2016/0225738 POWER SEMICONDUCTOR CHIP WITH A METALLIC MOULDED BODY FOR CONTACTING THICK WIRES OR STRIPS AND METHOD FOR THE...
The invention relates to a power semiconductor chip (10) having at least one upper-sided potential surface and contacting thick wires (50) or strips,...
2016/0225737 SINTERING MATERIALS AND ATTACHMENT METHODS USING SAME
Methods for die attachment of multichip and single components may involve printing a sintering paste on a substrate or on the back side of a die. Printing may...
2016/0225736 Fog Bonding Device and Method Thereof
A bonding device and bonding method for bonding an FPC film on a display panel through an anisotropic conductor attached to the display panel, the device...
2016/0225735 Method for Producing a Connecting Medium on an Assembly Partner, Method for Producing a Material-Fit Connection...
A method for producing a layer including a connecting medium on an assembly partner is provided. The method incudes providing a carrier on which the connecting...
2016/0225734 SEMICONDUCTOR DEVICES AND PACKAGES AND METHODS OF FORMING SEMICONDUCTOR DEVICE PACKAGES
Semiconductor device packages include first and second semiconductor dice in a facing relationship. At least one group of solder bumps is substantially along a...
2016/0225733 Chip Scale Package
A novel semiconductor chip scale package encapsulates a semiconductor chip on the device side, the non-device side, and the four edges with a mold compound....
2016/0225732 SEMICONDUCTOR DEVICE INCLUDING A BUFFER LAYER STRUCTURE FOR REDUCING STRESS
A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different...
2016/0225731 METHODS OF FORMING CONDUCTIVE PILLARS FOR SEMICONDUCTOR DEVICES, METHODS OF FORMING ELECTRICAL INTERCONNECTS,...
A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in...
2016/0225730 ELECTRODE CONNECTION STRUCTURE AND ELECTRODE CONNECTION METHOD
An electrode connection structure includes: a first electrode of an electrical circuit; and a second electrode of the electrical circuit that is electrically...
2016/0225729 SEMICONDUCTOR DEVICE, INTEGRATED CIRCUIT STRUCTURE USING THE SAME, AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a substrate, a semiconductor structure, a metal pad, and a stress releasing material. The semiconductor structure is disposed...
2016/0225728 METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive...
2016/0225727 Method and Apparatus of ESD Protection in Stacked Die Semiconductor Device
An apparatus includes an interposer and a plurality of dies stacked on the interposer. The interposer includes a first conductive network of a first trigger...
2016/0225726 SEMICONDUCTOR DEVICES HAVING AN ELECTRO-STATIC DISCHARGE PROTECTION STRUCTURE
A semiconductor device includes a substrate and a metallization layer. The substrate has an active region that includes opposite first and second edges. The...
2016/0225725 LASER DETECTOR USING LATCH AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
A laser detector includes a latch and a semiconductor device including the same. The laser detector includes a latch configured to output an output signal and...
2016/0225724 DEVICE AND METHOD FOR GENERATING IDENTIFICATION KEY
Provided is a device for generating an identification key using a process variation during a manufacturing process of a conductive layer. The device for...
2016/0225723 ENGINEERED CARRIER WAFERS
Apparatuses and methods for reducing the warp of semiconductor wafer stacks during manufacturing are disclosed. An engineered carrier wafer is disclosed. The...
2016/0225722 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD, AND ELECTRONIC APPARATUS
The present disclosure relates to a semiconductor device and a manufacturing method, and an electronic apparatus that enable manufacturing of a stacked...
2016/0225721 SEMICONDUCTOR PACKAGE
A semiconductor package having an upper surface, a lower surface, and at least one side surface is provided. The semiconductor package includes a mold member...
2016/0225720 Method and Apparatus for Creating and Placing a Micro Message
Silicon processing technology is used to generate an array of micro messages. These micro messages can contain at least one stick figure, or at least one word,...
2016/0225719 FOLDED BALLISTIC CONDUCTOR INTERCONNECT LINE
A method includes forming a folding template in a first dielectric layer. The folding template has a plurality of surfaces that are positioned in different...
2016/0225718 DEVICE INCLUDING A METALLIZATION LAYER AND METHOD OF MANUFACTURING A DEVICE
A device comprises a base element and a metallization layer over the base element. The metallization layer comprises pores and has a varying degree of...
2016/0225717 ELECTRONIC COMPONENT
In an embodiment, an electronic component includes a dielectric layer having a first surface and a second surface, one or more semiconductor dies embedded in...
2016/0225716 Structure and Method for a Low-K Dielectric with Pillar-Type Air-Gaps
A circuit device having an interlayer dielectric with pillar-type air gaps and a method of forming the circuit device are disclosed. In an exemplary...
2016/0225715 MICROELECTRONIC TRANSISTOR CONTACTS AND METHODS OF FABRICATING THE SAME
A transistor contact of the present description may be fabricated by forming a via through an interlayer dielectric layer disposed on a microelectronic...
2016/0225714 SEMICONDUCTOR DEVICES AND METHODS FOR FORMING THE SAME
A semiconductor device may include a cell gate conductive pattern in a cell array area that extends to a step area, a cell vertical structure in the cell array...
2016/0225713 SEMICONDUCTOR PACKAGE DESIGN PROVIDING REDUCED ELECTROMAGNETIC COUPLING BETWEEN CIRCUIT COMPONENTS
A single semiconductor device package that reduces electromagnetic coupling between elements of a semiconductor device embodied within the package is provided....
2016/0225712 ELECTRO-MIGRATION ENHANCING METHOD FOR SELF-FORMING BARRIER PROCESS IN COPPER METTALIZATION
A method of forming a barrier on both the sidewalls and bottom of a via and the resulting device are provided. Embodiments include forming a metal line in a...
2016/0225711 SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor substrate, a first insulating layer laminated on the semiconductor substrate, a first metal wiring pattern...
2016/0225710 SEMICONDUCTOR DEVICE WITH LINE-TYPE AIR GAPS AND METHOD FOR FABRICATING THE SAME
A method includes: forming a first contact hole by etching a first inter-layer dielectric layer; forming a preliminary first conductive plug that fills the...
2016/0225709 METAL LAYOUT FOR RADIO-FREQUENCY SWITCHES
Metal layout for radio-frequency (RF) switches. In some embodiments, an RF switching device can include a plurality of field-effect transistors (FETs) arranged...
2016/0225708 SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF
A semiconductor substrate includes an insulating layer and a conductive circuit layer embedded at a surface of the insulating layer. The conductive circuit...
2016/0225707 ELECTRONIC ASSEMBLY THAT INCLUDES STACKED ELECTRONIC DEVICES
The electronic package includes a substrate and an electronic component mounted to a surface of the substrate. An interposer is mounted to the surface of the...
2016/0225706 PRINTED CIRCUIT BOARD, SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
A printed circuit board, a semiconductor package and a method of manufacturing the same are provided. The printed circuit board includes a circuit layer...
2016/0225705 CORELESS MULTI-LAYER CIRCUIT SUBSTRATE WITH MINIMIZED PAD CAPACITANCE
A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types...
2016/0225704 SEMICONDUCTOR PACKAGE STRUCTURE AND FORMING METHOD THEREOF
A semiconductor package structure and forming method thereof; the semiconductor package structure includes a heat sink frame (2) and a lead frame (1), where...
2016/0225703 POWER SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING THE SAME
The present invention relates to a power semiconductor module in which heat from the semiconductor chip is radiated not only through the buffer, but also...
2016/0225702 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device according to an embodiment includes a metal part including a first surface and a second surface on an opposite side to the first...
2016/0225701 SEMICONDUCTOR DEVICE
A semiconductor device according to one embodiment of the present invention includes a semiconductor element, an island having a surface on which the...
2016/0225700 SEMICONDUCTOR DEVICE
A semiconductor device is disclosed. The semiconductor device has a semiconductor chip, an island having an upper surface to which the semiconductor chip is...
2016/0225699 INTEGRATED ELECTRONIC DEVICE HAVING A DISSIPATIVE PACKAGE, IN PARTICULAR DUAL SIDE COOLING PACKAGE
Packaged semiconductor device having a frame, of conductive material; a body of semiconductor material, fixed to the frame through a first adhesive layer; a...
2016/0225698 SEMICONDUCTOR DEVICE
To enable a semiconductor device excellent in usability to be provided. A semiconductor device has a main surface surrounded by a plurality of sides, a...
2016/0225697 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device is provided. The semiconductor device may include stacks including conductive layers and insulating layers. The conductive layers and...
2016/0225696 SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a substrate, a through silicon via hole,...
2016/0225695 UNIFORM BACK SIDE EXPOSURE OF THROUGH-SILICON VIAS
Systems and methods for uniform back side exposure of through-silicon vias (TSVs) are disclosed. In one embodiment, a semiconductor device comprises a...
2016/0225694 HIGH CONDUCTIVITY HIGH FREQUENCY VIA FOR ELECTRONIC SYSTEMS
A through silicon via is described that has conductivity at high frequencies. In one example, the via includes a channel through at least a portion of a...
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