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Patent # Description
2016/0233889 DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
The present technology relates to a data processing device and a data processing method that make it possible to ensure good communication quality in a data...
2016/0233888 TURBO DECODING TECHNIQUES
Techniques are disclosed for turbo decoding orthogonal frequency division multiplexing (OFDM) symbols. Techniques for combined turbo decoding and equalization...
2016/0233887 ENCODING APPARATUS, TRANSMISSION APPARATUS, ENCODING METHOD AND TRANSMISSION METHOD
An encoding method and encoder of a time-varying LDPC-CC with high error correction performance are provided. In an encoding method of performing low density...
2016/0233886 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a Low Density Parity Check (LDPC) codeword by LDPC...
2016/0233885 ITERATIVE DECODING METHOD OF LFSR SEQUENCES WITH A LOW FALSE-ALARM PROBABILITY
A message-passing iterative decoding method of an associated LFSR sequence (or M-sequence) as a simplex code, to a parity matrix H. The method includes...
2016/0233884 LOW POWER LOW-DENSITY PARITY-CHECK DECODING
In general, a minimum determination capability, adapted for determining one or more minimum values from a set of values, is provided. The minimum determination...
2016/0233883 LOW POWER LOW-DENSITY PARITY-CHECK DECODING
In general, a minimum determination capability, adapted for determining one or more minimum values from a set of values, is provided. The minimum determination...
2016/0233882 Efficient Context Save/Restore During Hardware Decompression of DEFLATE Encoded Data
An approach is provided in which a hardware accelerator receives a request to decompress a data stream that includes multiple deflate blocks and multiple...
2016/0233881 VLSI EFFICIENT HUFFMAN ENCODING APPARATUS AND METHOD
A compression algorithm based on Huffman coding is disclosed that is adapted to be readily implemented using VLSI design. A data file may be processed to...
2016/0233880 DATA COMPRESSION APPARATUS AND DATA DECOMPRESSION APPARATUS
The present invention guarantees throughput for decompressing compressed data. A data compression apparatus includes: a division unit that divides plaintext...
2016/0233879 LOW POWER ANALOG TO DIGITAL CONVERTER
Described is an analog to digital converter (ADC) which comprises: a sigma-delta modulator to receive an analog signal, the sigma-delta modulator operable to...
2016/0233878 CURRENT OUTPUT CIRCUIT
Provided is a current output circuit 1 including a pseudo sine wave separation circuit 11 that separates a pseudo sine wave represented by a digital code Din...
2016/0233877 High Bandwidth Oscilloscope
A method for improving bandwidth of an oscilloscope involves, in preferred embodiments, the use of frequency up-conversion and down-conversion techniques. In...
2016/0233876 DIGITAL PROTECTIVE RELAY
The present disclosure relates to provide an active erroneous sample elimination device or erroneous sample elimination method for a relay capable of correctly...
2016/0233875 CIRCUIT AND METHOD OF ADAPTIVE FILTERING DIGITAL CALIBRATION OF ADC
An adaptive filtering digital calibration circuit of ADC, which includes a control module, a fixed-point adder, and a fixed-point multiplier; the control...
2016/0233874 Cross-Coupled Input Voltage Sampling and Driver Amplifier Flicker Noise Cancellation in a Switched Capacitor...
A switching component comprises a plurality of switches configured to receive a differential signal at an input and is configured to provide a non-inverted...
2016/0233873 DEVICE AND METHOD FOR CONVERTING ANALOG INFORMATION
Embodiments of the present invention provide a device and a method for converting analog information, which achieve sufficient information spread of a sparse...
2016/0233872 Method and Apparatus for Excess Loop Delay Compensation in Continuous-Time Sigma-Delta Analog-to-Digital Converters
A CT-SDADC of the present disclosure converts the analog input signal from a representation in an analog signal domain to a representation in a digital signal...
2016/0233871 JITTER-BASED CLOCK SELECTION
In a first clock frequency multiplier, multiple injection-locked oscillators (ILOs) having spectrally-staggered lock ranges are operated in parallel to effect...
2016/0233870 DIGITALLY CONTROLLED OSCILLATOR
Methods and systems for a digitally controlled oscillator may comprise, for example, an all-digital all digital phase locked loop (ADPLL) for generating an...
2016/0233869 Managing Spurs in a Radio Frequency Circuit
In some embodiments, an integrated circuit may include a radio frequency synthesizer configured to provide a local oscillator (LO) signal at a selected...
2016/0233868 SEMICONDUCTOR INTEGRATED CIRCUIT
A semiconductor integrated circuit includes: a phase locked loop circuit which outputs a clock signal; an internal circuit which executes processing; a...
2016/0233867 FREQUENCY DIVIDING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
A plurality of latch circuits driven at rising of a clock signal and a plurality of latch circuits driven at falling of the clock signal are alternately...
2016/0233866 SEMICONDUCTOR DEVICE OR ELECTRONIC DEVICE INCLUDING THE SAME
A semiconductor device with lower power consumption and an electronic device including the same are provided. To reduce leakage current flowing in a word line...
2016/0233865 SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE
To provide a semiconductor device including element layers that are stacked. A first wiring layer and a second wiring layer are stacked between a first element...
2016/0233864 Integrated Circuit with Configurable On-Die Termination
Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the...
2016/0233863 ON-DIE TERMINATION CONTROL
A memory control component outputs a memory write command to a memory IC and also outputs write data to be received via data inputs of the memory IC. Prior to...
2016/0233862 METHOD AND APPARATUS FOR SIMULTANEOUS PROCESSING OF MULTIPLE FUNCTIONS
Electronic logic gates that operate using N logic state levels, where N is greater than 2, and methods of operating such gates. The electronic logic gates...
2016/0233861 KEYBOARD DEVICE
A keyboard device includes a base plate, a circuit board and plural keys. Each key includes a keycap, a scissors member, a restoring element and a sensor. The...
2016/0233860 SUPERCONDUCTING SINGLE-POLE DOUBLE-THROW SWITCH SYSTEM
A superconducting switch system is provided that includes a filter network having a first SQUID coupled to a second SQUID via a common node, an input port...
2016/0233859 POWER SWITCHING SYSTEMS COMPRISING HIGH POWER E-MODE GaN TRANSISTORS AND DRIVER CIRCUITRY
Driver circuitry for switching systems comprising enhancement mode (E-Mode) GaN power transistors with low threshold voltage is disclosed. An E-Mode high...
2016/0233858 SWITCHING CIRCUIT AND SEMICONDUCTOR DEVICE
A switching circuit includes a wiring having a parallel circuit of a first IGBT and a second IGBT. If a current of the wiring is relatively large, both of the...
2016/0233857 INFORMATION PROCESSING APPARATUS WITH SEMICONDUCTOR INTEGRATED CIRCUIT CAPABLE OF REDUCING AMOUNT OF RADIATION...
An information processing apparatus which is capable of maintaining the amount of radiation noise from a semiconductor integrated circuit constant. A voltage...
2016/0233856 SEMICONDUCTOR DEVICE
A semiconductor device includes a transistor; a diode configured to be connected in reverse-parallel with the transistor; a sense transistor configured to...
2016/0233855 Pulse Width Modulation
A device includes a combining circuitry that receives an incoming signal, and one or more delayed signals from a delay circuitry. The combining circuitry...
2016/0233854 LOW POWER CLAMP FOR ELECTRICAL OVERSTRESS PROTECTION
Described is an apparatus which comprises: a sensor to detect entrance of single-ended-zero (SE0) state on first and second data lines, and to detect exit of...
2016/0233853 THREE DIMENSIONAL LOGIC CIRCUIT
A 3D multi-bit flip-flop may include a two tier structure. The two tier structure may include a first tier containing a common clock circuit for the multi-bit...
2016/0233852 PROGRAMMABLE SYNCHRONOUS CLOCK DIVIDER
A divided clock signal is generated from an input clock signal. The duty cycle of the divided clock signal is programmed by generating a compare value based on...
2016/0233851 SYSTEMS AND METHODS FOR DEVICE TEMPERATURE STABILIZATION
A temperature stabilized device and method for temperature stabilization are provided. The temperature stabilized device comprises a substrate having a first...
2016/0233850 PARALLEL FILTERING METHOD AND CORRESPONDING APPARATUS
The present disclosure provides a method and apparatus for parallel filtering. The apparatus comprises: a multi-granularity memory, a data cache device, a...
2016/0233849 INDUCTIVELY COUPLED TRANSFORMER WITH TUNABLE IMPEDANCE MATCH NETWORK
A packaged RF power transistor includes an RF input lead, a DC gate bias lead, an RF power transistor comprising gate, source and drain terminals, and an input...
2016/0233848 ULTRA-LOW-VOLTAGE CURRENT-REUSE VOLTAGE-CONTROLLED OSCILLATOR AND TRANSCONDUCTANCE-CAPACITOR FILTER
According to one aspect of the present disclosure, an ultra-low voltage current reused voltage-controlled oscillator and transconductance-capacitor filter is...
2016/0233847 METHOD FOR MANUFACTURING RESONATOR ELEMENT, WAFER, RESONATOR ELEMENT, RESONATOR, OSCILLATOR, REAL-TIME CLOCK,...
A method for manufacturing a resonator element includes: an outer shape forming step of etching a substrate to form, in a plan view, a base portion, a pair of...
2016/0233846 INTEGRATED CALIBRATION CIRCUIT AND A METHOD FOR CALIBRATION OF A FILTER CIRCUIT
A calibration circuit and a method for calibrating a RC circuit, such as a high-pass filter, of an integrated circuit are provided. The calibration circuit...
2016/0233845 ELECTRONIC COMPONENT
An electronic component includes a device body and first through n-th LC parallel resonators connected in series with each other. The first through n-th LC...
2016/0233844 ELECTRONIC COMPONENT
An electronic component includes a device body and first through n-th LC parallel resonators connected in series with each other. The first through n-th LC...
2016/0233843 AMPLIFIER WITH INTEGRAL NOTCH FILTER
An amplifier is disclosed that may include a filter, such as a notch-filter, to filter an output signal provided by the amplifier. The included filter may...
2016/0233842 Devices and Methods for Improving Yield of Scalable Periphery Amplifiers
Device and methods for improving consistency of operation and therefore yield of scalable periphery amplifiers is described. Amplifier size of the scalable...
2016/0233841 AMPLIFIER
An amplifier includes: a package which includes a pair of edge portions; an input terminal which is provided in the edge portion; output terminals which are...
2016/0233840 SENSOR CONTROL CIRCUIT AND ELECTRONIC APPARATUS
A sensor control circuit comprises a sensor (201), a filtering circuit (202), a buffering circuit (203), and an amplifying circuit (204). An output end of the...
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