At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.
BONDING PADS WITH THERMAL PATHWAYS
Apparatuses and methods for providing thermal pathways from a substrate to a thermal bonding pad. The thermal pathways may be metal extensions of the thermal...
SEMICONDUCTOR DEVICE, RELATED MANUFACTURING METHOD, AND RELATED ELECTRONIC
A semiconductor device may include an enclosure structure. The semiconductor device may further include a getter for absorb gas molecules. The getter may be...
POWER SEMICONDUCTOR MODULE
It is an object of the present invention to achieve reduced faults in manufacturing steps and increased reliability by relieving electric field strength of a...
APPARATUS AND METHODS FOR THROUGH SUBSTRATE VIA TEST
A stack of vertically-connected, horizontally-oriented integrated circuits (ICs) may have electrical connections from the front side of one IC to the back side...
SEMICONDUCTOR MANUFACTURING APPARATUS AND SEMICONDUCTOR MANUFACTURING
In one embodiment, a semiconductor manufacturing apparatus includes an extraction module configured to extract, in cycle etching that repeats first processes...
CLOCK TREE SYNTHESIS FOR LOW COST PRE-BOND TESTING OF 3D INTEGRATED
To enable low cost pre-bond testing for a three-dimensional (3D) integrated circuit, a backbone die may have a fully connected two-dimensional (2D) clock tree...
FinFET with Dummy Gate on Non-Recessed Shallow Trench Isolation (STI)
An embodiment fin field effect transistor (FinFET) device includes fins formed from a semiconductor substrate, a non-recessed shallow trench isolation (STI)...
INTEGRATED CIRCUIT HAVING CHEMICALLY MODIFIED SPACER SURFACE
A method of fabricating an integrated circuit includes depositing a first dielectric material onto a semiconductor surface of a substrate having a gate stack...
SEMICONDUCTOR DEVICE AND FORMATION THEREOF
A semiconductor device and method of formation are provided herein. A semiconductor device includes a first active region adjacent a first side of a shallow...
METHOD FOR MANUFACTURING DIODE
A diode manufacturing method provided herein includes first-third implantations and a heating. The first implantation implants n-type impurities into a first...
APPARATUS AND METHOD FOR PROCESSING A SUBSTRATE
A method of processing a substrate is disclosed. The method includes the following steps: providing a substrate body having a surface; placing a die on the...
WIRING SUBSTRATE, METHOD FOR MANUFACTURING WIRING SUBSTRATE, ELECTRONIC
DEVICE AND METHOD FOR MANUFACTURING...
A wiring substrate includes: a substrate; an insulator formed in the substrate and having a through hole; an electrode formed in the substrate and provided...
INTERCONNECTS BASED ON SUBTRACTIVE ETCHING OF SILVER
A method for forming at least one Ag or Ag based alloy feature in an integrated circuit, including providing a blanket layer of Ag or Ag based alloy in a...
SELECTIVE CONDUCTIVE BARRIER LAYER FORMATION
A semiconductor device includes a die having a via coupling a first interconnect layer to a trench. The semiconductor device also includes a barrier layer on...
METHOD FOR TRANSFERRING A USEFUL LAYER
A method for transferring a useful layer onto a carrier comprises formation of an embrittlement plane by implantation of light species into a first substrate...
REACTION SYSTEM FOR GROWING A THIN FILM
An atomic deposition (ALD) thin film deposition apparatus includes a deposition chamber configured to deposit a thin film on a wafer mounted within a space...
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device is provided. The method includes a process of applying liquid to one surface of a support substrate; a...
SUBSTRATE PROCESSING SYSTEM AND METHOD
A system for processing substrates has a vacuum enclosure and a processing chamber situated to process wafers in a processing zone inside the vacuum enclosure....
ELECTROSTATIC CHUCK AND METHOD FOR MANUFACTURING ELECTROSTATIC CHUCK
Provided is an electrostatic chuck including: a base material; an adsorption unit for adsorbing a wafer by using electrostatic force; an adhesive layer for...
System and Method for High Throughput Work-in-Process Buffer
A buffer system for a semiconductor device fabrication tool includes one or more retractable shelves, one or more sliding assemblies positionable above the one...
STRUCTURE FOR FASTENING TOGETHER RESIN MEMBERS IN SUBSTRATE STORING
The lower lid includes a bottom plate that supports the substrate storing container and a lower lid peripheral wall that extends upwards from a periphery of...
WORKPIECE TRANSPORT DEVICE
A workpiece transport device for transporting a workpiece having a substrate layer and a layer to be processed on a portion of the substrate layer is provided....
VERTICAL WAFER BOAT
Provided is a vertical wafer boat with columns having a rectangular cross section, and capable of making a flow of a film-forming gas between wafer support...
MONITORING METHOD AND APPARATUS FOR CONTROL OF EXCIMER LASER ANNEALING
A method is disclosed evaluating a silicon layer crystallized by irradiation with pulses form an excimer-laser. The crystallization produces periodic features...
CLEANING APPARATUS FOR SEMICONDUCTOR EQUIPMENT
A cleaning apparatus for a semiconductor equipment is provided. The cleaning apparatus comprising a cleaning pad with a plurality of brushes thereon is located...
CHAMBERS FOR PARTICLE REDUCTION IN SUBSTRATE PROCESSING SYSTEMS
A substrate processing system includes a chamber configured to process a semiconductor substrate. At least one surface of the chamber includes a high surface...
Methods For Forming Package-On-Package Structures Having Buffer Dams
Package-on-Package (PoP) structures and methods of forming the same are disclosed. In some embodiments, a method of forming a PoP structure may include:...
RELEASE FILM FOR CONTROLLING FLOW OF RESIN AND METHOD OF MANUFACTURING
SEMICONDUCTOR PACKAGE USING THE SAME
A release film for controlling a flow of resin includes a backbone layer, a mold release layer on a first surface of the backbone layer, and a resin release...
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a semiconductor device, including steps of: (a) bonding a support plate to a first main face of a wafer, the first main face having...
SEMICONDUCTOR DIE ASSEMBLIES WITH HEAT SINK AND ASSOCIATED SYSTEMS AND
Semiconductor die assemblies with heat sinks are disclosed herein. In one embodiment, a semiconductor die assembly includes a stack of semiconductor dies and a...
SUBSTRATE AND ASSEMBLY THEREOF WITH DIELECTRIC REMOVAL FOR INCREASED POST
An interconnection substrate includes a plurality of electrically conductive elements of at least one wiring layer defining first and second lateral...
Defects Annealing and Impurities Activation in Semiconductors at
Thermodynamically Non-Stable Conditions
A symmetric multicycle rapid thermal annealing (SMRTA) method for annealing a semiconductor material without the material decomposing. The SMRTA method...
HEAT TREATMENT METHOD
A method for heat treatment of a plurality of semiconductor wafers horizontally placed on a supporting member coated with SiC in a vertical heat treatment...
ETCHING METHOD, ETCHING APPARATUS, AND STORAGE MEDIUM
[Problem] To perform precise etching treatment on a wafer by maintaining in a given range the concentration of leached components in an etching solution...
METHOD OF FORMING A TRENCH IN A SEMICONDUCTOR DEVICE
A method to make a semiconductor device, a first SiO.sub.2 layer and a first Si.sub.3N.sub.4 layer are sequentially formed on the semiconductor substrate. The...
METHODS OF FABRICATING SEMICONDUCTOR DEVICES USING SELF-ALIGNED SPACERS TO
PROVIDE FINE PATTERNS
A method of forming a semiconductor pattern can include providing an etching target layer. A hard mask pattern can be formed on the etching target layer using...
PHOTOMASK LAYOUTS AND METHODS OF FORMING PATTERNS USING THE SAME
A photomask layout includes: a substrate region; a lower stepped region at a region of the substrate region; and a pattern region at least partially crossing...
FABRICATION OF A SILICON STRUCTURE AND DEEP SILICON ETCH WITH PROFILE
A method of etching features into a silicon layer with a steady-state gas flow is provided. An etch gas comprising an oxygen containing gas and a fluorine...
POLISHING APPARATUS, POLISHING METHOD, AND SEMICONDUCTOR MANUFACTURING
A polishing apparatus includes a polisher, a holder, and a supplier. The polisher polishes a semiconductor substrate or a polishing target film on a...
SELECTIVE DEPOSITION UTILIZING MASKS AND DIRECTIONAL PLASMA TREATMENT
Methods for selectively depositing different materials at diffe ent locations on a substrate are provided. A selective deposition process may form different...
TUNGSTEN FILM FORMING METHOD
A tungsten film forming method for forming a tungsten film on a surface of a target substrate by an ALD (atomic layer deposition) method comprises adding a...
Method For Producing Nickel Thin Film on a Si Substrate By Chemical Vapor
Deposition Method, And Method For...
A method for producing a nickel thin film on a Si substrate by a chemical vapor deposition method, in which the nickel thin film is formed by use of a...
THIN FILM METAL SILICIDES AND METHODS FOR FORMATION
The disclosed subject matter provides thin films including a metal silicide and methods for forming such films. The disclosed subject matter can provide...
FLOATING BODY STORAGE DEVICE EMPLOYING A CHARGE STORAGE TRENCH
A charge storage trench structure is provided underneath a body region of a field effect transistor to store electrical charges in a region spaced from the p-n...
METHOD AND STRUCTURE FOR ENABLING HIGH ASPECT RATIO SACRIFICIAL GATES
Sacrificial gate structures having an aspect ratio of greater than 5:1 are formed on a substrate. In some embodiments, each sacrificial gate structure...
METHODS OF FORMING FIELD EFFECT TRANSISTORS USING A GATE CUT PROCESS
FOLLOWING FINAL GATE FORMATION
Disclosed are field effect transistor (FET) formation methods using a final gate cut process and the resulting structures. One method forms an elongated gate...
METHOD FOR PHOTODEPOSITING A PARTICLE ON A GRAPHENE-SEMICONDUCTOR HYBRID
PANEL AND A SEMICONDUCTOR STRUCTURE
A method for photodepositing a particle on a graphene-semiconductor hybrid panel is disclosed. The method for photodepositing the particle on the...
GATE AND GATE FORMING PROCESS
A gate forming process includes the following steps. A gate dielectric layer is formed on a substrate. A barrier layer is formed on the gate dielectric layer....
INTEGRATED CIRCUITS WITH MIDDLE OF LINE CAPACITANCE REDUCTION IN
SELF-ALIGNED CONTACT PROCESS FLOW AND...
Semiconductor devices and methods for forming the devices with middle of line capacitance reduction in self-aligned contact process flow are provided. One...
SEMICONDUCTOR DEVICE AND THE METHOD OF MANUFACTURING THE SAME
A semiconductor device according to the invention includes p-type well region 3 and n.sup.+ source region 4, both formed selectively in the surface portion of...