Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
2016/0233139 BONDING PADS WITH THERMAL PATHWAYS
Apparatuses and methods for providing thermal pathways from a substrate to a thermal bonding pad. The thermal pathways may be metal extensions of the thermal...
2016/0233138 SEMICONDUCTOR DEVICE, RELATED MANUFACTURING METHOD, AND RELATED ELECTRONIC DEVICE
A semiconductor device may include an enclosure structure. The semiconductor device may further include a getter for absorb gas molecules. The getter may be...
2016/0233137 POWER SEMICONDUCTOR MODULE
It is an object of the present invention to achieve reduced faults in manufacturing steps and increased reliability by relieving electric field strength of a...
2016/0233136 APPARATUS AND METHODS FOR THROUGH SUBSTRATE VIA TEST
A stack of vertically-connected, horizontally-oriented integrated circuits (ICs) may have electrical connections from the front side of one IC to the back side...
2016/0233135 SEMICONDUCTOR MANUFACTURING APPARATUS AND SEMICONDUCTOR MANUFACTURING METHOD
In one embodiment, a semiconductor manufacturing apparatus includes an extraction module configured to extract, in cycle etching that repeats first processes...
2016/0233134 CLOCK TREE SYNTHESIS FOR LOW COST PRE-BOND TESTING OF 3D INTEGRATED CIRCUITS
To enable low cost pre-bond testing for a three-dimensional (3D) integrated circuit, a backbone die may have a fully connected two-dimensional (2D) clock tree...
2016/0233133 FinFET with Dummy Gate on Non-Recessed Shallow Trench Isolation (STI)
An embodiment fin field effect transistor (FinFET) device includes fins formed from a semiconductor substrate, a non-recessed shallow trench isolation (STI)...
2016/0233132 INTEGRATED CIRCUIT HAVING CHEMICALLY MODIFIED SPACER SURFACE
A method of fabricating an integrated circuit includes depositing a first dielectric material onto a semiconductor surface of a substrate having a gate stack...
2016/0233131 SEMICONDUCTOR DEVICE AND FORMATION THEREOF
A semiconductor device and method of formation are provided herein. A semiconductor device includes a first active region adjacent a first side of a shallow...
2016/0233130 METHOD FOR MANUFACTURING DIODE
A diode manufacturing method provided herein includes first-third implantations and a heating. The first implantation implants n-type impurities into a first...
2016/0233129 APPARATUS AND METHOD FOR PROCESSING A SUBSTRATE
A method of processing a substrate is disclosed. The method includes the following steps: providing a substrate body having a surface; placing a die on the...
2016/0233128 WIRING SUBSTRATE, METHOD FOR MANUFACTURING WIRING SUBSTRATE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING...
A wiring substrate includes: a substrate; an insulator formed in the substrate and having a through hole; an electrode formed in the substrate and provided...
2016/0233127 INTERCONNECTS BASED ON SUBTRACTIVE ETCHING OF SILVER
A method for forming at least one Ag or Ag based alloy feature in an integrated circuit, including providing a blanket layer of Ag or Ag based alloy in a...
2016/0233126 SELECTIVE CONDUCTIVE BARRIER LAYER FORMATION
A semiconductor device includes a die having a via coupling a first interconnect layer to a trench. The semiconductor device also includes a barrier layer on...
2016/0233125 METHOD FOR TRANSFERRING A USEFUL LAYER
A method for transferring a useful layer onto a carrier comprises formation of an embrittlement plane by implantation of light species into a first substrate...
2016/0233124 REACTION SYSTEM FOR GROWING A THIN FILM
An atomic deposition (ALD) thin film deposition apparatus includes a deposition chamber configured to deposit a thin film on a wafer mounted within a space...
2016/0233123 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device is provided. The method includes a process of applying liquid to one surface of a support substrate; a...
2016/0233122 SUBSTRATE PROCESSING SYSTEM AND METHOD
A system for processing substrates has a vacuum enclosure and a processing chamber situated to process wafers in a processing zone inside the vacuum enclosure....
2016/0233121 ELECTROSTATIC CHUCK AND METHOD FOR MANUFACTURING ELECTROSTATIC CHUCK
Provided is an electrostatic chuck including: a base material; an adsorption unit for adsorbing a wafer by using electrostatic force; an adhesive layer for...
2016/0233120 System and Method for High Throughput Work-in-Process Buffer
A buffer system for a semiconductor device fabrication tool includes one or more retractable shelves, one or more sliding assemblies positionable above the one...
2016/0233119 STRUCTURE FOR FASTENING TOGETHER RESIN MEMBERS IN SUBSTRATE STORING CONTAINER
The lower lid includes a bottom plate that supports the substrate storing container and a lower lid peripheral wall that extends upwards from a periphery of...
2016/0233118 WORKPIECE TRANSPORT DEVICE
A workpiece transport device for transporting a workpiece having a substrate layer and a layer to be processed on a portion of the substrate layer is provided....
2016/0233117 VERTICAL WAFER BOAT
Provided is a vertical wafer boat with columns having a rectangular cross section, and capable of making a flow of a film-forming gas between wafer support...
2016/0233116 MONITORING METHOD AND APPARATUS FOR CONTROL OF EXCIMER LASER ANNEALING
A method is disclosed evaluating a silicon layer crystallized by irradiation with pulses form an excimer-laser. The crystallization produces periodic features...
2016/0233115 CLEANING APPARATUS FOR SEMICONDUCTOR EQUIPMENT
A cleaning apparatus for a semiconductor equipment is provided. The cleaning apparatus comprising a cleaning pad with a plurality of brushes thereon is located...
2016/0233114 CHAMBERS FOR PARTICLE REDUCTION IN SUBSTRATE PROCESSING SYSTEMS
A substrate processing system includes a chamber configured to process a semiconductor substrate. At least one surface of the chamber includes a high surface...
2016/0233113 Methods For Forming Package-On-Package Structures Having Buffer Dams
Package-on-Package (PoP) structures and methods of forming the same are disclosed. In some embodiments, a method of forming a PoP structure may include:...
2016/0233112 RELEASE FILM FOR CONTROLLING FLOW OF RESIN AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE USING THE SAME
A release film for controlling a flow of resin includes a backbone layer, a mold release layer on a first surface of the backbone layer, and a resin release...
2016/0233111 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a semiconductor device, including steps of: (a) bonding a support plate to a first main face of a wafer, the first main face having...
2016/0233110 SEMICONDUCTOR DIE ASSEMBLIES WITH HEAT SINK AND ASSOCIATED SYSTEMS AND METHODS
Semiconductor die assemblies with heat sinks are disclosed herein. In one embodiment, a semiconductor die assembly includes a stack of semiconductor dies and a...
2016/0233109 SUBSTRATE AND ASSEMBLY THEREOF WITH DIELECTRIC REMOVAL FOR INCREASED POST HEIGHT
An interconnection substrate includes a plurality of electrically conductive elements of at least one wiring layer defining first and second lateral...
2016/0233108 Defects Annealing and Impurities Activation in Semiconductors at Thermodynamically Non-Stable Conditions
A symmetric multicycle rapid thermal annealing (SMRTA) method for annealing a semiconductor material without the material decomposing. The SMRTA method...
2016/0233107 HEAT TREATMENT METHOD
A method for heat treatment of a plurality of semiconductor wafers horizontally placed on a supporting member coated with SiC in a vertical heat treatment...
2016/0233106 ETCHING METHOD, ETCHING APPARATUS, AND STORAGE MEDIUM
[Problem] To perform precise etching treatment on a wafer by maintaining in a given range the concentration of leached components in an etching solution...
2016/0233105 METHOD OF FORMING A TRENCH IN A SEMICONDUCTOR DEVICE
A method to make a semiconductor device, a first SiO.sub.2 layer and a first Si.sub.3N.sub.4 layer are sequentially formed on the semiconductor substrate. The...
2016/0233104 METHODS OF FABRICATING SEMICONDUCTOR DEVICES USING SELF-ALIGNED SPACERS TO PROVIDE FINE PATTERNS
A method of forming a semiconductor pattern can include providing an etching target layer. A hard mask pattern can be formed on the etching target layer using...
2016/0233103 PHOTOMASK LAYOUTS AND METHODS OF FORMING PATTERNS USING THE SAME
A photomask layout includes: a substrate region; a lower stepped region at a region of the substrate region; and a pattern region at least partially crossing...
2016/0233102 FABRICATION OF A SILICON STRUCTURE AND DEEP SILICON ETCH WITH PROFILE CONTROL
A method of etching features into a silicon layer with a steady-state gas flow is provided. An etch gas comprising an oxygen containing gas and a fluorine...
2016/0233101 POLISHING APPARATUS, POLISHING METHOD, AND SEMICONDUCTOR MANUFACTURING METHOD
A polishing apparatus includes a polisher, a holder, and a supplier. The polisher polishes a semiconductor substrate or a polishing target film on a...
2016/0233100 SELECTIVE DEPOSITION UTILIZING MASKS AND DIRECTIONAL PLASMA TREATMENT
Methods for selectively depositing different materials at diffe ent locations on a substrate are provided. A selective deposition process may form different...
2016/0233099 TUNGSTEN FILM FORMING METHOD
A tungsten film forming method for forming a tungsten film on a surface of a target substrate by an ALD (atomic layer deposition) method comprises adding a...
2016/0233098 Method For Producing Nickel Thin Film on a Si Substrate By Chemical Vapor Deposition Method, And Method For...
A method for producing a nickel thin film on a Si substrate by a chemical vapor deposition method, in which the nickel thin film is formed by use of a...
2016/0233097 THIN FILM METAL SILICIDES AND METHODS FOR FORMATION
The disclosed subject matter provides thin films including a metal silicide and methods for forming such films. The disclosed subject matter can provide...
2016/0233096 FLOATING BODY STORAGE DEVICE EMPLOYING A CHARGE STORAGE TRENCH
A charge storage trench structure is provided underneath a body region of a field effect transistor to store electrical charges in a region spaced from the p-n...
2016/0233095 METHOD AND STRUCTURE FOR ENABLING HIGH ASPECT RATIO SACRIFICIAL GATES
Sacrificial gate structures having an aspect ratio of greater than 5:1 are formed on a substrate. In some embodiments, each sacrificial gate structure...
2016/0233094 METHODS OF FORMING FIELD EFFECT TRANSISTORS USING A GATE CUT PROCESS FOLLOWING FINAL GATE FORMATION
Disclosed are field effect transistor (FET) formation methods using a final gate cut process and the resulting structures. One method forms an elongated gate...
2016/0233093 METHOD FOR PHOTODEPOSITING A PARTICLE ON A GRAPHENE-SEMICONDUCTOR HYBRID PANEL AND A SEMICONDUCTOR STRUCTURE
A method for photodepositing a particle on a graphene-semiconductor hybrid panel is disclosed. The method for photodepositing the particle on the...
2016/0233092 GATE AND GATE FORMING PROCESS
A gate forming process includes the following steps. A gate dielectric layer is formed on a substrate. A barrier layer is formed on the gate dielectric layer....
2016/0233091 INTEGRATED CIRCUITS WITH MIDDLE OF LINE CAPACITANCE REDUCTION IN SELF-ALIGNED CONTACT PROCESS FLOW AND...
Semiconductor devices and methods for forming the devices with middle of line capacitance reduction in self-aligned contact process flow are provided. One...
2016/0233090 SEMICONDUCTOR DEVICE AND THE METHOD OF MANUFACTURING THE SAME
A semiconductor device according to the invention includes p-type well region 3 and n.sup.+ source region 4, both formed selectively in the surface portion of...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.