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Patent # Description
2016/0240649 CONTROLLING CURRENT OR MITIGATING ELECTROMAGNETIC OR RADIATION INTERFERENCE EFFECTS USING MULTIPLE AND...
Systems and methods for controlling current or mitigating electromagnetic or radiation interference effects using multiple different semi-conductive channel...
2016/0240648 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a first nitride semiconductor layer formed above a substrate, a second nitride semiconductor layer formed over the first...
2016/0240647 Multi-Finger Large Periphery AlInN/AlN/GaN Metal-Oxide-Semiconductor Heterostructure Field Effect Transistors...
MOSHFET devices are provided, along with their methods of fabrication. The MOSHFET device can include a substrate; a multilayer stack on the substrate; a...
2016/0240646 LOW DAMAGE PASSIVATION LAYER FOR III-V BASED DEVICES
The present disclosure relates to a structure and method of forming a low damage passivation layer for III-V HEMT devices. In some embodiments, the structure...
2016/0240645 Semiconductor Device
In an embodiment, a semiconductor device includes a substrate, a Group III nitride-based semiconductor layer formed on the substrate, a first current electrode...
2016/0240644 SEMICONDUCTOR DEVICES AND A METHOD FOR FORMING A SEMICONDUCTOR DEVICE
A semiconductor device includes a first transistor structure including a first transistor body region of a first conductivity type located within a...
2016/0240643 SEMICONDUCTOR DEVICE
A switching loss is prevented from being deteriorated by suppressing increase in a gate capacitance due to a cell shrink of an IE type trench gate IGBT. A cell...
2016/0240642 Semiconductor Devices and a Method for Forming a Semiconductor Device
Some embodiments relate to a method for forming a semiconductor device. The method includes forming a source region of a field effect transistor structure in a...
2016/0240641 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
A semiconductor device includes: a semiconductor substrate, an upper electrode, a lower electrode and a gate electrode. In the semiconductor substrate, a body...
2016/0240640 POWER SEMICONDUCTOR DEVICE
A semiconductor substrate has a first surface and a second surface. A gate electrode has a part buried in a first trench. A capacitor electrode has a part...
2016/0240639 SEMICONDUCTOR DEVICE
A semiconductor device includes: metal collector layer on backside, P-type collector layer, N-type field stop layer, N-drift layer and N-type CS layer within...
2016/0240638 SEMICONDUCTOR DEVICE
Provided is a semiconductor device including a plurality of trenches, including an emitter electrode; a floating layer of a first conduction type provided...
2016/0240637 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE
In a semiconductor device, an element forming region formed with a semiconductor element for controlling a current is defined on a surface of a semiconductor...
2016/0240636 BIPOLAR JUNCTION TRANSISTOR (BJT) BASE CONDUCTOR PULLBACK
Some embodiments are directed to a bipolar junction transistor (BJT) with a collector region formed within a body of a semiconductor substrate, and an emitter...
2016/0240635 SEMICONDUCTOR DEVICE
A semiconductor device includes a first main electrode; a second main electrode; a first semiconductor region of a first conductivity type; a second...
2016/0240634 BIPOLAR TRANSISTOR
Presented is a bipolar transistor capable of improving a current amplification rate while improving voltage resistance. A bipolar transistor is provided with a...
2016/0240633 SEMICONDUCTOR DEVICE
A p-type well is formed in a semiconductor substrate, and an n.sup.+-type semiconductor region and a p.sup.+-type semiconductor region are formed in the p-type...
2016/0240632 METHOD OF MANUFACTURING THIN-FILM TRANSISTOR SUBSTRATE
A method of manufacturing a thin-film transistor substrate that includes a thin-film transistor having a semiconductor layer, includes: forming a CuMn alloy...
2016/0240631 NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF
A manufacturing method of a non-volatile memory is provided. A tunneling dielectric layer, a first conductive pattern, and isolation structures are formed on a...
2016/0240630 SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME
The inventive concept relates to a semiconductor device and a method for fabricating the same. The semiconductor device comprises active patterns protruding...
2016/0240629 SEMICONDUCTOR PROCESS FOR FORMING GATES WITH DIFFERENT PITCHES AND DIFFERENT DIMENSIONS
A semiconductor process for forming gates with different pitches includes the following steps. A gate layer is formed on a substrate. A first mandrel and a...
2016/0240628 Electrical Device and Method for Manufacturing Same
A method for manufacturing an electrical device is disclosed. In an embodiment, the method includes providing a first layer of a first conductivity type,...
2016/0240627 METHODS OF FORMING METAL SILICIDE LAYERS INCLUDING DOPANT SEGREGATION
A method of forming a metal silicide layer can include implanting dopants to a first depth below a surface of a semiconductor substrate including an active...
2016/0240626 Vertical Gate All Around (VGAA) Devices and Methods of Manufacturing the Same
Vertical gate all around (VGAA) devices and methods of manufacture thereof are described. A method for manufacturing a VGAA device includes: exposing a top...
2016/0240625 SEMICONDUCTOR DEVICE
The present invention makes it possible to lower the on resistance of a semiconductor element without hindering the function of a diffusion prevention film in...
2016/0240624 SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING THE SAME
Semiconductor devices and methods for manufacturing the same are provided. An example method may include: forming a sacrificial gate stack on a substrate;...
2016/0240623 VERTICAL GATE ALL AROUND (VGAA) DEVICES AND METHODS OF MANUFACTURING THE SAME
Vertical gate all around (VGAA) devices and methods of manufacture thereof are described. A method for manufacturing a VGAA device includes: exposing a top...
2016/0240622 NON-VOLATILE MEMORY DEVICE AND MANUFACTURE OF THE SAME
This disclosure discloses a non-volatile memory component and a manufacture method of the same. The non-volatile memory component includes a substrate, a first...
2016/0240621 Insulating Block in a Semiconductor Trench
A semiconductor device is produced by: creating an opening in a mask formed on a semiconductor body; creating, underneath the opening, a trench in the...
2016/0240620 DOPED ZINC OXIDE AND N- DOPING TO REDUCE JUNCTION LEAKAGE
A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. An n-doped layer is formed on the p-doped...
2016/0240619 SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD OF FABRICATING THE SAME
A semiconductor device may include a device isolation region configured to define an active region in a substrate, an active gate structure disposed in the...
2016/0240618 Depression Filling Method and Processing Apparatus
A method of filling a depression of a workpiece is provided. The depression passes through an insulating film and extends up to an inside of a semiconductor...
2016/0240617 GROUP III-N TRANSISTORS ON NANOSCALE TEMPLATE STRUCTURES
A III-N semiconductor channel is formed on a III-N transition layer formed on a (111) or (110) surface of a silicon template structure, such as a fin sidewall....
2016/0240616 NMOS AND PMOS STRAINED DEVICES WITHOUT RELAXED SUBSTRATES
Techniques and methods related to strained NMOS and PMOS devices without relaxed substrates, systems incorporating such semiconductor devices, and methods...
2016/0240615 Semiconductor Device and a Method for Forming a Semiconductor Device
A semiconductor device comprises at least one strip-shaped cell compensation region of a vertical electrical element arrangement, at least one strip-shaped...
2016/0240614 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE
A semiconductor device according to an embodiment includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second...
2016/0240613 III-V SEMICONDUCTOR DEVICES WITH SELECTIVE OXIDATION
Embodiments of the present invention provide methods for fabricating a semiconductor device with selective oxidation. One method may include providing a...
2016/0240612 NON-PLANAR SEMICONDUCTOR DEVICE HAVING GROUP III-V MATERIAL ACTIVE REGION WITH MULTI-DIELECTRIC GATE STACK
Non-planar semiconductor devices having group III-V material active regions with multi-dielectric gate stacks are described. For example, a semiconductor...
2016/0240611 CORNER TRANSISTOR SUPPRESSION
The threshold voltage of parasitic transistors formed at corners of shallow trench isolation regions is increased and mobility decreased by employing a high-K...
2016/0240610 JUNCTION INTERLAYER DIELECTRIC FOR REDUCING LEAKAGE CURRENT IN SEMICONDUCTOR DEVICES
A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. A dielectric interlayer is formed on the...
2016/0240609 SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME
A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first trench between a first active region and a...
2016/0240608 FIELD-STOP REVERSE CONDUCTING INSULATED GATE BIPOLAR TRANSISTOR AND MANUFACTURING METHOD THEREFOR
A field-stop reverse conducting insulated gate bipolar transistor and a manufacturing method thereof. The transistor comprises a terminal structure (200) and...
2016/0240607 OXIDE MATERIAL AND SEMICONDUCTOR DEVICE
Stable electrical characteristics are given to a transistor and a highly reliable semiconductor device is provided. In addition, an oxide material which...
2016/0240606 MULTI-LAYER INTERCONNECTED SPIRAL CAPACITOR
An upper planar capacitor is spaced above a lower planar capacitor by a dielectric layer. A bridged-post inter-layer connector couples the capacitances in...
2016/0240605 Flexible Display Device with Bridged Wire Traces
There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size...
2016/0240604 ORGANIC LIGHT EMITTING DISPLAY DEVICES AND METHODS OF MANUFACTURING ORGANIC LIGHT EMITTING DISPLAY DEVICES
An inter-layer bridging connection is provided in an organic light emitting display and a method of manufacturing the same is provided. The organic light...
2016/0240603 ORGANIC LIGHT EMITTING DISPLAY DEVICE
An organic light emitting display device includes a substrate a plurality of pixels disposed along a first direction and a second direction, the first...
2016/0240602 Flexible Display Device with Divided Power Lines and Manufacturing Method for the Same
There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size...
2016/0240601 ORGANIC LIGHT EMITTING DISPLAY APPARATUS
An organic light emitting display apparatus includes a base substrate, an active pattern disposed on the base substrate, a data line disposed on the base...
2016/0240600 LIGHT EMITTING DEVICE
A light emitting device is provided which can prevent a change in gate voltage due to leakage or other causes and at the same time can prevent the aperture...
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