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Method For Manufacturing Semiconductor Device
According to one embodiment, a method for manufacturing a semiconductor device includes forming a first film on a multilayer body including two or more stacked...
MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
A memory device comprises plural of silicon-containing layers, string select lines (SSLs), strings, bit lines, metal strapped word lines and plural sets of...
SEMICONDUCTOR MEMORY DEVICE
According to one embodiment, a semiconductor memory device includes first plate-like members, a first wiring, a second plate-like member, a second wiring,...
Non-Volatile Storage Element With Suspended Charge Storage Region
Suspended charge storage regions are utilized for non-volatile storage to decrease parasitic interferences and increase charge retention in memory devices....
A memory cell includes a select device and a capacitor electrically coupled in series with the select device. The capacitor includes two conductive capacitor...
NON-VOLATILE MEMORY DEVICE
A non-volatile memory device includes: a floating gate having a plurality of fingers; a first coupling unit including an active control gate which overlaps...
SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE
A semiconductor device manufacturing method includes: forming an element isolation insulating film in a semiconductor substrate; forming a first film on a...
CHARGE TRAPPING NONVOLATILE MEMORY DEVICES, METHODS OF FABRICATING THE
SAME, AND METHODS OF OPERATING THE SAME
A charge trapping nonvolatile memory device includes a source region and a drain region disposed in an upper portion of a substrate and spaced apart from each...
Methods and Apparatus for SRAM Cell Structure
An SRAM cell structure. In one embodiment, a bit cell first level contacts formed at a first and a second CVdd node, a first and a second CVss node, at a bit...
SEMICONDUCTOR STRUCTURE HAVING A CENTER DUMMY REGION
A semiconductor structure is provided, including a substrate, a plurality of first semiconductor devices, a plurality of second semiconductor devices, and a...
METAL LAYERS FOR A THREE-PORT BIT CELL
An apparatus includes a first metal layer coupled to a bit cell. The apparatus also includes a third metal layer including a write word line that is coupled to...
SEMICONDUCTOR DEVICE HAVING BURIED GATE, METHOD OF FABRICATING THE SAME,
AND MODULE AND SYSTEM HAVING THE SAME
A semiconductor device includes junction regions formed in upper portions of both sidewalls of a trench formed in a semiconductor substrate, a first gate...
SEMICONDUCTOR DEVICE INCLUDING FIN STRUCTURES AND MANUFACTURING METHOD
A semiconductor device includes a Fin FET transistor. The Fin FET transistor includes a first fin structure extending in a first direction, a gate stack and a...
STRUCTURE AND FORMATION METHOD OF FINFET DEVICE
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a...
CMOS NFET AND PFET COMPARABLE SPACER WIDTH
Embodiments of the present disclosure provide a structure including: a p-type field effect transistor (pFET device) and an n-type field effect transistor (nFET...
TECHNIQUES FOR IMPROVING GATE CONTROL OVER TRANSISTOR CHANNEL BY
INCREASING EFFECTIVE GATE LENGTH
Techniques are disclosed for improving gate control over the channel of a transistor, by increasing the effective electrical gate length (L.sub.eff) through...
VERTICAL CMOS STRUCTURE AND METHOD
A method for forming stacked, complementary transistors is disclosed. Selective deposition techniques are used to form a column having a lower portion that...
GATE-ALL-AROUND SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
The disclosed technology generally relates to semiconductor devices and more particularly to a gate-all-around semiconductor device, and methods of fabricating...
FinFET Device and Method of Manufacturing Same
A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin...
FINFET STRUCTURE AND METHOD OF FORMING SAME
A method of forming a semiconductor device includes providing a semiconductor substrate. The semiconductor substrate includes fins formed thereon and a...
DIE INCLUDING A SCHOTTKY DIODE
According to an embodiment of the invention there may be provided a die that may include (a) a first region of a first type; (b) a first conductor that...
IGBT WITH BUILT-IN DIODE AND MANUFACTURING METHOD THEREFOR
An insulated gate bipolar translator (IGBT) with a built-in diode and a manufacturing method thereof are provided. The IGBT comprises: a semiconductor...
An apparatus includes a substrate and an interposer associated with the substrate. The apparatus further includes a first device disposed within the substrate...
Apparatus and Methods for Modulating Current / Voltage Response Using
Multiple Semi-Conductive Channel Regions...
Apparatuses and methods for modulating current/voltage response using multiple semi-conductive channel regions (SCR) produced from different integrated...
SEMICONDUCTOR DEVICES AND ARRANGEMENTS FOR ELECTROSTATIC DISCHARGE
A semiconductor device and device arrangement including a plurality of semiconductor regions of different conductivity types and a plurality of gates which...
ELECTROSTATIC DISCHARGE (ESD) PROTECTION DEVICE
An electrostatic discharge (ESD) protection device includes a semiconductor layer having a first doped region, a second doped region, and an intrinsic region...
Method for Manufacturing Semiconductor Device, Sheet-Shaped Resin
Composition, and Dicing Tape-Integrated...
Provided is a method for manufacturing a semiconductor device, which can manufacture a semiconductor device at a high yield ratio by suppressing dissolution of...
A light-emitting apparatus package of the present invention includes (i) an electrically insulated ceramic substrate, (ii) a first concave section formed in...
Circuit Device And Method For The Production Thereof
A circuit device has a base plate, a first substrate arranged on a first outer side of the base plate, a second substrate arranged on a second outer side...
CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
A chip package includes a chip, a dielectric bonding layer, a carrier, and a redistribution layer. The chip has a substrate, a conductive pad, and a protection...
A light-emitting device, having an overall color temperature when emitting light, includes a carrier, a first LED unit, and a second LED unit. The carrier has...
LIGHT EMITTING DEVICE
Each of a plurality of light emitting elements has a polygonal shape with five or more corners. An interior angle at each of the corners is less than...
DISPLAY DEVICE USING SEMICONDUCTOR LIGHT EMITTING DEVICES
A display device including a wiring substrate having a wiring electrode; a plurality of semiconductor light emitting devices which form pixels; and a...
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE ARRAY
Present disclosure provides a method for manufacturing a semiconductor device array, including (1) providing a temporary substrate; (2) forming a plurality of...
SIGNAL DELIVERY IN STACKED DEVICE
Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a...
PACKAGE STRUCTURE AND ITS FABRICATION METHOD
This disclosure provides a package structure and its fabrication method. The package structure includes: a protective insulation layer; a wiring layer...
PLANARITY-TOLERANT REWORKABLE INTERCONNECT WITH INTEGRATED TESTING
A structure includes an electrical interconnection between a first substrate including a plurality of protrusions and a second substrate including a plurality...
MULTICHIP STACKING PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
The present invention relates to a multichip stacking package structure and a method for manufacturing the same, wherein the multichip stacking package...
POWER PACKAGE LID
The present disclosure relates to a ring-frame power package. In this regard, the ring-frame power package includes a thermal carrier and a ring structure. The...
MULTI-FUNCTION MINIATURIZED SURFACE-MOUNT DEVICE AND PROCESS FOR PRODUCING
A surface-mount device (SMD) uses no conventional lead frame and contains a multi-function die module formed from either a single die or two or more dies...
Semiconductor packages include a first substrate including a central portion and a peripheral portion, at least one first central connection member attached to...
Package Structures and Methods of Forming the Same
Packages structure and methods of forming them are discussed. A structure includes a first die, a first encapsulant at least laterally encapsulating the first...
WAFER-LEVEL PACKAGE WITH AT LEAST ONE INPUT/OUTPUT PORT CONNECTED TO AT
LEAST ONE MANAGEMENT BUS
A wafer-level package has a first input/output (I/O) port, a second I/O port, a first semiconductor die, and a second semiconductor die. The first I/O port and...
SOLDER ATTACH APPARATUS AND METHOD
An electronic device including a solder structure and methods of forming an electrical interconnection are shown. Solder structures are shown including a...
METAL JOINING STRUCTURE USING METAL NANOPARTICLES AND METAL JOINING METHOD
AND METAL JOINING MATERIAL
The present invention can give a joining structure using metal nanoparticles to join the same types or different types of metal where when one surface metal is...
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device includes a first step of forming a first electrode on one main surface side of a semiconductor wafer; a...
BONDING STRUCTURE FOR SEMICONDUCTOR PACKAGE AND METHODOF MANUFACTURING THE
The present disclosure relates to bonding structures useful in semiconductor packages and methods of manufacturing the same. In an embodiment, the bonding...
INTEGRATED CIRCUIT PACKAGING SUBSTRATE, SEMICONDUCTOR PACKAGE, AND
An integrated circuit (IC) packaging substrate includes a main body, at least one first conductive line, at least one second conductive line, and at least one...
REDUCED VOLUME INTERCONNECT FOR THREE-DIMENSIONAL CHIP STACK
A method of forming a reduced volume interconnect for a chip stack including multiple silicon layers, the method including: forming multiple conductive...
PACKAGED SEMICONDUCTOR DEVICES
A packaged semiconductor device is provided, which includes a substrate comprising a contact pad; a passivation layer disposed on the substrate, where the...