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Patent # Description
2016/0254406 CMOS COMPATIBLE ULTRAVIOLET SENSOR DEVICE AND METHOD OF PRODUCING A CMOS COMPATIBLE ULTRAVIOLET SENSOR DEVICE
The ultraviolet sensor device comprises a semiconductor substrate, a dielectric layer above the substrate, a surface of the dielectric layer that is provided...
2016/0254405 WAVELENGTH-CONVERSION ENCAPSULANT COMPOSITION, WAVELENGTH-CONVERTED ENCAPSULANT LAYER, AND SOLAR CELL MODULE...
A wavelength-converting encapsulant composition is provided, which includes a first organic material capable of absorbing ultraviolet light and converting...
2016/0254404 PHOTOVOLTAIC PANEL AND METHOD FOR PRODUCING SAME
A photovoltaic panel (1) with at least one solar cell (2) covered with a transparent composite material (5a, 5b) at least at a side (3) facing towards the...
2016/0254403 DECORATIVE DUAL-FUNCTION PHOTOVOLTAIC DEVICES GENERATING ANGLE INSENSITIVE TRANSMISSIVE OR REFLECTIVE COLORS
The present disclosure provides dual-function photovoltaic (PV) devices that generate electric current and have a colored surface or colored appearance. The PV...
2016/0254402 SHEET SET FOR ENCAPSULATING SOLAR CELL, AND SOLAR CELL MODULE
Provided is a sheet set for encapsulating a solar cell which is disposed between a light-receiving surface side protective member and a back surface side...
2016/0254401 ASSEMBLY OF PHOTO-VOLTAIC CELLS
In an assembly of photo-voltaic cells, the cells are arranged in a matrix and connected in series. Bypass diodes are connected in parallel respective parts of...
2016/0254400 RADIALLY ARRANGED METAL CONTACT FINGERS FOR SOLAR CELLS
A solar cell includes negative metal contact fingers and positive metal contact fingers. The negative metal contact fingers are interdigitated with the...
2016/0254399 METHOD OF MANUFACTURING PATTERN USING TRENCH STRUCTURE AND PATTERN MANUFACTURED THEREBY, AND METHOD OF...
The present disclosure provides a method of manufacturing a pattern including: forming a trench structure on a substrate using an inkjet method; filling an...
2016/0254398 AN APPARATUS AND A METHOD FOR DETECTING PHOTONS
An apparatus (100) comprising: semiconductor (2); and an asymmetric electrode arrangement (10) comprising a first electrode (11), a second electrode (12)...
2016/0254397 OPTOELECTRONIC MODULES WITH OPTICS INTEGRATED INTO A CAP
Optoelectronic modules for light emitting and/or light sensing include optical assemblies and active optoelectronic components. An optical assembly and a...
2016/0254396 Metamaterial Enhanced Thermophotovoltaic Converter
A thermophotovoltaic (TPV) converter includes spectrally-selective metamaterial emitters disposed on peripheral walls of an all-metal box-like enclosure, and...
2016/0254395 SUBSTRATES HAVING AN ANTIREFLECTION LAYER AND METHODS OF FORMING AN ANTIREFLECTION LAYER
Embodiments of the present disclosure provide for methods of making substrates having an antireflective layer, substrates having an antireflective layer,...
2016/0254394 Solar Cell Bus Bars
A bus bar for a silicon solar cell. The bus bar is a strip of electrically conductive material with a plurality of protrusions extending from at least one side...
2016/0254393 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
In forming an ohmic electrode on a back surface of an n-type SiC substrate, an n.sup.+-type semiconductor region is formed in a surface layer of the back...
2016/0254392 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device comprises a semiconductor layer including a mesa structure and a peripheral surface extending around the mesa structure, the mesa...
2016/0254391 N-TYPE ALUMINUM NITRIDE SINGLE-CRYSTAL SUBSTRATE AND VERTICAL NITRIDE SEMICONDUCTOR DEVICE
A vertical nitride semiconductor device includes an n-type aluminum nitride single-crystal substrate having an Si content of 3.times.10.sup.17 to...
2016/0254390 ZENER DIODE
A Zener diode includes a semiconductor substrate, an anode electrode and a cathode electrode. The semiconductor substrate includes a p-type anode region, an...
2016/0254389 LOW TEMPERATURE POLY-SILICON THIN FILM TRANSISTOR AND FABRICATION METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY...
A low temperature poly-silicon thin film transistor and a fabrication method thereof, an array substrate and a display device are provided. The method...
2016/0254388 THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME, DISPLAY SUBSTRATE AND DISPLAY APPARATUS
A thin film transistor is disclosed in the present invention. The thin film transistor comprises: a substrate, an active layer, a first etching barrier layer,...
2016/0254387 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
To improve electric characteristics of a semiconductor device including an oxide semiconductor. Alternatively, to improve reliability of a semiconductor device...
2016/0254386 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Provided is a transistor with stable electrical characteristics. Provided is a semiconductor device including an oxide semiconductor over a substrate, a first...
2016/0254385 FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE WITH GE-DOPED INTER-LAYER DIELECTRIC (ILD) STRUCTURE
A fin field effect transistor (FinFET) device structure and method for forming the same are provided. The FinFET device structure includes a substrate and a...
2016/0254384 FETs and Methods for Forming the Same
FETs and methods for forming FETs are disclosed. A structure comprises a substrate, a gate dielectric and a gate electrode. The substrate comprises a fin, and...
2016/0254383 CONTACT STRUCTURE OF SEMICONDUCTOR DEVICE
The disclosure relates to a semiconductor device. An exemplary structure for a contact structure for a semiconductor device comprises a substrate comprising a...
2016/0254382 INTEGRATED CIRCUITS WITH FETS HAVING NANOWIRES AND METHODS OF MANUFACTURING THE SAME
Integrated circuits and methods for producing the same are provided. A method for producing an integrated circuit includes forming a stack overlying a...
2016/0254381 Modulating Germanium Percentage in MOS Devices
An integrated circuit structure includes a gate stack over a semiconductor substrate, and an opening extending into the semiconductor substrate, wherein the...
2016/0254380 METHOD OF MANUFACTURING A DEVICE HAVING A SHIELD PLATE DOPANT REGION
Forming a transistor transistor includes forming a surface region, a gate, a source dopant region, a drain dopant region, a drift dopant region, a set of...
2016/0254379 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a plurality of first semiconductor regions of a first conductivity type, a plurality of second...
2016/0254378 NITRIDE SEMICONDUCTOR
According to this GaN-based HFET, resistivity .rho. of a semi-insulating film forming a gate insulating film is 3.9.times.10.sup.9 .OMEGA.cm. The value of this...
2016/0254377 HETEROJUNCTION-BASED HEMT TRANSISTOR
A heterojunction structure of semiconductor material, for a high electron mobility transistor includes a substrate, a buffer layer, arranged on the substrate,...
2016/0254376 INSULATED GATE BIPOLAR TRANSISTOR
An IGBT is provided having a first gate unit having first trench gates with first conductive layers and planar gates with second conductive layers. A second...
2016/0254375 POWER SEMICONDUCTOR DEVICE
A semiconductor substrate includes a drift region and a collector region. The drift region is provided across an active area, an interface area, and an edge...
2016/0254374 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a semiconductor substrate that includes an IGBT region. A first lifetime control layer extending along a planar direction of...
2016/0254373 SURFACE DEVICES WITHIN A VERTICAL POWER DEVICE
A semiconductor device comprises a vertical power device, such as a superjunction MOSFET, an IGBT, a diode, and the like, and a surface device that comprises...
2016/0254372 SEMICONDUCTOR DEVICE MANUFACTURING METHOD
According to the present invention, since the buffer layer is formed by multiple ion implantations of different acceleration energies and the non-diffusion...
2016/0254371 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
To reduce defects in an oxide semiconductor film in a semiconductor device. To improve the electrical characteristics and the reliability of a semiconductor...
2016/0254370 METHOD FOR FORMING SEMICONDUCTOR STRUCTURE WITH CONTACT OVER SOURCE/DRAIN STRUCTURE
A semiconductor structure and a method for forming the same are provided. The method includes forming a source/drain structure in a substrate and forming a...
2016/0254369 LINE-END CUTTING METHOD FOR FIN STRUCTURES OF FINFETS FORMED BY DOUBLE PATTERNING TECHNOLOGY
A line-end cutting method for fin structures of FinFETs formed by double patterning technology firstly utilizes the SiN hard mask lines to form fin structures...
2016/0254368 POLY-SILICON THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND MANUFACTURING METHOD...
A poly-silicon thin film transistor and its manufacturing method, an array substrate and its manufacturing method, and a display device are provided. The...
2016/0254367 ELECTRODE-ALIGNED SELECTIVE EPITAXY METHOD FOR VERTICAL POWER DEVICES
A method of forming trench electrode structures includes forming a first dielectric layer on a semiconductor substrate, forming a second layer above the first...
2016/0254366 V-SHAPED SIGE RECESS VOLUME TRIM FOR IMPROVED DEVICE PERFORMANCE AND LAYOUT DEPENDENCE
Some embodiments of the present disclosure relates to a method of forming a transistor device having a strained channel and an associated device. In some...
2016/0254365 Method for FinFET Device
A fin field effect transistor (FinFET) comprises a substrate; a fin over the substrate, the fin having a channel region; a gate structure engaging the fin...
2016/0254364 MOS Device Having Source and Drain Regions With Embedded Germanium-Containing Diffusion Barrier
An integrated circuit structure includes a gate stack over a semiconductor substrate, and an opening extending into the semiconductor substrate, wherein the...
2016/0254363 GALLIUM NITRIDE POWER DEVICES
Enhancement mode III-nitride devices are described. The 2DEG is depleted in the gate region so that the device is unable to conduct current when no bias is...
2016/0254362 METHOD FOR MODIFYING A STRESS LEVEL OF A SEMICONDUCTOR DEVICE HAVING TRANSISTOR CHANNEL STAGES
A Method for modifying the strain state of a semiconducting structure, comprising steps to: a) provide at least one first semiconducting structure on a...
2016/0254361 CONTROLLED JUNCTION TRANSISTORS AND METHODS OF FABRICATION
Embodiments of the present invention provide transistors with controlled junctions and methods of fabrication. A dummy spacer is used during the majority of...
2016/0254360 Semiconductor Device Having Electrode and Manufacturing Method Thereof
The invention relates to integrated circuit fabrication, and more particularly to a semiconductor device with an electrode. An exemplary structure for a...
2016/0254359 Semiconductor device including stripe structures
A method is provided for fabricating stripe structures. The method includes providing a substrate; and forming a to-be-etched layer on the substrate. The...
2016/0254358 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a gate structure on a substrate; a protection layer on the gate structure; a source/drain region adjacent to the gate...
2016/0254357 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE
A semiconductor device of the present invention includes a semiconductor layer that has an off-angle inclined in a predetermined off-direction and that is made...
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