Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
2016/0254206 POWER CONVERTER
In a power converter, a plurality of semiconductor devices and a plurality of cooling plates are stacked. The plurality of semiconductor devices includes a...
2016/0254205 DEVICE AND METHOD FOR LOCALIZED UNDERFILL
A device and method for localizing underfill includes a substrate, a plurality of dies, and underfill material. The substrate includes a plurality of contacts...
2016/0254204 PACKAGED SEMICONDUCTOR COMPONENTS HAVING SUBSTANTIALLY RIGID SUPPORT MEMBERS AND METHODS OF PACKAGING...
Packaged semiconductor components having substantially rigid support member are disclosed. The packages can include a semiconductor die and a support member...
2016/0254203 Semiconductor Package Having a Multi-Layered Base
A semiconductor package for mounting to a printed circuit board (PCB) includes a semiconductor die in a ceramic case, a conductive base coupled to the...
2016/0254202 Array Formed From A Multiplicity Of Electric Integrated Circuits, and Method For Production Thereof
A method for producing an array formed from a multiplicity of electric integrated circuits, said array being intended for separation and having a conductive...
2016/0254201 SEMICONDUCTOR TEST PAD WITH STACKED THIN METAL SHEETS AND METHOD FOR MANUFACTURING THE SAME
The present invention relates to a semiconductor test pad used in a semiconductor test, and more specifically, to a semiconductor test pad with stacked metal...
2016/0254200 Method for Detecting a Crack in a Semiconductor Body of a Semiconductor Component
A semiconductor component includes a semiconductor body having a bottom side, a top side spaced distant from the bottom side in a vertical direction, and a...
2016/0254199 AN APPARATUS AND METHOD FOR INSPECTING A SEMICONDUCTOR PACKAGE
There is provided an apparatus and method for inspecting a semiconductor package. The apparatus includes at least one 3D camera positioned at a first angle...
2016/0254198 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
One embodiment includes a vertical n-channel power MOSFET for an output stage and a horizontal p-channel MOSFET for controlling the vertical n-channel power...
2016/0254197 INNER L-SPACER FOR REPLACEMENT GATE FLOW
An integrated circuit is formed by removing a sacrificial gate dielectric layer and a sacrificial gate to form a gate cavity. A conformal dielectric first...
2016/0254196 FORMING A CMOS WITH DUAL STRAINED CHANNELS
The present invention relates generally to a semiconductor device, and more particularly, to a structure and method of forming a compressive strained layer and...
2016/0254195 METHODS OF MODULATING STRAIN IN PFET AND NFET FINFET SEMICONDUCTOR DEVICES
One illustrative method disclosed herein includes, among other things, forming a plurality of initial fins that have the same initial axial length and the same...
2016/0254194 Layout Architecture for Performance Improvement
An integrated circuit is provided. The integrated circuit includes a first contact disposed over a first source/drain region, a second contact disposed over a...
2016/0254193 REDUCED CURRENT LEAKAGE SEMICONDUCTOR DEVICE
A method for fabricating a semiconductor device may include receiving a gated substrate comprising a substrate with a channel layer and a gate structure formed...
2016/0254192 METHODS OF PERFORMING FIN CUT ETCH PROCESSES FOR FINFET SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES
A method includes forming a plurality of fins above a substrate. A first mask layer is formed above a first subset of the fins. First portions of the fins in...
2016/0254191 FIN PATTERNING METHODS FOR INCREASED PROCESS MARGIN
A method for fabricating a semiconductor device includes forming a plurality of first spacers over a substrate. A second spacer of a plurality of second...
2016/0254190 Method of Forming Layout Design
A method of forming a layout design for fabricating an integrated circuit (IC) is disclosed. The method includes identifying one or more areas in the layout...
2016/0254189 Method for Dicing a Substrate with Back Metal
The present invention provides a method for dicing a substrate with back metal, the method comprising the following steps. The substrate is provided with a...
2016/0254188 WAFER DIVIDING METHOD
A wafer having on one side a device area with devices partitioned by division lines is divided into dies. An adhesive tape for protecting the devices is...
2016/0254187 Disposable Pillars for Contact Information
Sacrificial plugs for forming contacts in integrated circuits, as well as methods of forming connections in integrated circuit arrays are disclosed. Various...
2016/0254186 METHOD OF FORMING A WRAP-AROUND CONTACT ON A SEMICONDUCTOR DEVICE
Techniques and methods related to forming a wrap-around contact on a semiconductor device, and apparatus, system, and mobile platform incorporating such...
2016/0254185 INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH SELF-ALIGNED VIAS
Integrated circuits and methods for fabricating integrated circuits with self-aligned vias are disclosed. A method for fabricating an integrated circuit...
2016/0254184 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATION METHOD
A multilayer wiring in a semiconductor device includes a first lower wiring formed in a first insulating layer, a via which is formed in a second insulating...
2016/0254183 Multi-Layer Metal Contacts
A method for forming metal contacts within a semiconductor device includes forming a first-layer contact into a first dielectric layer that surrounds at least...
2016/0254182 Removal Composition for Selectively Removing Hard Mask and Methods Thereof
The present disclosure relates to a method for removing a hard mask consisting essentially of TiN, TaN, TiNxOy, TiW, W, Ti and alloys of Ti and W from a...
2016/0254181 ALUMINUM NITRIDE BARRIER LAYER
A method of forming features in a dielectric layer is described. A via, trench or a dual-damascene structure may be present in the dielectric layer prior to...
2016/0254180 SELF ALIGNED RAISED FIN TIP END STI TO IMPROVE THE FIN END EPI QUALITY
A method as set forth herein can include patterning using a first mask an isolation trench at a sidewall to sidewall isolation (SSI) region of a semiconductor...
2016/0254179 METHOD FOR FABRICATING SHALLOW TRENCH ISOLATION AND SEMICONDUCTOR STRUCTURE USING THE SAME
A method for fabricating a shallow trench isolation includes forming a trench in a substrate, forming a bottom shallow trench isolation dielectric filling a...
2016/0254178 FINFET HAVING CONTROLLED DIELECTRIC REGION HEIGHT
Embodiments are directed to a method of forming a dielectric region of a fin-type field effect transistor (FinFET). The method includes forming at least one...
2016/0254177 SEMICONDUCTOR DEVICE WITH VOIDS WITHIN SILICON-ON-INSULATOR (SOI) STRUCTURE AND METHOD OF FORMING THE...
A semiconductor device with voids within a silicon-on-insulator (SOI) structure and a method of forming the semiconductor device are provided. Voids are formed...
2016/0254176 Positive Pressure Bernoulli Wand with Coiled Path
A wand operating under the Bernoulli principle to pick up, transport and deposit wafers, which continuous pattern imposed into the horizontal surface of the...
2016/0254175 VACUUM ADSORPTION SYSTEM, METHOD AND PACKAGING DEVICE FOR MOTHER SUBSTRATE TO BE PACKAGED
Vacuum adsorption system of the invention includes: vacuum adsorption platform; carrying platform, which is provided on vacuum adsorption platform and edges...
2016/0254174 SUPPPORTING DEVICE, METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING...
A supporting device includes a main body and a ring-shaped glue layer. The main body includes a top surface and a bottom surface opposite to the top surface....
2016/0254173 SPATIALLY LIMITED PROCESSING OF A SUBSTRATE
A method of chemical processing includes passing a substrate material from a first transfer conveyor device to a second transfer conveyor device across a fluid...
2016/0254172 WAFER CARRIER
A front opening wafer container suitable for large wafers such as 450 mm utilizes componentry with separate fasteners to lock the componentry together in an...
2016/0254171 IMAGE REVERSAL WITH AHM GAP FILL FOR MULTIPLE PATTERNING
Methods and apparatuses for multiple patterning using image reversal are provided. The methods may include depositing gap-fill ashable hardmasks using a...
2016/0254170 METHOD AND SYSTEM FOR CLEANING WAFER AND SCRUBBER
A method of cleaning a wafer in semiconductor fabrication is provided. The method includes cleaning a wafer using a wafer scrubber. The method further includes...
2016/0254169 Integrated Circuit Underfill Scheme
An integrated circuit includes a substrate having at least one depression on a top surface. At least one solder bump is disposed over the substrate. A die is...
2016/0254168 3D Shielding Case and Methods for Forming the Same
A package includes a die, and a molding material molding the die therein. A metal shield case includes a first metal mesh over and contacting the molding...
2016/0254167 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for...
2016/0254166 Chemical Circulation System and Methods of Cleaning Chemicals
A method includes passing a chemical solution through a metal-ion absorber, wherein metal ions in the metal-ion absorber are trapped by the metal-ion absorber....
2016/0254165 SELECTIVE ETCHING PROCESS OF A MASK DISPOSED ON A SILICON SUBSTRATE
The method includes the steps of: a) providing a silicon substrate including a first portion covered by the mask made from a carbonaceous material and a second...
2016/0254164 METHOD FOR STRIPPING MODIFIED RESIST, MODIFIED-RESIST STRIPPER USED THEREFOR, AND METHOD FOR MANUFACTURING...
Provided is a stripping method for stripping a modified resist from a semiconductor substrate by applying an etching solution to the semiconductor substrate,...
2016/0254163 PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD
A plasma processing apparatus includes a sample stage disposed in a processing chamber within a vacuum chamber. A wafer mounted on a top surface of the sample...
2016/0254162 SACRIFICIAL-FILM REMOVAL METHOD AND SUBSTRATE PROCESSING DEVICE
The present invention is a sacrificial-film removal method of removing a sacrificial film from a surface of a substrate provided with a plurality of struts and...
2016/0254161 Method for Patterning an Underlying Layer
A method for patterning an underlying layer is described, the method comprising providing a guiding layer on the underlying layer, the guiding layer comprising...
2016/0254160 Method of Manufacturing Semiconductor Device and Semiconductor Device
Reliability of a semiconductor device is improved. A power device includes: a semiconductor chip; a chip mounting part; a solder material electrically coupling...
2016/0254159 METHODS OF FORMING MEMORY CELLS WITH AIR GAPS AND OTHER LOW DIELECTRIC CONSTANT MATERIALS
Various embodiments include apparatuses and methods of forming the same. One such apparatus can include a first dielectric material and a second dielectric...
2016/0254158 CO-FABRICATION OF NON-PLANAR SEMICONDUCTOR DEVICES HAVING DIFFERENT THRESHOLD VOLTAGES
Co-fabricating non-planar (i.e., three-dimensional) semiconductor devices with different threshold voltages includes providing a starting semiconductor...
2016/0254157 Metal Gate Stack Having TaAlCN Layer
A method includes forming a gate stack over a semiconductor substrate; forming an interlayer dielectric layer surrounding the gate stack; and at least...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.