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Patent # Description
2016/0260645 SEALING EPOXY RESIN COMPOSITION, HARDENED PRODUCT, AND SEMICONDUCTOR DEVICE
A sealing epoxy resin composition contains a phosphonium salt shown in Formula (1), an epoxy resin, a hardening agent, and an inorganic filler. In Formula (1),...
2016/0260644 Electronic package and fabrication method thereof
An electronic package is provided, including a circuit portion, an electronic element disposed on the circuit portion and a lid member disposed on the circuit...
2016/0260643 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
According to one embodiment, there is provided a semiconductor device having a mark, the mark including a reference pattern extending in a first direction, a...
2016/0260642 SYSTEM FOR INSPECTING AND REVIEWING A SAMPLE
A system for inspecting and reviewing a sample, the system may include a chamber that is arranged to receive the sample and to maintain vacuum within the...
2016/0260641 TYPE III-V AND TYPE IV SEMICONDUCTOR DEVICE FORMATION
Forming a semiconductor device is disclosed, according to embodiments of the present disclosure. Forming the semiconductor device can include forming a first...
2016/0260640 METHODS FOR FORMING CMOS INVERTERS
A CMOS inverter is provided. The CMOS inverter includes a substrate. The CMOS inverter also includes an NMOS transistor having a first active region, a first...
2016/0260639 FORMATION METHOD
The present invention provides a formation method of forming, on a substrate, a fin pattern in which a plurality of linear fins are arrayed, the method...
2016/0260638 ASYMMETRIC HIGH-K DIELECTRIC FOR REDUCING GATE INDUCED DRAIN LEAKAGE
An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes...
2016/0260637 METHOD OF FORMING TARGET PATTERNS
A method of forming target patterns is disclosed. A substrate with multiple fins is provided. A plurality of mask patterns is formed across the fins and in at...
2016/0260636 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region, a second region, and...
2016/0260635 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
A semiconductor device includes a metal pattern filling a trench formed through at least a portion of an insulating interlayer on a substrate and including...
2016/0260634 SEMICONDUCTOR DEVICE FOR PREVENTING CRACK IN PAD REGION AND FABRICATING METHOD THEREOF
A semiconductor device which prevents a crack from occurring on a pad region is provided. The semiconductor device includes a lower pad, an upper pad which is...
2016/0260633 Composite Contact Plug Structure and Method of Making Same
An embodiment contact plug includes a bilayer structure and a diffusion barrier layer on a sidewall and a bottom surface of the bilayer structure. The bilayer...
2016/0260632 METHODS OF FORMING SEMICONDUCTOR DEVICES INCLUDING CONTACT HOLES
Methods of fabricating a semiconductor device are provided. The methods may include forming a stopper layer on a target layer including a cell area and an edge...
2016/0260631 HOLDING AND ROTATING APPARATUS FOR FLAT OBJECTS
The invention relates to a holding and rotating apparatus for flat objects which define an object plane, having a gripper device that is rotatable about a...
2016/0260630 PROCESSING METHOD OF SINGLE-CRYSTAL SUBSTRATE
Disclosed herein is a processing method of a single-crystal substrate having a film formed on a front side or a back side thereof to divide the single-crystal...
2016/0260629 Detection Device
The present invention provides a detection device for a cassette comprising at least one supporting unit, each supporting unit comprising a plurality of...
2016/0260628 DOOR OPENING AND CLOSING APPARATUS
A door opening and closing apparatus shifts a door part holding a lid part of a storage container between a totally closed position where the inner space of...
2016/0260627 DOOR OPENING AND CLOSING APPARATUS, TRANSFER APPARATUS, AND STORAGE CONTAINER OPENING METHOD
A door opening and closing apparatus includes: a frame that structures part of a wall surface of a transfer room and is provided with an opening for opening...
2016/0260626 CUTTING APPARATUS AND WAFER CUTTING METHOD
Disclosed herein is a cutting apparatus including a chuck table for holding a workpiece, a cutting unit for cutting the workpiece held on the chuck table, and...
2016/0260625 POLISHING DEVICE AND POLISHING METHOD
According to one embodiment, a polishing device includes a stage holding a wafer, a polishing part polishing a film formed on a circumferential edge portion of...
2016/0260624 ETCHING METHOD
Disclosed herein is an etching method for a workpiece. The etching method includes the steps of dissociating an inert gas to form a plasma in an evacuated...
2016/0260623 Method and Apparatus for Planarization of Substrate Coatings
A system for forming a coating comprises applying a first coating to a substrate having a plurality of topographical features, planarizing a top surface of the...
2016/0260622 FLIP CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
A flip chip package and a manufacturing method thereof are disclosed. The flip chip package in accordance with an embodiment of the present invention includes:...
2016/0260621 SYSTEM AND METHOD FOR INTEGRATED CIRCUITS WITH CYLINDRICAL GATE STRUCTURES
A device and method for integrated circuits with surrounding gate structures are disclosed. The device includes a semiconductor substrate and a fin structure...
2016/0260620 TECHNIQUE TO DEPOSIT SIDEWALL PASSIVATION FOR HIGH ASPECT RATIO CYLINDER ETCH
Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate....
2016/0260619 METHODS FOR ETCH OF SIN FILMS
A method of selectively etching silicon nitride from a substrate comprising a silicon nitride layer and a silicon oxide layer includes flowing a...
2016/0260618 ASYMMETRIC HIGH-K DIELECTRIC FOR REDUCING GATE INDUCED DRAIN LEAKAGE
An asymmetric high-k dielectric for reduced gate induced drain leakage in high-k MOSFETs and methods of manufacture are disclosed. The method includes...
2016/0260617 TECHNIQUE TO DEPOSIT SIDEWALL PASSIVATION FOR HIGH ASPECT RATIO CYLINDER ETCH
Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate....
2016/0260616 SILICON SELECTIVE REMOVAL
A method of etching exposed silicon on patterned heterogeneous structures is described and includes a gas phase etch using plasma effluents formed in a remote...
2016/0260615 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
The present invention makes it possible to improve the characteristic of a semiconductor device using a nitride semiconductor. An electrically-conductive film...
2016/0260614 METHOD FOR PREPARING FILM PATTERNS
A method for preparing film patterns; firstly, a complementary film pattern (1) to a desired film pattern (201) is prepared on a substrate (3) with an erasable...
2016/0260613 MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE
The present invention provides a semiconductor structure, comprising at least two gate electrodes disposed on a substrate, wherein each gate electrode is...
2016/0260612 ENGINEERING THE OPTICAL PROPERTIES OF AN INTEGRATED COMPUTATIONAL ELEMENT BY ION IMPLANTATION
Systems and methods of engineering the optical properties of an optical Integrated Computational Element device using ion implantation during fabrication are...
2016/0260611 METHOD OF CONTROLLING SOLID PHASE DIFFUSION OF BORON DOPANTS TO FORM ULTRA-SHALLOW DOPING REGIONS
A method is provided for forming an ultra-shallow boron doping region in a semiconductor device. The method includes depositing a diffusion filter layer on a...
2016/0260610 Doping for FinFET
First and second fins are formed extending from a substrate. A first layer is formed over the first fin. The first layer comprises a first dopant. A portion of...
2016/0260609 WAFER STRUCTURE FOR ELECTRONIC INTEGRATED CIRCUIT MANUFACTURING
A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the...
2016/0260608 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A manufacturing method of a semiconductor device is provided by forming a trench in a surface of a SiC substrate, positioning a protective substrate to cover...
2016/0260607 METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING TWO PHOTORESIST EXPOSURE PROCESSES FOR PROVIDING A GATE CUT
A method includes providing a semiconductor structure and forming a plurality of gate structures over the semiconductor structure. The formation of the...
2016/0260606 METHODS OF FORMING A MASKING PATTERN AND A SEMICONDUCTOR DEVICE STRUCTURE
The present disclosure provides methods of forming a masking pattern and a semiconductor device structure, wherein printed half pitches of, for example, about...
2016/0260605 RAISED FIN STRUCTURES AND METHODS OF FABRICATION
A method of fabricating raised fin structures is provided, the fabricating including: providing a substrate and at least one dielectric layer over the...
2016/0260604 PREPARATION METHOD OF GRAPHENE NANORIBBON ON h-BN
A preparation method of a graphene nanoribbon on h-BN, comprising: 1) forming a h-BN groove template with a nano ribbon-shaped groove structure on the h-BN by...
2016/0260603 METHOD AND APPARATUS TO MINIMIZE SEAM EFFECT DURING TEOS OXIDE FILM DEPOSITION
A method of minimizing a seam effect of a deposited TEOS oxide film during a trench filling process performed on a semiconductor substrate in a semiconductor...
2016/0260602 ADHESION IMPROVEMENTS FOR OXIDE-SILICON STACK
Embodiments generally relate to methods of controlling hydrogen content in a silicon oxide/amorphous silicon stack. By precleaning the substrate of residues,...
2016/0260601 METHOD FOR MANUFACTURING STRUCTURE
A method for manufacturing a structure having a substrate in which holes are formed and a photosensitive resin layer provided on the substrate in such a manner...
2016/0260600 FOCUSING IONIZATION DEVICE AND MASS SPECTROMETER USING THE SAME
A focusing ionization device includes a ball having a surface with a plurality of dimples and a metal needle located at one side of the ball and capable of...
2016/0260599 ION FOCUSING MEMBER AND MASS SPECTROMETER USING THE SAME
An ion focusing member includes a ball having a surface with a plurality of dimples. The ion focusing member is adapted for being disposed in a mass...
2016/0260598 LASER ENABLED IMAGING MASS CYTOMETRY
The invention relates to methods and devices for analysis of samples using laser ablation inductively coupled plasma mass spectrometry (LA-ICP-MS). The...
2016/0260597 Electrically Conductive And Filtrating Substrates For Mass Spectrometry
A mass spectrometry substrate includes an electrically conductive material providing an electrical conductivity that allows at least one of a first and a...
2016/0260596 System and Method For Characterizing Ions Using A Superconducting Transmission Line Detector
A system and method for characterizing incident ions are provided. The method includes positioning a transmission line detector to receive incident ions, the...
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