Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
2016/0268234 SEMICONDUCTOR PACKAGE ASSEMBLY
The invention provides a semiconductor package assembly. The semiconductor package assembly includes a semiconductor die. A first molding compound covers a...
2016/0268233 SEMICONDUCTOR PACKAGE ASSEMBLY WITH PASSIVE DEVICE
The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first substrate. A first semiconductor die is disposed...
2016/0268232 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
According to one embodiment, a semiconductor device includes a laminate including a plurality of semiconductor chips and having a first width, at least part of...
2016/0268231 METHODS TO FORM HIGH DENSITY THROUGH-MOLD INTERCONNECTIONS
Methods of fabricating a microelectronic device comprising forming a microelectronic substrate having a plurality microelectronic device attachment bond pads...
2016/0268230 STACKED SEMICONDUCTOR STRUCTURE
A stacked semiconductor structure includes a first wafer, a second wafer, a first insulting layer, and a second insulating layer. The first wafer includes a...
2016/0268229 SEMICONDUCTOR DEVICE HAVING A SEALING LAYER COVERING A SEMICONDUCTOR MEMORY UNIT AND A MEMORY CONTROLLER
A semiconductor device includes a substrate, a semiconductor memory unit mounted on a surface of the substrate, a memory controller configured to control the...
2016/0268228 HIGH PERFORMANCE PACKAGE AND PROCESS FOR MAKING
A method for manufacturing circuit component package is disclosed. The method first forms copper circuits on a single-sided printed circuit board, and prints...
2016/0268227 Connector Structures of Integrated Circuits
A die includes a substrate, a metal pad over the substrate, and a passivation layer covering edge portions of the metal pad. A metal pillar is formed over the...
2016/0268226 Method for Manufacturing Electronic Component
A method for manufacturing an electronic component having a flexible structure includes the steps of: forming an integrated circuit element package having a...
2016/0268225 CHIP AND MANUFACTURING METHOD THEREOF
A semiconductor device and a manufacturing method thereof are provided. The semiconductor device has an active surface. The semiconductor device includes at...
2016/0268224 Alignment Structures and Methods of Forming Same
Embodiments of the present disclosure include interconnect structures and methods of forming interconnect structures. An embodiment is a method of forming an...
2016/0268223 METHODS FOR FORMING PILLAR BUMPS ON SEMICONDUCTOR WAFERS
The subject matter contained herein discloses methods for forming a vertical metallic pillar overlying an under bump metal pad further overlying a...
2016/0268222 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device in which reliability of a bonding pad to which a conductive wire is bonded is achieved. A bonding pad having an OPM structure is formed...
2016/0268221 Under Bump Metallization
A structure of an under bump metallization and a method of forming the same are provided. The under bump metallization has a redistribution via hole, viewed...
2016/0268220 PROTECTION RING FOR IMAGE SENSORS
Some embodiments of the present disclosure provide an image sensor. The image sensor includes a pixel sensor array including a plurality of photosensors...
2016/0268219 SEMICONDUCTOR DEVICE
According to an embodiment, a semiconductor device includes a semiconductor layer, a first insulating layer that has refractive index of 1.95 or less, contains...
2016/0268218 TECHNIQUES FOR ENHANCING FRACTURE RESISTANCE OF INTERCONNECTS
Techniques and structure are disclosed for enhancing fracture resistance of back-end interconnects and other such interconnect structures by increasing via...
2016/0268217 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, AND SEMICONDUCTOR DEVICE
According to one embodiment, there is provided a manufacturing method of a semiconductor device. The method includes forming a first guard ring around a first...
2016/0268216 SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME
Provided is a method of fabricating a semiconductor package. The method includes providing a substrate including a plurality of semiconductor chips; forming a...
2016/0268215 SEMICONDUCTOR DEVICE
A semiconductor device includes a wiring substrate, a semiconductor element mounted on an upper surface of a wiring substrate, and a magnetic shield arranged...
2016/0268214 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure includes a plurality of devices; a molding surrounding the plurality of devices and including a first surface adjacent to an active...
2016/0268213 On Package Floating Metal/Stiffener Grounding to Mitigate RFI and SI Risks
An apparatus including a package including a die and a package substrate, the package substrate including a conductor; and a stiffener body electrically...
2016/0268212 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a monocrystalline substrate of a material which does not have a liquid phase at atmospheric pressure, and an identification...
2016/0268211 ALIGNMENT MARK FORMATION METHOD AND SEMICONDUCTOR DEVICE
According to one embodiment, at first, a first pattern is formed to an insulating film. Then, a first transparent film is formed on a region of the insulating...
2016/0268210 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
According to one embodiment, a semiconductor device is disclosed. The device includes interconnects each including a catalyst layer and a graphene layer...
2016/0268209 CRYSTALLINE LAYER STACK FOR FORMING CONDUCTIVE LAYERS IN A THREE-DIMENSIONAL MEMORY STRUCTURE
A stack of alternating layers comprising first epitaxial semiconductor layers and second epitaxial semiconductor layers is formed over a single crystalline...
2016/0268208 ELECTROLESS METAL DEPOSITION ON A MANGANESE OR MANGANESE NITRIDE BARRIER
An electronic circuit structure comprising a substrate, a dielectric layer on top of the substrate and comprising a cavity having side-walls, a manganese or...
2016/0268207 METHOD AND APPARATUS FOR PROTECTING METAL INTERCONNECT FROM HALOGEN BASED PRECURSORS
A method and apparatus for forming an interconnect on a substrate is provided. A protective layer is formed on the substrate and in a via formed on the...
2016/0268206 INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF
An interconnection structure and a manufacturing method thereof are provided. The interconnection structure includes a substrate, a conductive through via, a...
2016/0268205 POLYMER MEMBER BASED INTERCONNECT
An interconnect (124) suitable for attachment of integrated circuit assemblies to each other comprises a polymer member (130) which is conductive and/or is...
2016/0268204 SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
A semiconductor device is provided for implementing at least one logic element. The semiconductor device includes a semiconductor substrate with a first...
2016/0268203 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least a gate structure thereon...
2016/0268202 SEMICONDUCTOR DEVICE ALLOWING METAL LAYER ROUTING FORMED DIRECTLY UNDER METAL PAD
A semiconductor device may include a metal pad and a first specific metal layer routing. The metal pad is positioned on a first metal layer of the ...
2016/0268201 TWISTED ARRAY DESIGN FOR HIGH SPEED VERTICAL CHANNEL 3D NAND MEMORY
Roughly described, a memory device has a multilevel stack of conductive layers. Vertically oriented pillars each include series-connected memory cells at...
2016/0268200 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a first wiring comprising a first conductive material on a semiconductor layer, a second wiring comprising the first conductive...
2016/0268199 STACKED DAMASCENE STRUCTURES FOR MICROELECTRONIC DEVICES
A microelectronic device includes a dual-damascene interconnect structure and a single-damascene line structure directly on the dual-damascene interconnect...
2016/0268198 SEMICONDUCTOR DEVICE WITH NANO-GAPS AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device and a method for manufacturing the same are provided. A semiconductor device includes a substrate, a first capping layer formed above...
2016/0268197 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided is a corrosion resistant semiconductor device including a fuse element that can be cut by laser light. A silicon nitride film is formed above the fuse...
2016/0268196 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided is a corrosion resistant semiconductor device including a fuse element that can be cut by laser light. In the semiconductor device, an upper portion...
2016/0268195 SEMICONDUCTOR DEVICE HAVING NON-MAGNETIC SINGLE CORE INDUCTOR AND METHOD OF PRODUCING THE SAME
Integrated circuits with single core inductors and methods for producing them are provided. Embodiments include forming a trench in a dielectric layer; forming...
2016/0268194 Hybrid Interconnect Scheme and Methods for Forming the Same
A device includes a first low-k dielectric layer, and a copper-containing via in the first low-k dielectric layer. The device further includes a second low-k...
2016/0268193 SEMICONDUCTOR DEVICE
A semiconductor device according to an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first...
2016/0268192 Interconnect Structure and Method of Forming the Same
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a contact layer over a...
2016/0268191 SEMICONDUCTOR MEMORY DEVICE
According to an embodiment, a semiconductor memory device comprises: a memory string comprising a plurality of memory cells connected in series therein; and a...
2016/0268190 PACKAGING SOLUTIONS FOR DEVICES AND SYSTEMS COMPRISING LATERAL GaN POWER TRANSISTORS
Packaging solutions for large area, GaN die comprising one or more lateral GaN power transistor devices and systems are disclosed. Packaging assemblies...
2016/0268189 CIRCUIT SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
A circuit substrate includes a core substrate having a cavity, a metal block accommodated in the cavity of the core substrate, a first build-up layer including...
2016/0268188 PRINTED WIRING BOARD FOR PACKAGE-ON-PACKAGE
A printed wiring board for package-on-package includes a first insulating layer, a wiring layer including a conductor pattern and formed on first surface of...
2016/0268187 STUB MINIMIZATION FOR ASSEMBLIES WITHOUT WIREBONDS TO PACKAGE SUBSTRATE
A microelectronic package can include a substrate and a microelectronic element having a face and one or more columns of contacts thereon which face and are...
2016/0268186 METHOD OF PRODUCING A LARGE NUMBER OF SUPPORT APPARATUS WHICH CAN BE SURFACE-MOUNTED, ARRANGEMENT OF A LARGE...
A method of producing a multiplicity of surface-mountable carrier devices includes: A) providing a carrier plate having a first main face and a second main...
2016/0268185 PACKAGING SOLUTIONS FOR DEVICES AND SYSTEMS COMPRISING LATERAL GaN POWER TRANSISTORS
Packaging solutions for devices and systems comprising lateral GaN power transistors are disclosed, including components of a packaging assembly, a...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.