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| Patent # | Description |
|---|---|
| 2016/0267984 |
Devices Including Memory Arrays, Row Decoder Circuitries and Column
Decoder Circuitries Some embodiments include a device having an array of memory cells, a memory control unit at least partially under the array, row decoder circuitry in data... |
| 2016/0267983 |
SEMICONDUCTOR MEMORY DEVICE A semiconductor memory device includes a first block of memory cells that includes a first word line above a substrate, a second word line above the first word... |
| 2016/0267982 |
NAND String Utilizing Floating Body Memory Cell NAND string configurations and semiconductor memory arrays that include such NAND string configurations are provided. Methods of making semiconductor memory... |
| 2016/0267981 |
SEMICONDUCTOR MEMORY DEVICE A memory device includes a first string and a second string. The first string includes first and second transistors and first cell transistors coupled in... |
| 2016/0267980 |
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM A semiconductor memory device includes: a first string unit including first and second memory cell transistors; a second string unit including third and fourth... |
| 2016/0267979 |
METHOD FOR INTEGRATING NON-VOLATILE MEMORY CELLS WITH STATIC RANDOM ACCESS
MEMORY CELLS AND LOGIC TRANSISTORS A method of making a semiconductor device is described. The method comprises depositing a first polysilicon layer in a non-volatile memory (NVM) region and a... |
| 2016/0267978 |
Memory Devices and Memory Operational Methods Memory devices and memory operational methods are described. One example memory system includes a common conductor and a plurality of memory cells coupled with... |
| 2016/0267977 |
PAGE PROGRAMMING SEQUENCES AND ASSIGNMENT SCHEMES FOR A MEMORY DEVICE Embodiments of the invention are directed towards a memory device comprising a plurality of wordlines each coupled to a row of memory cells in a subtile of the... |
| 2016/0267976 |
MEMRISTIVE DEVICE SWITCHING BY ALTERNATING POLARITY PULSES A method to program a memristive device includes applying a pulse sequence including at least a series of pulses in alternating polarity to set the memristive... |
| 2016/0267975 |
SEMICONDUCTOR MEMORY A semiconductor memory includes a memory cell including a resistance change element and a control circuit configured to perform OFF-write processing of... |
| 2016/0267974 |
SEMICONDUCTOR STORAGE DEVICE AND DRIVING METHOD OF THE SAME A semiconductor storage device includes a variable resistive element, which changes a resistance value according to a polarity and a magnitude of an applied... |
| 2016/0267973 |
CONDUCTIVE METAL OXIDE STRUCTURES IN NON-VOLATILE RE-WRITABLE MEMORY
DEVICES A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a... |
| 2016/0267972 |
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE The transistor layer is disposed above or below the memory layer and includes a transistor. The wiring line layer connects the memory layer and the transistor... |
| 2016/0267971 |
SEMICONDUCTOR MEMORY DEVICE A semiconductor memory device includes a first memory cell array electrically connected to a set of first bit lines, a second memory cell array electrically... |
| 2016/0267970 |
RESISTIVE CROSSPOINT MEMORY ARRAY SENSING A method includes applying a voltage bump across a combined memory device comprising a volatile selector switch and a nonvolatile switch, in which the voltage... |
| 2016/0267969 |
SEMICONDUCTOR STORAGE DEVICE A semiconductor storage device according to the present embodiments includes a first bit line and a first word line. A resistance-change memory element is... |
| 2016/0267968 |
MEMORY DEVICE According to one embodiment, a memory device includes a plurality of first interconnects each provided along a first direction; a plurality of second... |
| 2016/0267967 |
MEMORY DEVICE According to one embodiment, a memory device includes a controller; a first electrode and a second electrode connected to the controller; and a variable... |
| 2016/0267966 |
MEMORY SYSTEM AND MEMORY CONTROL METHOD According to one embodiment, a memory system includes a non-volatile memory, a memory interface, an encoder configured to generate eight code words, and a... |
| 2016/0267965 |
NON-VOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME A non-volatile memory device and a method of programming a non-volatile memory device including a plurality of memory cells that are stacked in a vertical... |
| 2016/0267964 |
PHASE HYSTERETIC MAGNETIC JOSEPHSON JUNCTION MEMORY CELL One embodiment describes a memory cell. The memory cell includes a phase hysteretic magnetic Josephson junction (PHMJJ) that is configured to store one of a... |
| 2016/0267963 |
SEMICONDUCTOR MEMORY DEVICE A memory bank of a semiconductor memory device includes: a plurality of memory cells; first and second local bit lines; a differential amplifier configured to... |
| 2016/0267962 |
SEMICONDUCTOR DEVICE A semiconductor device includes a plurality of memory cells, an access circuit configured to perform a data read operation, a data write operation and a data... |
| 2016/0267961 |
SPIN-ORBIT-TORQUE MAGNETORESISTIVE RANDOM ACCESS MEMORY WITH
VOLTAGE-CONTROLLED ANISOTROPY Methods and apparatus relating to spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy are disclosed. In an example,... |
| 2016/0267960 |
MAGNETIC MEMORY DEVICE According to one embodiment, a magnetic memory device includes a first interconnect, a second interconnect, a magnetoresistive effect element having first and... |
| 2016/0267959 |
WRITE DRIVER CIRCUITS FOR RESISTIVE RANDOM ACCESS MEMORY (RAM) ARRAYS Aspects disclosed in the detailed description include write driver circuits for resistive random access memory (RAM) arrays. In one aspect, a write driver... |
| 2016/0267958 |
MISMATCH AND NOISE INSENSITIVE STT MRAM A technique for sensing a data state of a data cell. A comparator has a first input at a node A and a second input at a node B. A first n-channel transistor is... |
| 2016/0267957 |
MULTI-BIT SPIN TORQUE TRANSFER MAGNETORESISTIVE RANDOM ACCESS MEMORY WITH
SUB-ARRAYS A device includes a first magnetic tunnel junction (MTJ) element having a first read margin and a second MTJ element having a second read margin. The first... |
| 2016/0267956 |
MRAM WITH MAGNETIC MATERIAL SURROUNDING CONTACT PLUG This technology provides an electronic device and a method of fabricating the same. An electronic device in accordance with an implementation of this document... |
| 2016/0267955 |
MAGNETIC DOMAIN WALL MOTION MEMORY DEVICE A memory device according to one embodiment includes a magnetic wire; a conductive first line which faces one of opposite ends of the magnetic wire at a... |
| 2016/0267954 |
REDUCED LOAD MEMORY MODULE An apparatus relates generally to a reduced load memory module. In such an apparatus, there is a circuit platform with a plurality of memory chips coupled to... |
| 2016/0267953 |
SINGLE NODE POWER MANAGEMENT FOR MULTIPLE MEMORY DEVICES Some embodiments include apparatuses and methods having a node to couple to a plurality of memory devices, memory cells, and a module to perform an operation... |
| 2016/0267952 |
NEGATIVE BITLINE WRITE ASSIST CIRCUIT AND METHOD FOR OPERATING THE SAME A negative bitline write assist circuit includes a bias capacitor configured to facilitate driving the capacitance of a bitline. The negative bitline write... |
| 2016/0267951 |
DATA SHIFT BY ELEMENTS OF A VECTOR IN MEMORY Examples of the present disclosure provide apparatuses and methods for performing shift operations in a memory. An example method comprises performing a shift... |
| 2016/0267950 |
SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME A novel semiconductor device where multilevel data can be written and read. The semiconductor device includes first to fifth transistors, a capacitor, a bit... |
| 2016/0267949 |
SEMICONDUCTOR DEVICE HAVING AIR-GAP A semiconductor device includes a bit line structure located on a semiconductor substrate, an outer bit line spacer located on a first side surface of the bit... |
| 2016/0267948 |
INTERCONNECTIONS FOR 3D MEMORY Apparatuses and methods for interconnections for 3D memory are provided. One example apparatus can include a stack of materials including a plurality of pairs... |
| 2016/0267947 |
3D MEMORY STRUCTURE AND METHOD FOR MANUFACTURING THE SAME A 3D memory structure and a method for manufactured the same are provided. The 3D memory structure comprises a plurality of strings, a plurality of first... |
| 2016/0267946 |
STACK MEMORY DEVICE AND METHOD FOR OPERATING SAME The present invention provides a stack memory device and a method for operating same. The stack memory device, according to the present invention, is provided... |
| 2016/0267945 |
DATA REPRODUCTION APPARATUS, CONTROL METHOD FOR DATA REPRODUCTION
APPARATUS, AND RECORDING MEDIUM STORING... A data reproduction apparatus includes a display, a touch panel, a recording unit, an output unit, a display control unit, and an output controller. The output... |
| 2016/0267944 |
Smart Gallery and Automatic Music Video Creation from a Set of Photos Various embodiments provide a so-called smart gallery that is designed to create a short summary view of a collection of content, such as photographs and... |
| 2016/0267943 |
SYSTEMS AND METHODS FOR IDENTIFYING AND MERGING RECORDED SEGMENTS
BELONGING TO THE SAME PROGRAM Systems and methods for providing an interactive media guidance application for merging recorded video segments that are from the same program are provided. In... |
| 2016/0267942 |
MOTION TRACKING SYSTEM In a method of producing a composite animation live captured image sequence by capturing a live action sequence of action scenes with an image capture device,... |
| 2016/0267941 |
Selfie-Graph The present invention relates to a photography method that is enabled with the feature of autographing a photograph at a mobile terminal and can be implemented... |
| 2016/0267940 |
METHOD AND SYSTEM OF COMPOSITE BROADCAST CONTROL A method, a system, an apparatus, and a computer program product for composite broadcast control are provided. The apparatus or system presents broadcast... |
| 2016/0267939 |
RECORDING AND REPRODUCING APPARATUS The recording and reproducing apparatus according to the present disclosure includes: a light source; an optical system configured to divide a beam from the... |
| 2016/0267938 |
Flex Over Suspension Fault Detection Under a Write Gate for Magnetic Disk
Drives A system and method for Flex Over or On Suspension (FOS) fault detection under a write gate for magnetic disk drives may employ a flex over suspension fault... |
| 2016/0267937 |
SPINDLE MOTOR AND DISK DRIVE APPARATUS A motor includes a rotating portion including a rotor magnet, and arranged to rotate about a central axis extending in a vertical direction; a bearing... |
| 2016/0267936 |
HOLOGRAM RECORDING AND REPRODUCING APPARATUS A disk conveyance mechanism for a hologram recording and reproducing apparatus includes a first conveyance mechanism for conveying a disk medium 2 to a... |
| 2016/0267935 |
MAGNETIC RECORDING MEDIUM WITH MULTIPLE EXCHANGE COUPLING LAYERS AND SMALL
GRAIN MAGNETIC LAYERS According to one embodiment, a magnetic recording medium includes: a substrate; and a magnetic recording layer structure formed above the substrate. The... |
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