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Patent # Description
2016/0276271 SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME
A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a dielectric...
2016/0276270 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
An object of the invention is to provide a semiconductor device having less cracking or peeling and a method of manufacturing the same. A fuse portion of a...
2016/0276269 INTEGRATED MAGNETICALLY COUPLED DEVICES AND METHOD OF MAKING THE SAME
Devices and methods of forming a device are disclosed. The method includes providing a wafer that includes a center insulator layer sandwiched by a top...
2016/0276268 MULTILEVEL INTERCONNECT STRUCTURE AND METHODS OF MANUFACTURING THE SAME
A three-dimensional NAND device includes a first set of word line contacts in contact with a contact portion of respective odd numbered word lines in a first...
2016/0276267 METHODS OF FORMING WIRING STRUCTURES IN A SEMICONDUCTOR DEVICE
Methods of forming wiring structures and methods of manufacturing semiconductor devices include forming a lower structure on a substrate, forming an interlayer...
2016/0276266 DEVICE MANUFACTURE AND PACKAGING METHOD THEREOF
Some embodiments of the present disclosure provide a semiconductive device. The semiconductive device includes a first conductive layer and a second conductive...
2016/0276265 SEMICONDUCTOR DEVICE
A semiconductor device which can achieve a reduction of EMI noises is provided. For example, a first region which is used for forming a core circuit block...
2016/0276264 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device according to an embodiment comprises: when three directions intersecting each other are assumed to be first through third...
2016/0276263 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes lower layer wirings formed on a semiconductor chip, a protection film arranged on the lower layer...
2016/0276262 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes an insulating layer provided on a semiconductor substrate, an opening provided on the insulating...
2016/0276261 SEMICONDUCTOR DEVICE
A semiconductor device includes a first memory block and a second memory block in a cell region and a first transistor and a second transistor, respectively...
2016/0276260 METAL INTERCONNECT STRUCTURE AND METHOD FOR FABRICATING THE SAME
A method for fabricating metal interconnect structure is disclosed. The method includes the steps of: providing a substrate having a first inter-metal...
2016/0276259 WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring...
2016/0276258 Semiconductor Device and Method of Forming an Embedded SOP Fan-Out Package
A semiconductor device includes a BGA package including first bumps. A first semiconductor die is mounted to the BGA package between the first bumps. The BGA...
2016/0276257 THROUGH ELECTRODE SUBSTRATE AND SEMICONDUCTOR DEVICE USING THROUGH ELECTRODE SUBSTRATE
A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a...
2016/0276256 ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF AND SUBSTRATE STRUCTURE
A substrate structure is provided, which includes: a substrate body having opposite first and second surfaces; a plurality of conductive posts formed on the...
2016/0276255 WIRING SUBSTRATE AND SEMICONDUCTOR DEVICE
The wiring substrate includes an insulation layer that includes a lower surface, an upper surface, and an intermediate surface located between the lower...
2016/0276254 SEMICONDUCTOR ASSEMBLY AND METHOD TO FORM THE SAME
A semiconductor assembly is disclosed where the semiconductor assembly includes a shell with an opening, an island that shuts the opening, and terminals. The...
2016/0276253 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME AND A MOUNTING STRUCTURE OF A SEMICONDUCTOR DEVICE
The semiconductor device includes a tab including a chip supporting surface, and a back surface opposite to the chip supporting surface; a plurality of...
2016/0276252 LEAD FRAME FOR MOUNTING SEMICONDUCTOR ELEMENT AND METHOD FOR MANUFACTURING THE SAME
A lead frame for mounting semiconductor element includes a protrusion that is horizontally projects from edges of the upper and lower surfaces of a...
2016/0276251 Lead Frames With Wettable Flanks
A method of producing wettable fillets in electronic packages. A matrix of unsingulated lead frames is provided, each including a plurality of lead elements...
2016/0276250 SEMICONDUCTOR PACKAGE FOR A LATERAL DEVICE AND RELATED METHODS
A semiconductor package. Implementations may include a lateral device that may include a lateral semiconductor device including one of interspersed and...
2016/0276249 SEMICONDUCTOR DEVICE
A semiconductor device includes a mounting member that includes first and second regions. First peripheral portions are provided along at least a portion of an...
2016/0276248 NON-VERTICAL THROUGH-VIA IN PACKAGE
A package includes a device die, a through-via having a sand timer profile, and a molding material molding the device die and the through-via therein, wherein...
2016/0276247 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a first conductor, a second conductor, and an envelope. The first conductor includes a first...
2016/0276246 SHEET-LIKE STRUCTURE, ELECTRONIC EQUIPMENT USING THE SAME, FABRICATION METHOD OF SHEET-LIKE STRUCTURE AND...
A sheet-like structure has a plurality of linear carbon chains extending in a first direction, a phase change material in which tip ends of the linear carbon...
2016/0276245 SEMICONDUCTOR DEVICE
According to the present invention, a grease layer having a grease as a constituent material is provided in a filling region lying between a heat dissipation...
2016/0276244 BONDED BODY AND POWER MODULE SUBSTRATE
The bonded body of the present invention includes: a ceramic member made of ceramics; and a Cu member which is made of Cu or a Cu alloy and bonded to the...
2016/0276243 MULTI-CHIP SELF ADJUSTING COOLING SOLUTION
An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first passive heat exchanger disposed on...
2016/0276242 THERMAL SPREADER HAVING INTER-METAL DIFFUSION BARRIER LAYER
A heat spreader provided having: as ceramic substrate; and metallization layer structure disposed on at least one surface of the substrate. The metallization...
2016/0276241 ORGANIC-INORGANIC HYBRID THIN FILM AND METHOD FOR PRODUCING THE SAME
The present invention relates to an organic-inorganic hybrid thin film and a method for preparing the same and more specifically to an organic-inorganic hybrid...
2016/0276240 METHOD FOR INSULATING SINGULATED ELECTRONIC DIE
In one embodiment, a method of forming an electronic device includes providing a wafer having plurality of die separated by spaces. The method includes plasma...
2016/0276239 Semiconductor Device and Method of Forming Stacked Vias Within Interconnect Structure for FO-WLCSP
A semiconductor device has a semiconductor die mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier is...
2016/0276238 Semiconductor Device and Method of Forming Supporting Layer Over Semiconductor Die in Thin Fan-Out Wafer Level...
A semiconductor device includes a semiconductor die. An encapsulant is formed around the semiconductor die. A build-up interconnect structure is formed over a...
2016/0276237 Semiconductor Device and Method to Minimize Stress on Stack Via
A semiconductor device has a semiconductor die. A first insulating layer is disposed over the semiconductor die. A first via is formed in the first insulating...
2016/0276236 METHOD OF FORMING A MOLDED SUBSTRATE ELECTRONIC PACKAGE AND STRUCTURE
In one embodiment, an electronic package includes a substrate having a plurality of lands embedded within an insulating layer. Conductive patterns are disposed...
2016/0276235 STRUCTURE FOR DIE PROBING
A package includes a device die, which includes a metal pillar at a top surface of the device die, and a solder region on a sidewall of the metal pillar. A...
2016/0276234 SEMICONDUCTOR MODULE AND RESIN CASE
A semiconductor module includes a base substrate, a semiconductor element provided on the front surface side of the base substrate, and a resin case bonded to...
2016/0276233 System and Method for Dual-Region Singulation
A method for semiconductor fabrication includes forming a first array of semiconductor circuitry and a second array of semiconductor circuitry separated by a...
2016/0276232 Semiconductor Device and Method of Forming Build-Up Interconnect Structures Over Carrier for Testing at Interim...
A semiconductor device has a first interconnect structure formed over the carrier. A semiconductor die is disposed over the first interconnect structure after...
2016/0276231 OPTICAL PROGRAMMING OF ELECTRONIC DEVICES ON A WAFER
A system for programming integrated circuit (IC) dies formed on a wafer includes an optical transmitter that outputs a digital test program as an optical...
2016/0276230 Controlling Azimuthal Uniformity of Etch Process in Plasma Processing Chamber
Apparatus, systems, and methods for controlling azimuthal uniformity of an etch process in a plasma processing chamber are provided. In one embodiment, a...
2016/0276229 METHOD AND APPARATUS FOR BOND-PAD CHARGING PROTECTION OF REFERENCE TRANSISTOR TEST STRUCTURES
A method for preparing a reference transistor test structure having a transistor with multiple terminals is provided. The method may include placing a set of...
2016/0276228 NON-DESTRUCTIVE, WAFER SCALE METHOD TO EVALUATE DEFECT DENSITY IN HETEROGENEOUS EPITAXIAL LAYERS
A semiconductor material stack of, from bottom to top, a first semiconductor material having a first lattice constant and a second semiconductor material...
2016/0276227 METHOD AND APPARATUS FOR REDUCING RADIATION INDUCED CHANGE IN SEMICONDUCTOR STRUCTURES
Embodiments of the present disclosure relate to an apparatus and a method for reducing the adverse effects of exposing portions of an integrated circuit (IC)...
2016/0276226 LOW-COST SOI FINFET TECHNOLOGY
A method of forming an SOI fin using a porous semiconductor. The method may include forming a stack of semiconductor layers on a substrate, the stack includes...
2016/0276225 SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES
Semiconductor devices are provided. A semiconductor device includes a substrate including first through fourth areas. Moreover, first through fourth gate...
2016/0276224 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
The present invention provides a semiconductor device and a method of forming the same. The semiconductor device includes a substrate, a first transistor and a...
2016/0276223 METHOD OF DIVIDING WAFER
A wafer having a device area on one side with a plurality of devices partitioned by division lines is divided into dies. An adhesive tape for protecting...
2016/0276222 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a substrate that includes a first region and a second region adjacent to the first region. The first region has a thickness...
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