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Patent # Description
2016/0283257 PARALLELIZED VIRTUAL MACHINE CONFIGURATION
Techniques for facilitating parallelized configuration of multiple virtual machines. The techniques include duplicating commands received from an administrator...
2016/0283256 SYSTEM AND METHOD FOR CONFIGURING A PLATFORM INSTANCE AT RUNTIME
An improved system and method are disclosed for configuring a platform instance at runtime using predefined configuration information and contexts that contain...
2016/0283255 INTEGRATED PARAMETER CONTROL WITH PERSISTENCE INDICATION
Aspects of the present invention disclose a method for customizing a parameter value in a software program. The method includes one or more processors...
2016/0283254 Automatic Optimization of Continuous Processes
A system, method, and computer-readable medium are disclosed performing an optimization operation. The optimization operation optimizes continuous processes by...
2016/0283253 APPLICATION DOCUMENTATION EFFECTIVENESS MONITORING AND FEEDBACK
Responsive to a detected user access by a user to help content of an application, at least one subsequent detected user interaction with the application is...
2016/0283252 DYNAMIC EXECUTION ENVIRONMENT IN NETWORK COMMUNICATIONS
A computer-implemented system and method for providing a dynamic execution environment. In an embodiment, the system and method comprises receiving a base user...
2016/0283251 REDUNDANT PC SYSTEM
A redundant PC system includes a plurality of redundant PCs which is to be connected through a network. Each of the redundant PCs includes hardware on which an...
2016/0283250 BOOT CONTROLLING PROCESSING APPARATUS
An information processing apparatus includes a plurality of arithmetic processing units, a main memory, and an input/output unit. At least any one of the...
2016/0283249 Floating-point supportive pipeline for emulated shared memory architectures
A processor architecture arrangement for emulated shared memory (ESM) architectures, comprising a number of multi-threaded processors each provided with...
2016/0283248 SCHEDULERS WITH LOAD-STORE QUEUE AWARENESS
In one embodiment, a computer-implemented method includes tracking a size of a load-store queue (LSQ) during compile time of a program. The size of the LSQ is...
2016/0283247 APPARATUSES AND METHODS TO SELECTIVELY EXECUTE A COMMIT INSTRUCTION
Methods and apparatuses relating to selectively executing a commit instruction. In one embodiment, a data storage device stores code that when executed by a...
2016/0283246 Systems, Methods, and Apparatuses for Resource Monitoring
Systems, methods, and apparatuses for resource monitoring identification reuse are described. In an embodiment, a system comprising a hardware processor core...
2016/0283245 USER-LEVEL FORK AND JOIN PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS
A processor of an aspect includes a plurality of processor elements, and a first processor element. The first processor element may perform a user-level fork...
2016/0283244 Embedded Branch Prediction Unit
In accordance with some embodiments of the present invention, a branch prediction unit for an embedded controller may be placed in association with the...
2016/0283243 BRANCH LOOK-AHEAD INSTRUCTION DISASSEMBLING, ASSEMBLING, AND DELIVERING SYSTEM APPARATUS AND METHOD FOR...
A method and system of the branch look-ahead (BLA) instruction disassembling, assembling, and delivering are designed for improving speed of branch prediction...
2016/0283242 APPARATUS AND METHOD FOR VECTOR HORIZONTAL LOGICAL INSTRUCTION
An apparatus and method are described for performing vector horizontal logical instruction. For example, one embodiment of a processor comprises: fetch logic...
2016/0283241 PARALLEL DATA PROCESSING APPARATUS
A data processing apparatus includes a plurality of processing elements arranged in a single instruction multiple data array. The apparatus includes an...
2016/0283240 APPARATUSES AND METHODS TO ACCELERATE VECTOR MULTIPLICATION
Methods and apparatuses relating to accelerating vector multiplication. In one embodiment, an apparatus includes a first buffer to store a first cache line of...
2016/0283239 GUEST INSTRUCTION BLOCK WITH NEAR BRANCHING AND FAR BRANCHING SEQUENCE CONSTRUCTION TO NATIVE INSTRUCTION BLOCK
A method for translating instructions for a processor. The method includes accessing a plurality of guest instructions that comprise multiple guest branch...
2016/0283238 SYSTEM MANAGEMENT MODE TRUST ESTABLISHMENT FOR OS LEVEL DRIVERS
Various embodiments are generally directed to establishing trust in system management mode. An operating system management mode driver can invoke a system...
2016/0283237 INSTRUCTIONS AND LOGIC TO PROVIDE ATOMIC RANGE OPERATIONS
Instructions and logic provide atomic range operations in a multiprocessing system. In one embodiment an atomic range modification instruction specifies an...
2016/0283236 History Buffer with Single Snoop Tag for Multiple-Field Registers
An approach is provided in which a mapper control unit matches a result instruction tag corresponding to an executed instruction to a history buffer entry's...
2016/0283235 CONTROLLING DATA FLOW BETWEEN PROCESSORS IN A PROCESSING SYSTEM
A processing system includes a program processor for executing a program, and a dedicated processor for executing operations of a particular type (e.g. vector...
2016/0283234 APPARATUSES AND METHODS TO PREVENT EXECUTION OF A MODIFIED INSTRUCTION
Methods and apparatuses relating to preventing the execution of a modified instruction. In one embodiment, an apparatus includes a hardware binary translator...
2016/0283233 COMPUTER SYSTEMS AND METHODS FOR CONTEXT SWITCHING
A data processing system includes a plurality of contexts, a current context indicator configured to indicate a context of the plurality of contexts as the...
2016/0283232 Instruction and Logic for Speculative Request Support for Prefetching
A processor includes a core and a prefetcher. The prefetcher includes logic to issue a request for data including a requested prefetch. The core includes logic...
2016/0283231 MULTIFUNCTIONAL HEXADECIMAL INSTRUCTION FORM SYSTEM AND PROGRAM PRODUCT
A new zSeries floating-point unit has a fused multiply-add dataflow capable of supporting two architectures and fused MULTIPLY and ADD and Multiply and...
2016/0283230 ARITHMETIC PROCESSING DEVICE AND METHOD FOR CONTROLLING ARITHMETIC PROCESSING DEVICE
A processing device includes an instruction control unit outputting an instruction fetch request; a primary cache having a request port for the instruction...
2016/0283229 SYSTEMS AND METHODS FOR DETECTING COPIED COMPUTER CODE USING FINGERPRINTS
Systems and methods of detecting copying of computer code or portions of computer code involve generating unique fingerprints from compiled computer binaries....
2016/0283228 INTEGRATED CLOUD PLATFORM TRANSLATION SYSTEM
Systems, apparatuses and methods for use in the development of software applications or extensions to applications, user interfaces or similar products....
2016/0283227 APPLYING PACKAGES TO CONFIGURE SOFTWARE STACKS
Portable packages containing encodings of processes are applied to software stacks. The packages are portable and distinct from the software stacks. The...
2016/0283226 SMART HASHING TO REDUCE SERVER MEMORY USAGE IN A DISTRIBUTED SYSTEM
Architecture that computes smart-hashes (checksums) in a central server, and in a language agnostic way. The process comprises: decompiling the binaries using...
2016/0283225 INCREASING ACCURACY OF TRACEABILITY LINKS AND STRUCTURED DATA
According to an embodiment of the present invention, an artifact is received, and unstructured content of the artifact is parsed and analyzed to identify data...
2016/0283224 DETERMINING IMPORTANCE OF AN ARTIFACT IN A SOFTWARE DEVELOPMENT ENVIRONMENT
In an approach to determining an importance value of an artifact in a collaborative software development environment, a computer determines a snapshot of a...
2016/0283223 SERVICE-BASED INTEGRATION OF APPLICATION PATTERNS
One or more processors generate a plurality of artifacts from a first application pattern description. The first application pattern description describes at...
2016/0283222 APPLICATION USER INTERFACE OVERLAYS FOR APPLICATION LIFECYCLE MANAGEMENT
Example application user interface overlays for application lifecycle management are disclosed. Some example methods for application lifecycle management...
2016/0283221 APPLYING FIRMWARE UPDATES IN A SYSTEM WITH ZERO DOWNTIME BY SELECTIVELY OFFLINING AND ONLINING HARDWARE USING A...
A method includes running a scale-up hypervisor on a server complex including at least one server and running a single operating system and at least one...
2016/0283220 UPDATABLE INTEGRATED-CIRCUIT RADIO
An integrated-circuit radio communication device (1) comprises processing means (7), memory (13), and radio communication logic (17). The memory (13) stores...
2016/0283219 TECHNIQUES FOR EFFICIENT APPLICATION CONFIGURATION PATCHING
Techniques are disclosed for application configuration patching. Certain techniques are disclosed herein that utilize a configuration patching module (CPM)...
2016/0283218 Method for distributing large-sized Linux software packages
A method for distributing large-sized Linux software packages, in a field of a Linux software distribution, includes steps of: installing a Linux minimal...
2016/0283217 Preinstalled Application Management Method for Mobile Terminal and Mobile Terminal
An embodiment of the present invention discloses a preinstalled application management method for a mobile terminal, where storage space of the mobile terminal...
2016/0283216 METHOD AND DEVICE FOR DOWNLOADING PROFILE OF OPERATOR
Embodiments of the present invention provide a method and device for downloading a profile of an operator, where one method includes: sending, by a terminal to...
2016/0283215 CONVERSION TRACKING AND CONTEXT PRESERVING SYSTEMS AND METHODS
When a server receives a request for an information payload from a remote device, the server may determine the device's type and identify an ...
2016/0283214 TRANSPARENT AND NEAR-REAL TIME CODE DEPLOYS
A method includes monitoring a plurality of files in a source file system at pre-determined time intervals. The plurality of files in the source file system...
2016/0283213 CODE OPTIMIZATION TO ENABLE AND DISABLE COALESCING OF MEMORY TRANSACTIONS
A transactional memory system controls the coalescing of outermost memory transactions. The coalescing causing committing of memory store data to memory for a...
2016/0283212 SCHEDULERS WITH LOAD-STORE QUEUE AWARENESS
In one embodiment, a computer-implemented method includes tracking a size of a load-store queue (LSQ) during compile time of a program. The size of the LSQ is...
2016/0283211 UNALIGNED INSTRUCTION RELOCATION
In one embodiment, a computer-implemented method includes receiving source code to be compiled into an executable file for an unaligned instruction set...
2016/0283210 PROGRAM STRUCTURE-BASED BLOCKING
Embodiments relate to program structure-based blocking. An aspect includes receiving source code corresponding to a computer program by a compiler of a...
2016/0283209 UNALIGNED INSTRUCTION RELOCATION
In one embodiment, a computer-implemented method includes receiving source code to be compiled into an executable file for an unaligned instruction set...
2016/0283208 PROGRAM STRUCTURE-BASED BLOCKING
Embodiments relate to program structure-based blocking. An aspect includes receiving source code corresponding to a computer program by a compiler of a...
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