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Patent # Description
2016/0293640 DISPLAY DEVICE AND ELECTRONIC APPLIANCE
A display device with low manufacturing cost, a display device with low power consumption, a display device capable of being formed over a large substrate, a...
2016/0293639 THIN FILM TRANSISTOR ARRAY STRUCTURE
Disclosed is a TFT array structure including a visibility supplementary layer which is disposed between a TFT and a plate on which the TFT is disposed, for...
2016/0293638 FINFET DEVICE HAVING A HIGH GERMANIUM CONTENT FIN STRUCTURE AND METHOD OF MAKING SAME
A fin of silicon-germanium material is formed and covered with an epitaxially grown layer of silicon material. A dummy transistor gate is then formed to extend...
2016/0293637 ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME AND DISPLAY APPARATUS
An array substrate, a method for manufacturing the same and a display apparatus are provided. The array substrate comprises: a substrate (1); a common...
2016/0293636 THIN FILM TRANSISTOR AND FABRICATION METHOD THEREOF, ARRAY SUBSTRATE, AND DISPLAY DEVICE
A thin film transistor and a fabrication method thereof, an array substrate, and a display device are provided. The fabrication method comprises: forming a...
2016/0293635 DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
A display device includes a gate line, a data line crossing the gate line, and a first transistor including a gate electrode electrically coupled to the gate...
2016/0293634 FLEXIBLE DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
A flexible display device includes a flexible substrate, an adhesion layer disposed on a surface of the flexible substrate, and a plurality of pixel structures...
2016/0293633 THIN FILM TRANSISTOR ARRAY PANEL, LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF
A thin-film transistor array panel includes a gate line disposed on a first substrate, the gate line including a gate electrode, a semiconductor layer disposed...
2016/0293632 ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE
An array substrate, a display panel and a display device are provided. The array substrate includes: a substrate, wherein a signal transmission line, a first...
2016/0293631 DISPLAY PANEL AND METHOD FOR FORMING AN ARRAY SUBSTRATE OF A DISPLAY PANEL
The present disclosure provides a display panel and a method for forming an array substrate of a display panel. The display panel includes an array substrate...
2016/0293630 ARRAY SUBSTRATE, FORMING METHOD FOR THE SAME, AND DISPLAY DEVICE
The array substrate comprises: data lines and scanning lines in an insulating crossing arrangement, where the data lines comprise first data lines and second...
2016/0293629 DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
The present invention discloses a display device and a manufacturing method thereof. The display device comprises an array substrate and a color filter...
2016/0293628 THIN FILM TRANSISTOR ARRAY SUBSTRATE, ITS MANUFACTURING METHOD AND DISPLAY DEVICE
The present disclosure provides a thin film transistor (TFT) array substrate, its manufacturing method and a display device. The method includes steps of:...
2016/0293627 SEMICONDUCTOR MEMORY DEVICES AND METHODS FOR MANUFACTURING THE SAME
Semiconductor memory devices and methods for manufacturing the same are provided. The device may include vertical channel structures that are two-dimensionally...
2016/0293626 SEMICONDUCTOR MEMORY DEVICES
A semiconductor memory device includes a stack structure including gate electrodes vertically stacked on a substrate and a vertical channel part penetrating...
2016/0293625 Three Dimensional Semiconductor Memory Devices and Methods of Fabricating the Same
A semiconductor memory device is provided including a substrate; a stack structure including gate electrodes vertically stacked on the substrate; a vertical...
2016/0293624 SEMICONDUCTOR MEMORY DEVICE
According to an embodiment, a semiconductor memory device comprises control gate electrodes and a semiconductor layer. The control gate electrodes are stacked...
2016/0293623 Integrated Structures and Methods of Forming Vertically-Stacked Memory Cells
Some embodiments include a method of forming vertically-stacked memory cells. An opening is formed through a stack of alternating insulative and conductive...
2016/0293622 THREE-DIMENSIONAL SEMICONDUCTOR DEVICES
A three-dimensional semiconductor device includes an electrode structure on a substrate that includes a first region and a second region, the electrode...
2016/0293621 BRIDGE LINE STRUCTURE FOR BIT LINE CONNECTION IN A THREE-DIMENSIONAL SEMICONDUCTOR DEVICE
A structure is formed on a substrate, which includes a stack of alternating layers comprising insulating layers and electrically conductive layers and a...
2016/0293620 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
An improvement is achieved in the performance of a semiconductor device having a nonvolatile memory. A memory cell of the nonvolatile memory includes a control...
2016/0293619 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device whose performance is improved is disclosed. In the semiconductor device, an offset spacer formed in a memory cell is formed by a...
2016/0293618 SEMICONDUCTOR DEVICES
A semiconductor device includes a substrate, a tunnel insulation pattern on the substrate, a charge storage pattern on the tunnel insulation pattern, a...
2016/0293617 VERTICAL FLOATING GATE NAND WITH SELECTIVELY DEPOSITED ALD METAL FILMS
A method of making a monolithic three dimensional NAND string which contains a semiconductor channel and a plurality of control gate electrodes, includes...
2016/0293616 SEMICONDUCTOR TRANSISTOR AND FLASH MEMORY, AND MANUFACTURING METHOD THEREOF
A flash memory disposed on a substrate is provided. The flash memory includes a semiconductor transistor including stacked gate structures, lightly doped...
2016/0293615 NONVOLATILE MEMORY CELLS, NONVOLATILE MEMORY CELL ARRAYS INCLUDING THE SAME, AND METHODS OF FABRICATING THE SAME
Nonvolatile memory devices includes a charge storage element having a MOS capacitor structure and including a control gate terminal connected to a word line...
2016/0293614 MASK READ-ONLY MEMORY ARRAY, MEMORY DEVICE, AND FABRICATION METHOD THEREOF
A mask read-only memory array is provided. The mask read-only memory array includes a semiconductor substrate having a surface; and a heavily doped layer...
2016/0293613 SEMICONDUCTOR DEVICE
A semiconductor device includes a memory transistor (10A) which is capable of being irreversibly changed from a semiconductor state where drain current Ids...
2016/0293612 ANTIFUSE MEMORY CELLS AND ARRAYS THEREOF
An antifuse memory cell includes an antifuse element and a gate PN diode. The antifuse element includes a gate terminal coupled to a word line, a drain...
2016/0293611 SELECTIVELY DEGRADING CURRENT RESISTANCE OF FIELD EFFECT TRANSISTOR DEVICES
A method includes selectively degrading a current capacity of a first finned-field-effect-transistor (finFET) relative to a second finFET by forming a material...
2016/0293610 HYBRID FINFET/NANOWIRE SRAM CELL USING SELECTIVE GERMANIUM CONDENSATION
A semiconductor device including a pFET and an nFET where: (i) the gate and conductor channel of the pFET are electrically insulated from a buried oxide layer;...
2016/0293609 PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION OF FILMS FOR IMPROVED VERTICAL ETCH PERFORMANCE IN 3D NAND MEMORY DEVICES
Implementations of the present disclosure generally relate to thin films incorporating high aspect ratio feature definitions and methods for forming the same....
2016/0293608 Semiconductor Devices and Methods for Manufacturing the Same
A semiconductor device includes a substrate including first and second active patterns thereon, a first gate electrode intersecting the first and second active...
2016/0293607 DYNAMIC MEMORY STRUCTURE
A dynamic memory structure is disclosed. The dynamic memory structure includes: a substrate; a first strip semiconductor material disposed on the substrate and...
2016/0293606 SEMICONDUCTOR DEVICE
An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a...
2016/0293605 SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device which includes a memory cell including two or more sub memory cells is provided. The sub memory cells each including a word line,...
2016/0293604 Apparatus for FinFETs
A device comprises a first inverter comprising a first p-type transistor (PU) and a first n-type transistor (PD), a second inverter cross-coupled to the first...
2016/0293603 SELECTIVELY DEGRADING CURRENT RESISTANCE OF FIELD EFFECT TRANSISTOR DEVICES
A method includes selectively degrading a current capacity of a first finned-field-effect-transistor (finFET) relative to a second finFET by forming a material...
2016/0293602 VERTICAL JUNCTION FINFET DEVICE AND METHOD FOR MANUFACTURE
A vertical junction field effect transistor (JFET) is supported by a semiconductor substrate that includes a source region within the semiconductor substrate...
2016/0293601 BI-AXIAL TENSILE STRAINED GE CHANNEL FOR CMOS
An apparatus comprising a complimentary metal oxide semiconductor (CMOS) inverter including an n-channel metal oxide semiconductor field effect transistor...
2016/0293600 SEMICONDUCTOR DEVICE
A semiconductor device, including a first fin type pattern and a second fin type pattern defined by a trench, the first fin type pattern and the second fin...
2016/0293599 SEMICONDUCTOR DEVICE
A semiconductor device, including first and second fin patterns separated by a first trench; a gate electrode intersecting the first and second fin patterns;...
2016/0293598 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device and a method of manufacturing the same are disclosed, which may improve the operating performance of a multi-gate transistor in a highly...
2016/0293597 Integrated Semiconductor Device
A semiconductor device includes a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device...
2016/0293596 NORMALLY OFF III-NITRIDE TRANSISTOR
A semiconductor device containing an enhancement mode GaN FET on a III-N layer stack includes a low-doped GaN layer, a barrier layer including aluminum over...
2016/0293595 SEMICONDUCTOR DEVICE
A semiconductor device of the present invention includes: an IGBT including an emitter layer on a first main surface side of a semiconductor substrate and a...
2016/0293594 Reverse Bipolar Junction Transistor Integrated Circuit
A Reverse Bipolar Junction Transistor (RBJT) integrated circuit comprises a bipolar transistor and a parallel-connected distributed diode, where the base...
2016/0293593 SEMICONDUCTOR STRUCTURE
A semiconductor structure comprises a well, a first lightly doped region, a second lightly doped region, a first heavily doped region, a second heavily doped...
2016/0293592 THIN BI-DIRECTIONAL TRANSIENT VOLTAGE SUPPRESSOR (TVS) OR ZENER DIODE
A bidirectional transient voltage suppressor includes a semiconductor substrate having a first conductivity type; a first epitaxial semiconductor layer having...
2016/0293591 TRANSIENT OVERVOLTAGE PROTECTION DEVICE
In one embodiment, an overvoltage protection device may include a semiconductor substrate comprising an n-type body region. The overvoltage protection device...
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