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THREE-DIMENSIONAL INTEGRATION SCHEMES FOR REDUCING FLUORINE-INDUCED
Dielectric degradation and electrical shorts due to fluorine radical generation from metallic electrically conductive lines in a three-dimensional memory...
INTEGRATED CIRCUIT DEVICE INCLUDING POLYCRYSTALLINE SEMICONDUCTOR FILM AND
METHOD OF MANUFACTURING THE SAME
An IC device includes a polycrystalline silicon thin film interposed between a first level semiconductor circuit and a second level semiconductor circuit which...
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, a semiconductor memory device includes a substrate; a stacked body provided on the substrate and including a first stacked...
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, a semiconductor device includes a substrate, a stacked body, a film having semi-conductivity or conductivity, and a memory film....
Buried Hard Mask for Embedded Semiconductor Device Patterning
Methods and apparatus for manufacturing semiconductor devices, and such semiconductor devices, are described. According to various aspects of the disclosure, a...
ANTI-FUSE, ANTI-FUSE ARRAY AND METHOD OF OPERATING THE SAME
An anti-fuse, an anti-fuse array and a method of operating the same are disclosed. The anti-fuse array includes: an active region formed in a semiconductor...
METHODS OF FORMING CONTACTS FOR A SEMICONDUCTOR DEVICE STRUCTURE, RELATED
METHODS OF FORMING A SEMICONDUCTOR...
A method of forming contacts for a semiconductor device structure comprises forming contact holes extending into neighboring semiconductive pillars and into a...
Compact Semiconductor Memory Device Having Reduced Number of Contacts,
Methods of Operating and Methods of Making
An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The...
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
MANUFACTURED BY THE SAME
A method for manufacturing a semiconductor device is provided. The method includes disposing pre-conductive lines and post-conductive lines for forming first...
INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE
An embodiment includes an integrated circuit comprising a standard cell, the standard cell comprising: first and second active regions having different...
DEVICES HAVING MULTIPLE THRESHOLD VOLTAGES AND METHOD OF FABRICATING SUCH
Methods of fabricating devices (e.g., FDSOI devices) having multiple threshold voltages are described. One method includes providing a first fixed charge...
WAFER STRUCTURE FOR ELECTRONIC INTEGRATED CIRCUIT MANUFACTURING
A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the...
HYBRID HIGH-K FIRST AND HIGH-K LAST REPLACEMENT GATE PROCESS
An integrated circuit and method with a metal gate NMOS transistor with a high-k first gate dielectric on a high quality thermally grown interface dielectric...
SEMICONDUCTOR STRUCTURE AND ETCH TECHNIQUE FOR MONOLITHIC INTEGRATION OF
Semiconductor structures are disclosed for monolithically integrating multiple III-N transistors with different threshold voltages on a common substrate. A...
A display panel includes a substrate, a first stacking unit, and a second stacking unit. The first stacking unit is disposed on the substrate and connected to...
UNI-DIRECTIONAL TRANSIENT VOLTAGE SUPPRESSOR (TVS)
A unidirectional transient voltage suppressor (TVS) device is formed with first and second NPN transistors that are connected in parallel to each other. Each...
ELECTROSTATIC DISCHARGE PROTECTION CIRCUITS AND STRUCTURES AND METHODS OF
An ESD protection circuit and device structure comprises five transistors, two PNP and three NPN. The five transistors are coupled together so that a first NPN...
BI-DIRECTIONAL ESD PROTECTION DEVICE
An integrated circuit and method with a bidirectional ESD transistor. A base diffusion separates an emitter diffusion and a collector diffusion. Silicide is...
HIGH SPEED INTERFACE PROTECTION APPARATUS
The disclosed technology relates to electronics, and more particularly, to protection devices that protect circuits from transient electrical events such as...
OPTOELECTRONIC SEMICONDUCTOR CHIP WITH BUILT-IN ESD PROTECTION
Described is an optoelectronic semiconductor chip (1) with a built-in bridging element (9, 9A) for overvoltage protection.
ESD PROTECTION DEVICE
An electrostatic discharge protection device includes a buried layer having a plurality of heavily doped regions of a first conductivity type and a laterally...
Protection Devices with Trigger Devices and Methods of Formation Thereof
A semiconductor device includes a vertical protection device having a thyristor and a lateral trigger element disposed in a substrate. The lateral trigger...
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
A semiconductor device includes a substrate, a gate electrode on the substrate, an insulating layer on the gate electrode, first and second lower vias in the...
METHOD FOR PRODUCING OPTOELECTRONIC SEMICONDUCTOR DEVICES AND
OPTOELECTRONIC SEMICONDUCTOR DEVICE
The invention relates to a method for producing a plurality of optoelectronic semiconductor components (1), comprising the following steps: a) providing a...
HIGH DENSITY INTERCONNECTION OF MICROELECTRONIC DEVICES
A microelectronic package of the present description may comprises a first microelectronic device having at least one row of connection structures electrically...
PACKAGE-ON-PACKAGE OPTIONS WITH MULTIPLE LAYER 3-D STACKING
In some embodiments, a semiconductor device package on package assembly may include a first package, a second package, and a third package. The first package...
AGGREGATION OF SEMICONDUCTOR DEVICES AND THE METHOD THEREOF
An aggregation of semiconductor devices comprises a first layer, a second layer adhered to the first layer, and a plurality of semiconductor devices arranged...
LIGHT-EMITTING DIODE CHIP PACKAGE
A light-emitting diode chip package is provided. The light-emitting diode chip package includes a substrate; a light-emitting diode chip set (LED chip set)...
Method for Producing Optoelectronic Semiconductor Components and
Optoelectronic Semiconductor Component
A method for producing optoelectronic semiconductor components and an optoelectronic semiconductor component are disclosed. In an embodiment the method...
MULTI-CHIP PACKAGE HAVING A STACKED PLURALITY OF DIFFERENT SIZED
SEMICONDUCTOR CHIPS, AND METHOD OF...
Provided is a multi-chip package in which a plurality of semiconductor chips having different sizes are stacked. A multi-chip package may include a substrate,...
A semiconductor device includes a package substrate having a plurality of external connection terminals disposed on a first surface thereof and a plurality of...
Semiconductor Device and Method of Forming a Package In-Fan Out Package
A semiconductor device comprises a first semiconductor package including a first interconnect structure extending over a surface of the first semiconductor...
METHOD AND DEVICE FOR CONTROLLING OPERATION USING TEMPERATURE DEVIATION IN
A multi-chip package includes a first die having temperature sensors and a second die. The first die generates temperature deviation information of m (m<n)...
SEMICONDUCTOR PACKAGES WITH INTERPOSERS AND METHODS OF MANUFACTURING THE
A semiconductor package may include a first semiconductor chip, a second semiconductor chip disposed to overlap with a portion of the first semiconductor chip...
ELECTRONIC PACKAGE THAT INCLUDES A PLURALITY OF INTEGRATED CIRCUIT DEVICES
BONDED IN A THREE-DIMENSIONAL STACK...
An electronic package comprising a plurality of vertically stacked integrated circuit (IC) devices including a first IC device and a second IC device is...
DOUBLE SIDE MOUNTING MEMORY INTEGRATION IN THIN LOW WARPAGE FANOUT PACKAGE
Packages and methods of formation are described. In an embodiment, a package includes a redistribution layer (RDL) formed directly on a top die, and a bottom...
A semiconductor package includes a first substrate, a first conductive layer, a first surface mount device (SMD) and a first bonding wire. The first substrate...
Semiconductor Package with Conductive Clip
A semiconductor package that includes a conductive can, a power semiconductor device electrically and mechanically attached to the inside surface of the can,...
SEMICONDUCTOR RESIN COMPOSITION, SEMICONDUCTOR RESIN FILM, AND
SEMICONDUCTOR DEVICE USING THE SAME
The objective of the present invention is to obtain a semiconductor resin composition having a sufficiently low coefficient of linear expansion of the cured...
Lead-Free Solder Alloy and Semiconductor Device
A semiconductor device 20 has: a semiconductor chip 1; a connected member 5 connected to the semiconductor chip 1 via a solder alloy (lead-free solder alloy)...
STACKED SEMICONDUCTOR DEVICE
A stacked semiconductor device is provided in the present invention. The stacked semiconductor device includes a first substrate and a second substrate. A...
MICROELECTRONIC SUBSTRATE HAVING EMBEDDED TRACE LAYERS WITH INTEGRAL
A microelectronic substrate may be formed to have an embedded trace which includes an integral attachment structure that extends beyond a first surface of a...
Provided is a semiconductor package including a semiconductor chip having one surface on which chip pads are formed, and a redistribution structure formed on...
SEMICONDUCTOR DEVICE INCLUDING A PROTECTIVE FILM
A semiconductor device includes a semiconductor chip having a wire and a passivation film formed on the outermost surface with an opening partially exposing...
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
Provided are a semiconductor device and a manufacturing method therefor that can prevent electric short-circuiting between redistribution lines. A barrier film...
CROSSTALK POLARITY REVERSAL AND CANCELLATION THROUGH SUBSTRATE MATERIAL
Transmission lines with a first dielectric material separating signal traces and a second dielectric material separating the signal traces from a ground plane....
ACTIVATING REACTIONS IN INTEGRATED CIRCUITS THROUGH ELECTRICAL DISCHARGE
Embodiments of the present invention provide integrated circuits and methods for activating reactions in integrated circuits. In one embodiment, an integrated...
GUARD RING STRUCTURE AND METHOD FOR FORMING THE SAME
A guard ring structure having a semiconductor substrate with a circuit region encircled by a first ring and a second ring. At least one of the first and second...
Integrated Circuit with Die Edge Assurance Structure
Integrated circuits with edge assurance structures are provided for more reliable and efficient monitoring of the die edge integrity using, for example,...
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDING AND METHOD OF
An integrated circuit packaging system and method of manufacture thereof includes: a substrate with internal circuitry between a substrate top side, a...