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Patent # Description
2016/0315107 DISPLAY DEVICE AND ELECTRONIC UNIT
A display device includes a substrate, a display element, a transistor as a drive element of the display element, and a holding capacitance element holding...
2016/0315106 THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURE METHOD THEREOF
The present invention provides a thin film transistor array substrate and a manufacture method thereof, comprising: a substrate (1) and a thin film transistor...
2016/0315105 THIN-FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
The present invention provides a thin-film transistor array substrate and a manufacturing method thereof. In the thin-film transistor array substrate of the...
2016/0315104 TFT ARRANGEMENT STRUCTURE
The present invention provides a TFT arrangement structure, comprising a first thin film transistor (T1) and a second thin film transistor (T2) controlled by...
2016/0315103 ARRAY SUBSTRATE, METHOD FOR FABRICATING THE SAME, AND DISPLAY DEVICE
An array substrate and a method for fabricating the same, and a display device are disclosed. The array substrate comprises light-transmissive regions for...
2016/0315102 Thin Film Transistor, Array Substrate and Display Device
A thin film transistor, an array substrate and a display device are disclosed, the thin film transistor comprises a gate electrode, an active layer located on...
2016/0315101 HYBRID HIGH ELECTRON MOBILITY TRANSISTOR AND ACTIVE MATRIX STRUCTURE
Hybrid high electron mobility field-effect transistors including inorganic channels and organic gate barrier layers are used in some applications for forming...
2016/0315100 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
A semiconductor device and a method of forming the same, the semiconductor device includes a first transistor and a second transistor. The first transistor is...
2016/0315099 DISPLAY DRIVER INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME
A display driver integrated circuit and a method of manufacturing the same are provided. The method of manufacturing a display driver integrated circuit (DDI)...
2016/0315098 THIN FILM TRANSISTOR ARRAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME, AND DISPLAY DEVICE HAVING THE SAME
A thin film transistor array substrate includes gate and data lines, a thin film transistor, a pixel electrode, a polarizing plate, and a contact line. The...
2016/0315097 THREE-DIMENSIONAL DOUBLE DENSITY NAND FLASH MEMORY
A three-dimensional double-density NAND flash memory device is disclosed. In one aspect, an apparatus includes a three dimensional stacked configuration of...
2016/0315096 SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR WAFER
According to one embodiment, the embodiment includes memory cells, a memory cell array, a first stepped portion, and a second stepped portion. The memory cell...
2016/0315095 BLOCKING OXIDE IN MEMORY OPENING INTEGRATION SCHEME FOR THREE-DIMENSIONAL MEMORY STRUCTURE
An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. After formation of a memory opening, all surfaces of the...
2016/0315094 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, METHOD OF MANUFACTURING THE SAME, AND METHOD OF MEASURING THE SAME
A nonvolatile semiconductor memory device comprises: a memory cell region having a memory cell disposed therein; a peripheral region including a first stepped...
2016/0315093 METHOD OF MANUFACTURING A NONVOLATILE MEMORY CELL AND A FIELD EFFECT TRANSISTOR
To provide a semiconductor device having mix-loaded therein a nonvolatile memory cell and a field effect transistor at a reduced cost. A method of ...
2016/0315092 NON-VOLATILE MEMORY DEVICE
According to one embodiment, a non-volatile memory device includes a plurality of electrodes, at least one semiconductor layer, conductive layers, and first...
2016/0315091 INTEGRATED CIRCUIT WITH HYDROGEN ABSORPTION STRUCTURE
An integrated circuit such as a NAND flash memory includes a dielectric layer overlying transistors (e.g. NAND flash memory cells) that are formed along a...
2016/0315090 FERROELECTRIC MECHANICAL MEMORY AND METHOD
A method of making a memory device comprising a base; a capacitor comprising a ferroelectric layer and at least two electrically conductive layers, the...
2016/0315089 SEMICONDUCTOR MEMORY DEVICE
A laminated body is disposed on a semiconductor substrate made of silicon. The laminated body includes a plurality of conductive layers and an interlayer...
2016/0315088 SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME, MEMORY CELL HAVING THE...
A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a...
2016/0315087 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
Provided is a method for fabricating a semiconductor device. The method includes forming an interlayer insulating layer on a substrate, the interlayer...
2016/0315086 SEMICONDUCTOR DEVICE HAVING CONTACT PLUGS AND METHOD OF FORMING THE SAME
A semiconductor device including a first fin active area substantially parallel to a second fin active area, a first source/drain in the first fin active area,...
2016/0315085 SEMICONDUCTOR DEVICE
A semiconductor device includes a compound semiconductor layer, where the compound semiconductor layer includes separate fin patterns in separate regions. The...
2016/0315084 DIFFERENT HEIGHT OF FINS IN SEMICONDUCTOR STRUCTURE
There is set forth herein in one embodiment a semiconductor structure having a first region and a second region. The first region can include fins of a first...
2016/0315083 SELF ALIGNED STRUCTURE AND METHOD FOR HIGH-K METAL GATE WORK FUNCTION TUNING
A semiconductor device and a method for fabricating the device. The method includes: forming a STI in a substrate having a nFET and a pFET region; depositing a...
2016/0315082 SEMICONDUCTOR DEVICE HAVING A PLURALITY OF FINS AND METHOD FOR FABRICATING THE SAME
A semiconductor device having a plurality of fins including at least one first fin and at least one second fin formed on a semiconductor substrate is provided....
2016/0315081 SEMICONDUCTOR DEVICE HAVING FIN ACTIVE REGIONS AND METHOD OF FABRICATING THE SAME
A semiconductor device may include fin active regions extending parallel to each other on a substrate, an isolation region between the fin active regions, gate...
2016/0315080 INTEGRATED CIRCUIT DEVICES HAVING A FIN-TYPE ACTIVE REGION AND METHODS OF MANUFACTURING THE SAME
Integrated circuit devices include a substrate including first and second fin-type active regions and first and second gate structures. The first gate...
2016/0315079 Multi-Gate High Voltage Device
A high voltage semiconductor device, particularly a device including a number of high breakdown voltage transistors having a common drain, first well, and...
2016/0315078 SEMICONDUCTOR DEVICE
To provide a technique capable of reducing the chip size of a semiconductor chip and particularly, a technique capable of reducing the chip size of a...
2016/0315077 Electronic Device for ESD Protection
An electronic device includes a thyristor having an anode, a cathode, a first bipolar transistor disposed on the anode side. A second bipolar transistor is...
2016/0315076 ELECTROSTATIC DISCHARGE DEVICES AND METHODS OF MANUFACTURE
Electrostatic discharge (ESD) devices and methods of manufacture are provided. The method includes forming a plurality of fin structures and a mesa structure...
2016/0315075 SEMICONDUCTOR DEVICE
A semiconductor device includes a normally-on junction FET having a gate electrode, a source electrode and a drain electrode and a normally-off MOSFET having a...
2016/0315074 OPTICAL COUPLING DEVICE
An optical coupling device includes a power lead with a first portion and a power line portion. A light-emitting element is disposed on the first portion. A...
2016/0315073 Transistor Arrangement
A transistor arrangement comprising an electrically conductive substrate; a semiconductor body including a transistor structure, the transistor structure...
2016/0315072 PACKAGE ON PACKAGE (POP) DEVICE COMPRISING SOLDER CONNECTIONS BETWEEN INTEGRATED CIRCUIT DEVICE PACKAGES
Some features pertain to a package on package (PoP) device that includes a first package, a first solder interconnect coupled to the first integrated circuit...
2016/0315071 THREE LAYER STACK STRUCTURE
Vertically stacked system in package structures are described. In an embodiment, a package includes a first level molding and fan out structure, a third level...
2016/0315070 LIGHT EMITTING DEVICE INCLUDING A FILTER AND A PROTECTIVE LAYER
A method according to embodiments of the invention includes providing a plurality of LEDs attached to a mount. A filter is attached to at least one of the...
2016/0315069 REFLECTIVE SOLDER MASK LAYER FOR LED PHOSPHOR PACKAGE
A mounting substrate (40) has a patterned metal layer defining a plurality of top metal bond pads for bonding to bottom metal bond pads of LED dies. A solder...
2016/0315068 DISPLAY DEVICE USING SEMICONDUCTOR LIGHT EMITTING DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor light emitting device including a first conductivity type semiconductor layer; a first conductivity type electrode disposed on the first...
2016/0315067 MULTI-CHIP PACKAGE STRUCTURE, WAFER LEVEL CHIP PACKAGE STRUCTURE AND MANUFACTURING PROCESS THEREOF
A multi-chip package structure includes a first chip, at least one blocking structure, a plurality of first conductive bumps, a second chip, a plurality of...
2016/0315066 Semiconductor Device and Method
A link device with a large density routing is attached to a package in order to provide a high-density interconnect pathway to interconnect semiconductor...
2016/0315065 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A method of manufacturing a semiconductor structure includes providing a first wafer including a surface, removing some portions of the first wafer over the...
2016/0315064 THERMOCOMPRESSION BONDERS, METHODS OF OPERATING THERMOCOMPRESSION BONDERS, AND HORIZONTAL SCRUB MOTIONS IN...
A method of operating a thermocompression bonding system is provided. The method includes the steps of: bringing first conductive structures of a semiconductor...
2016/0315063 BONDING WIRE FOR SEMICONDUCTOR DEVICES
Provided is a bonding wire capable of reducing the occurrence of defective loops. The bonding wire includes: a core material which contains more than 50 mol %...
2016/0315062 ASSEMBLY WITH A CARRIER SUBSTRATE AND AT LEAST ONE ELECTRICAL COMPONENT ARRANGED THEREON, AND ELECTRICAL COMPONENT
An electronic assembly has a carrier substrate with contact surfaces and at least one electrical component on the carrier substrate. On its surface that is...
2016/0315061 CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
A chip package includes a first chip and a second chip. The first chip includes a first substrate having a first surface and a second surface opposite to the...
2016/0315060 SEMICONDUCTOR DEVICE
A semiconductor device that includes a bipolar transistor, wherein a third opening, through which a pillar bump and a second wiring line, which is electrically...
2016/0315059 METHOD OF PRODUCING BUMPS IN ELECTRONIC COMPONENTS, CORRESPONDING COMPONENT AND COMPUTER PROGRAM PRODUCT
An electronic component, such as an integrated circuit, includes one or more circuits with bumps extending in a longitudinal direction outward from the...
2016/0315058 SEMICONDUCTOR DEVICE WITH ADVANCED PAD STRUCTURE RESISTANT TO PLASMA DAMAGE AND METNOD FOR FORMING SAME
A connective structure for bonding semiconductor devices and methods for forming the same are provided. The bonding structure includes an alpad structure,...
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