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Reinforcement Structure and Method for Controlling Warpage of Chip Mounted
A semiconductor device comprises a substrate, a die mounted on the substrate, a reinforcement plate bonded to the die, and an adhesive layer coupling the...
PREVENTING UNAUTHORIZED USE OF INTEGRATED CIRCUITS FOR RADIATION-HARD
An integrated circuit, a method of forming an integrated circuit, and a semiconductor are disclosed for preventing unauthorized use in radiation-hard...
INTEGRATED CIRCUIT STACK INCLUDING A PATTERNED ARRAY OF ELECTRICALLY
The present disclosure describes a stacked integrated circuit system that includes two integrated circuit layers stacked on opposite sides of an interposer...
A scale-like portion wherein metal plating is changed into a scale-like form is provided by continuously carrying out laser spot irradiation on a lead frame,...
FLEXIBLE CRSS ADJUSTMENT IN A SGT MOSFET TO SMOOTH WAVEFORMS AND TO AVOID
EMI IN DC-DC APPLICATION
A semiconductor power device comprises a plurality of power transistor cells each having a trenched gate disposed in a gate trench wherein the trenched gate...
SEMICONDUCTOR DEVICE HAVING CONDUCTIVE VIA AND MANUFACTURING PROCESS FOR
In accordance with the present invention, there is provided a semiconductor device comprising a semiconductor die or chip, a package body and a through package...
SEMICONDUCTOR PACKAGE MANUFACTURING METHOD
The present disclosure provides a manufacturing method of a semiconductor packaging, including forming a redistribution layer (RDL) on a carrier, defining an...
CAPACITOR WITH FUSE PROTECTION
An embodiment is a circuit. The circuit includes active circuitry, a first capacitor, a first fuse, a second capacitor, and a second fuse. The active circuitry...
METHOD AND STRUCTURE OF FORMING FINFET ELECTRICAL FUSE STRUCTURE
An e-Fuse structure is provided on a surface of an insulator layer of a semiconductor-on-insulator substrate (SOI). The e-Fuse structure includes a first metal...
SEMICONDUCTOR ELECTROPLATING SYSTEM
A semiconductor electroplating system includes a conducting ring and at least one conductive device. The conducting ring is used for carrying a wafer. The...
MICROELECTRONIC COMPONENTS WITH FEATURES WRAPPING AROUND PROTRUSIONS OF
CONDUCTIVE VIAS PROTRUDING FROM...
In a microelectronic component having conductive vias (114) passing through a substrate (104) and protruding above the substrate, conductive features (120E.A,...
METHOD OF FORMING HIGH DENSITY, HIGH SHORTING MARGIN, AND LOW CAPACITANCE
INTERCONNECTS BY ALTERNATING RECESSED...
Embodiments of the invention describe low capacitance interconnect structures for semiconductor devices and methods for manufacturing such devices. According...
SEMICONDUCTOR DEVICES INCLUDING A CONTACT STRUCTURE AND METHODS OF
MANUFACTURING THE SAME
The semiconductor device may include an insulating interlayer on the substrate, the substrate including a contact region at an upper portion thereof, a main...
ELECTRONIC DEVICE PACKAGE, ELECTRONIC DEVICE STRUCTURE AND METHOD OF
FABRICATING ELECTRONIC DEVICE PACKAGE
According to embodiments of the disclosure, an electronic device package may include a wire layer and a rigid element. The wire layer includes a first surface...
CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
A chip package includes a chip, an isolation layer, and a redistribution layer. The chip has a substrate, an electrical pad, and a protection layer. The...
PRINTED CIRCUIT BOARD, SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING
Disclosed is a printed circuit board including an insulating layer, a circuit layer formed on a lower surface of the insulating layer, and a metal post...
DOUBLE SIDE VIA LAST METHOD FOR DOUBLE EMBEDDED PATTERNED SUBSTRATE
An interposer substrate includes a first circuit pattern embedded at a first surface of a dielectric layer and a second circuit pattern embedded at a second...
CORE FOR REVERSE REFLOW, SEMICONDUCTOR PACKAGE, AND METHOD OF FABRICATING
Provided are a reverse-reflow core, a semiconductor package, and a method of fabricating a semiconductor package. The semiconductor package includes: a...
Hybrid Packaged Lead Frame Based Multi-Chip Semiconductor Device with
Multiple Interconnecting Structures
A hybrid packaging multi-chip semiconductor device comprises a lead frame unit, a first semiconductor chip, a second semiconductor chip, a first ...
A semiconductor module including a circuit block that has an electrically insulating layer, a plurality of circuit patterns formed on one surface of the...
A semiconductor device includes a first switching element; a second switching element; a first metal member; a second metal member; a first terminal that has a...
DUAL TRANSISTORS FABRICATED ON LEAD FRAMES AND METHOD OF FABRICATION
A dual transistor device includes a first transistor having a first drain, a first gate, and first source and a second transistor having a second drain, a...
METHOD OF PRODUCING LEAD FRAMES FOR ELECTRONIC COMPONENTS, CORRESPONDING
COMPONENT AND COMPUTER PROGRAM PRODUCT
An electronic component, such as an integrated circuit, includes at least one circuit having coupled therewith electrical connections including a lead frame of...
METHOD OF PRODUCING ELECTRONIC COMPONENTS, CORRESPONDING COMPONENT AND
COMPUTER PROGRAM PRODUCT
An electronic component includes one or more circuits having electrical connections coupled therewith. The electrical connections include a lead frame as well...
Device Including a Logic Semiconductor Chip Having a Contact Electrode for
A device includes a logic semiconductor chip having a contact electrode. The contact electrode is configured to be electrically coupled to a contact clip based...
SEMICONDUCTOR DEVICES AND METHODS OF MAKING THE SAME
In one embodiment, methods for making semiconductor devices are disclosed.
LEAD BONDING STRUCTURE
A lead bonding structure includes: a plurality of leads extending outward from a package; and a plurality of electrode pads formed on a circuit board. The...
REUSABLE THERMOPLASTIC THERMAL INTERFACE MATERIALS AND METHODS FOR
ESTABLISHING THERMAL JOINTS BETWEEN HEAT...
According to various aspects, exemplary embodiments are disclosed of thermal interface materials, electronic devices, and methods for establishing thermal...
SEMICONDUCTOR PACKAGE AND THREE-DIMENSIONAL SEMICONDUCTOR PACKAGE
INCLUDING THE SAME
There is provided a semiconductor package including: a semiconductor chip; and an extension die provided on the semiconductor chip, wherein the semiconductor...
MULTI-CHIP PACKAGE STRUCTURE, WAFER LEVEL CHIP PACKAGE STRUCTURE AND
MANUFACTURING PROCESS THEREOF
A multi-chip package structure includes a first chip, a second chip, a circuit layer, a plurality of first conductive bumps, a plurality of second conductive...
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
A semiconductor package and manufacturing method thereof includes a chip member installed on an upper surface, a lower surface, or both of a substrate. The...
The present application relates to a cured product and the use thereof. When the cured product, for example, is applied to a semiconductor device such as an...
RESIN COMPOSITION, RESIN FILM, SEMICONDUCTOR DEVICE AND METHOD OF
A film-forming resin composition for use in encapsulating large-diameter thin-film wafers includes (A) a silicone resin having a weight-average molecular...
MECHANICAL HANDLING SUPPORT FOR THIN CORES USING PHOTO-PATTERNABLE
An integrated circuit package includes a core such as a thin glass core with through-core vias. A photo-patternable material is disposed directly on surfaces...
A first conductor layer is provided on a first surface of an insulating plate, and has a first volume. A second conductor layer is provided on a second surface...
POWER SEMICONDUCTOR DEVICE
This invention is provided with: a circuit board which is placed in a package and in which an electric circuit including a power semiconductor element is...
METHODS FOR SHIELDING A PLASMA ETCHER ELECTRODE
Methods for plasma etching are disclosed. In one embodiment, a method of etching a plurality of features on a wafer includes positioning a wafer on a feature...
SILICON SINGLE CRYSTAL WAFER, MANUFACTURING METHOD THEREOF AND METHOD OF
A silicon single crystal wafer is provided. The silicon single crystal wafer includes an IDP which is divided into an NiG region and an NIDP region, wherein...
METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING A COMPOSITION FOR
REMOVING PHOTORESIST AND METHODS OF...
A composition for removing photoresist, including an alkyl ammonium fluoride salt in an amount ranging from about 0.5 weight percent to about 10 weight...
METHODS OF FABRICATING FINFET SEMICONDUCTOR DEVICES INCLUDING DUMMY
Provided are a semiconductor device and a method of fabricating a semiconductor device. The semiconductor device includes a first active fin and a second...
SEMICONDUCTOR DEVICE HAVING GATE-ALL-AROUND TRANSISTOR AND METHOD OF
MANUFACTURING THE SAME
A semiconductor device includes a fin structure disposed on a substrate, a sacrificial layer pattern disposed on the fin structure, an active layer pattern...
METHOD OF MANUFACTURING P-CHANNEL FET DEVICE WITH SIGE CHANNEL
A method of forming a semiconductor device is provided including providing a semiconductor-on-insulator (SOI) wafer comprising a first semiconductor layer...
Voids in STI Regions for Forming Bulk FinFETs
An embodiment is an integrated circuit structure including two insulation regions over a substrate with one of the two insulation regions including a void, at...
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A method for manufacturing a semiconductor structure is provided. A plurality of trenches are formed in a substrate. The trenches define at least one fin...
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
Object is to provide a semiconductor device having improved reliability or performance. A high-breakdown-voltage n type transistor has source and drain regions ...
Method of detaching semiconductor material from a carrier and device for
performing the method
Various embodiments provide a method of detaching semiconductor material from a carrier, wherein the method comprises providing a carrier having attached...
WAFER PROCESSING METHOD
Disclosed herein is a wafer processing method for dividing a wafer into a plurality of individual devices along a plurality of crossing division lines. The...
METHOD AND DEVICE FOR CUTTING WAFERS
A method is described of radiatively cutting a wafer, the method comprising the steps of low power cutting of two trenches followed by high power cutting of a...
UV-CURE PRE-TREATMENT OF CARRIER FILM FOR WAFER DICING USING HYBRID LASER
SCRIBING AND PLASMA ETCH APPROACH
Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor...
A semiconductor device includes a semiconductor structure, a plurality of gate structures, at least one source/drain structure, at least one trench, a...