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Patent # Description
2016/0322358 FETS AND METHODS OF FORMING FETS
An embodiment is a method including forming a first fin and a second fin on a substrate, the first fin and the second fin each including a first crystalline...
2016/0322357 Method for Manufacturing a Semiconductor Device Using Tilted Ion Implantation Processes, Semiconductor Device...
A semiconductor device includes first and second field effect transistors (FETs) formed in a semiconductor substrate having a first main surface. The first FET...
2016/0322356 MULTI-FIN FINFET DEVICE INCLUDING EPITAXIAL GROWTH BARRIER ON OUTSIDE SURFACES OF OUTERMOST FINS AND RELATED...
A multi-fin FINFET device may include a substrate and a plurality of semiconductor fins extending upwardly from the substrate and being spaced apart along the...
2016/0322355 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device, and a method of manufacturing the same, includes first and second gate structures extending in a first direction and spaced apart from...
2016/0322354 GATE ELECTRODE AND GATE CONTACT PLUG LAYOUTS FOR INTEGRATED CIRCUIT FIELD EFFECT TRANSISTORS
A four transistor layout can include an isolation region that defines an active region, the active region extending along first and second different...
2016/0322353 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
According to one embodiment, A semiconductor device includes: a first semiconductor layer; and a plurality of first transistors including a plurality of first...
2016/0322352 INTEGRATION OF ANALOG TRANSISTOR
An integrated circuit has two parallel digital transistors and a perpendicular analog transistor. The digital transistor gate lengths are within 10 percent of...
2016/0322351 ELECTRONIC DEVICE INCLUDING A BIDIRECTIONAL HEMT
An electronic device can include a bidirectional HEMT. In an aspect, the electronic device can include a pair of switch gate and blocking gate electrodes,...
2016/0322350 Geometry for a Bidirectional Bipolar Transistor with Trenches that Surround the Emitter/Collector Regions
Bidirectional symmetrically-bidirectional power bipolar devices are laid out so that each emitter/collector region, on either side of the die, is laterally...
2016/0322349 INTEGRATED ON-CHIP JUNCTION CAPACITOR FOR POWER MANAGEMENT INTEGRATED CIRCUIT DEVICE
A power semiconductor device includes a substrate of a first conductivity type, a buried layer of a second conductivity type formed in at least a portion of...
2016/0322348 METHOD TO MAKE GATE-TO-BODY CONTACT TO RELEASE PLASMA INDUCED CHARGING
Methods for preparing a FinFET device with a protection diode formed prior to M1 formation and resulting devices are disclosed. Embodiments include forming...
2016/0322347 Switch Comprising a Field Effect Transistor and Integrated Circuit
A switch comprises a field effect transistor in a semiconductor substrate having a first main surface. The field effect transistor comprises a source region, a...
2016/0322346 ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND A DISPLAY DEVICE
An array substrate is provided. The array substrate includes a substrate body, a gate electrode layer, a first insulating layer, a source-drain electrode...
2016/0322345 ELECTROSTATIC DISCHARGE (ESD) PROTECTION TRANSISTOR DEVICES AND INTEGRATED CIRCUITS WITH ELECTROSTATIC...
An electro-static discharge (ESD) protection transistor device includes a plurality of transistor gates that extend parallel to one another in a first...
2016/0322344 MULTICHIP INTEGRATION WITH THROUGH SILICON VIA (TSV) DIE EMBEDDED IN PACKAGE
Embodiments of the present disclosure are directed to integrated circuit (IC) package assemblies with three-dimensional (3D) integration of multiple dies, as...
2016/0322343 3D INTERCONNECT COMPONENT FOR FULLY MOLDED PACKAGES
A method of making a semiconductor component package can include providing a substrate comprising conductive traces, soldering a surface mount device (SMD) to...
2016/0322342 SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate made of metal, a first metal wiring disposed above the substrate, a first semiconductor element and a second...
2016/0322341 SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a first semiconductor chip; a first wiring and a second wiring which are provided above a first...
2016/0322340 SEMICONDUCTOR DIE ASSEMBLY AND METHODS OF FORMING THE SAME
Semiconductor die assemblies and methods of forming the same are described herein. As an example, a semiconductor die assembly may include a thermally...
2016/0322339 Package on Package Bonding Structure and Method for Forming the Same
A method of forming a package on package (PoP) structure includes forming a first die package, and bonding an external connector of a second die package to a...
2016/0322338 Semiconductor Packages Having Package-On-Package Structures
A semiconductor package includes a lower package with a lower semiconductor chip on a lower package substrate, and an upper package with an upper semiconductor...
2016/0322337 Interconnect Structures, Packaged Semiconductor Devices, and Methods of Packaging Semiconductor Devices
Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices are disclosed. In some embodiments, an interconnect...
2016/0322336 Interconnect Structures, Packaged Semiconductor Devices, and Methods of Packaging Semiconductor Devices
Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices are disclosed. In some embodiments, an interconnect...
2016/0322335 LIGHT-EMITTING DEVICE ARRAY WITH INDIVIDUAL CELLS
A light-emitting device and a method for manufacturing the light-emitting device is disclosed. Such a light-emitting device comprises a substrate, a plurality...
2016/0322334 Semiconductor Package and Manufacturing Method Thereof
A semiconductor package and manufacturing method thereof are disclosed and may include a first semiconductor device comprising a first bond pad on a first...
2016/0322333 Electronic module comprising fluid cooling channel and method of manufacturing the same
Various embodiments provide an electronic module comprising a interposer comprising a fluid channel formed in an electrically isolating material and an...
2016/0322332 REINFORCED WAFER LEVEL PACKAGE COMPRISING A CORE LAYER FOR REDUCING STRESS IN A SOLDER JOINT AND IMPROVING...
Some features pertain to a package that includes a redistribution portion, a first die coupled to the redistribution portion, a core layer coupled to the...
2016/0322331 POWER DELIVERY NETWORK (PDN) DESIGN FOR MONOLITHIC THREE-DIMENSIONAL (3-D) INTEGRATED CIRCUIT (IC)
Systems and methods relate to power delivery networks (PDNs) for monolithic three-dimensional integrated circuits (3D-ICs). A monolithic 3D-IC includes a first...
2016/0322330 FAN-OUT STACKED SYSTEM IN PACKAGE (SIP) HAVING DUMMY DIES AND METHODS OF MAKING THE SAME
An embodiment package includes a first fan-out tier, fan-out redistribution layers (RDLs) over the first fan-out tier, and a second fan-out tier over the...
2016/0322329 WIRE BOND STRENGTHENING
Wire bond strengthening. A method of strengthening a wire bond can include lowering an unthreaded capillary of a wire bonder to a bond strengthening site...
2016/0322328 METHOD FOR LOW TEMPERATURE BONDING AND BONDED STRUCTURE
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing...
2016/0322327 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device according to the present invention includes: (a) disposing, on a substrate (insulating substrate), a bonding...
2016/0322326 WAFER-LEVEL PACKAGING USING WIRE BOND WIRES IN PLACE OF A REDISTRIBUTION LAYER
An apparatus relates generally to a microelectronic package. In such an apparatus, a microelectronic die has a first surface, a second surface opposite the...
2016/0322325 COUPLING OF SIDE SURFACE CONTACTS TO A CIRCUIT PLATFORM
An apparatus relates generally to a microelectromechanical system component. In such an apparatus, the microelectromechanical system component has a lower...
2016/0322324 SEMICONDUCTOR DEVICE INCLUDING BUILT-IN CRACK-ARRESTING FILM STRUCTURE
A wafer-to-wafer semiconductor device includes a first wafer substrate having a first bonding layer formed on a first bulk substrate layer. A second wafer...
2016/0322323 SUBSTRATE STRUCTURE WITH FIRST AND SECOND CONDUCTIVE BUMPS HAVING DIFFERENT WIDTHS
A substrate structure is provided, which includes a substrate body having a plurality of conductive pads, and a plurality of first conductive bumps and a...
2016/0322322 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A flip-chip mounting technique with high reliability is provided in flip-chip mounting using a Cu pillar. In a semiconductor device to be coupled to a mounting...
2016/0322321 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
A semiconductor device includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate, a post electrode formed on the pad electrode...
2016/0322320 TOOLING FOR COUPLING MULTIPLE ELECTRONIC CHIPS
A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding...
2016/0322319 Method of Forming a Solder Bump on a Substrate
A method of forming a solder bump on a substrate includes: forming a conductive layer(s) on the substrate having a surface on which an electrode pad is...
2016/0322318 METHOD FOR PERMANENT CONNECTION OF TWO METAL SURFACES
A process for the production of a permanent, electrically conductive connection between a first metal surface of a first substrate and a second metal surface...
2016/0322317 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method...
2016/0322316 SEMICONDUCTOR STRUCTURE WITH COMPOSITE BARRIER LAYER UNDER REDISTRIBUTION LAYER AND MANUFACTURING METHOD THEREOF
A mechanism of a semiconductor structure with composite barrier layer under redistribution layer is provided. A semiconductor structure includes a substrate...
2016/0322315 MOISTURE-RESISTANT ELECTRONIC COMPONENT, NOTABLY MICROWAVE, AND METHOD FOR PACKAGING SUCH A COMPONENT
A component comprises at least one support on which is fixed at least one electronic circuit, for example a circuit of MMIC type, one or more layers of organic...
2016/0322314 LIGHT SENSITIVE SWITCH FOR SEMICONDUCTOR PACKAGE TAMPER DETECTION
Embodiments relate to the detection of semiconductor tampering with a light-sensitive circuit. A tamper detection device for an integrated circuit includes a...
2016/0322313 LIGHT SENSITIVE SWITCH FOR SEMICONDUCTOR PACKAGE TAMPER DETECTION
Embodiments relate to the detection of semiconductor tampering with a light-sensitive circuit. A tamper detection device for an integrated circuit includes a...
2016/0322312 CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
A chip package includes a chip, a dam layer, a carrier substrate and a light shielding passivation layer. The chip has a first surface and a second surface...
2016/0322311 THERMAL EXPANSION COMPENSATORS FOR CONTROLLING MICROELECTRONIC PACKAGE WARPAGE
The present description relates to the field of fabricating microelectronic packages, wherein a microelectronic device may be attached to a microelectronic...
2016/0322310 Image Pickup Apparatus and Camera Module
An image pickup apparatus includes an optical device, a transparent conductive film, an electrode pad, and a penetrating electrode. In the optical device, an...
2016/0322309 Method and Apparatus for Creating and Placing a Micro Message
Silicon processing technology is used to generate an array of micro messages. These micro messages can contain at least one stick figure, or at least one word,...
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