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Patent # Description
2016/0321208 DISPLAY DEVICE
There is provided a display device including an input unit configured to connect an external device to a serial peripheral interface (SPI) through a plurality...
2016/0321207 NUMA-AWARE ROOT BUS SELECTION
A method includes determining a first host Non-Uniform Memory Access (NUMA) node of a plurality of host NUMA nodes on a host machine that provides a virtual...
2016/0321206 ELECTRONIC DEVICE OPERATING METHOD AND ELECTRONIC DEVICE FOR SUPPORTING THE SAME
An electronic device is provided. The electronic device includes a memory configured to store at least one instruction associated with a universal serial bus...
2016/0321205 Computing architecture with peripherals
A shared memory computing architecture (300) has M interconnect masters (350, 351, 352, 353, 354), one interconnect target (370), and a timeslot based...
2016/0321204 INFORMATION PROCESSOR WITH TIGHTLY COUPLED SMART MEMORY UNIT
A processor includes a plurality of first processing units. A direct memory access unit is coupled to at least one first processing unit of the plurality of...
2016/0321203 ADAPTIVE INTERRUPT MODERATION
Generally, this disclosure relates to adaptive interrupt moderation. A method may include determining, by a host device, a number of connections between the...
2016/0321202 Central Processing Unit With Enhanced Instruction Set
An integrated circuit has a master processing core with a central processing unit coupled with a non-volatile memory and a slave processing core operating...
2016/0321201 Controlling Data Transfer for Data Processing
A computer-implemented method for controlling data transfer for data processing includes: receiving a data set by a first processor; storing the data set in a...
2016/0321200 ENHANCED INITIALIZATION FOR DATA STORAGE ASSEMBLIES
Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage platform includes data storage...
2016/0321199 STORAGE APPARATUS, CONTROL APPARATUS AND COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN CONTROL PROGRAM
A storage apparatus includes a plurality of control devices configured to control access a plurality of storage devices, and a relay apparatus including a...
2016/0321198 CONTROL APPARATUS, STORAGE APPARATUS AND COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN CONTROL PROGRAM
A control apparatus served as a first control apparatus includes a first information storage unit configured to store therein coupling information relating to...
2016/0321197 DISTRIBUTED INTELLIGENT PLATFORM MANAGEMENT INTERFACE (D-IPMI) SYSTEM AND METHOD THEREOF
Certain aspects direct a distributed Intelligent Platform Management Interface (D-IPMI) system. The system includes a computing device and a distributed...
2016/0321196 CIRCUIT FOR CONTROLLING ACCESS TO MEMORY USING ARBITER
The present invention relates to a technology enabling a normal access by controlling a read access through an arbiter in a circuit for controlling an access...
2016/0321195 UNIVERSAL SERIAL BUS SMART HUB
A USB smart hub may provide enhanced battery charging, data storage security, vendor matching, device authentication, data capture/debug, and role switching....
2016/0321194 STORAGE DEVICE, CONTROLLER, AND CONTROL METHOD
According to one embodiment, a storage device includes a storage medium configured to store second data groups including first data groups, each of the first...
2016/0321193 PAGE COMPRESSION STRATEGY FOR IMPROVED PAGE OUT PROCESS
A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical...
2016/0321192 APPARATUS AND METHOD FOR EXTENDED CACHE CORRECTION
An apparatus includes a semiconductor fuse array, a cache memory, and a plurality of cores. The semiconductor fuse array is disposed on a die, into which is...
2016/0321191 Add-On Memory Coherence Directory
A mechanism is provided for memory coherence in a multiple processor system. Responsive to a memory access resulting in a cache miss in a given processor, the...
2016/0321190 COMPUTATION OF DESTAGE TASKS BASED ON RANKS WITH WRITE OPERATIONS
Various embodiments provide methods, systems, and computer program products for destaging storage tracks from cache in at least one host, by a processor...
2016/0321189 MRU BATCHING TO REDUCE LOCK CONTENTION
Data operations, requiring a lock, are batched into a set of operations to be performed on a per-core basis under a single lock. A Most Recently Used (MRU)...
2016/0321188 DEFERRED RE-MRU OPERATIONS TO REDUCE LOCK CONTENTION
Data operations, requiring a lock, are batched into a set of operations to be performed on a per-core basis. A global lock for the set of operations is...
2016/0321187 CHANGING A HASH FUNCTION BASED ON A CONFLICT RATIO ASSOCIATED WITH CACHE SETS
Data and a memory address associated with the data may be received. A hash value of the memory address may be calculated by using a first hash function. The...
2016/0321186 SUPPRESSING VIRTUAL ADDRESS TRANSLATION UTILIZING BITS AND INSTRUCTION TAGGING
A translation lookaside buffer coherency unit with Emulated Purge (TCUEP) translates a first virtual address for a first instruction into a first physical...
2016/0321185 CONTROLLING DISPLACEMENT IN A CO-OPERATIVE AND ADAPTIVE MULTIPLE-LEVEL MEMORY SYSTEM
In one embodiment, a processor includes a control logic to determine whether to enable an incoming data block associated with a first priority to displace, in...
2016/0321184 Multiple Read and Write Port Memory
A memory supports a write or multiple read operations in any given clock cycle. In a first clock cycle, new content data is written to a particular content...
2016/0321183 EARLY CACHE PREFETCHING IN PREPARATION FOR EXIT FROM IDLE MODE
A system includes a functional unit, at least one cache coupled to the functional unit, and a power management unit coupled to the functional unit and the at...
2016/0321182 DATA PROCESSING APPARATUS HAVING A CACHE
An apparatus has a cache configured to store entries which correspond to blocks of addresses having one of a plurality of sizes as selected by a control...
2016/0321181 SYSTEM AND METHOD FOR EVENT MONITORING IN CACHE COHERENCE PROTOCOLS WITHOUT EXPLICIT INVALIDATIONS
Synchronization events associated with cache coherence are monitored without using invalidations. A callback-read is issued to a memory address associated with...
2016/0321180 Add-On Memory Coherence Directory
A mechanism is provided for memory coherence in a multiple processor system. Responsive to a memory access resulting in a cache miss in a given processor, the...
2016/0321179 ENFORCING DATA PROTECTION IN AN INTERCONNECT
Interconnect circuitry and a method of operating the interconnect circuitry are provided, where the interconnect circuitry is suitable to couple at least two...
2016/0321178 CACHE CLOSURE AND PERSISTENT SNAPSHOT IN DYNAMIC CODE GENERATING SYSTEM SOFTWARE
Systems and methods may provide translation cache closure and consistent data recovery in dynamic code generating system. An apparatus may group translation...
2016/0321177 FUSIBLE AND RECONFIGURABLE CACHE ARCHITECTURE
A reconfigurable cache architecture is provided. In processor design, as the density of on-chip components increases, a quantity and complexity of processing...
2016/0321176 DATA CACHING
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for caching data not frequently accessed. One of the methods...
2016/0321175 STORAGE SYSTEM AND CONTROL APPARATUS
A first control apparatus includes a first memory unit including a local cache, a first power supply that supplies electric power to the first memory unit, and...
2016/0321174 DYNAMIC MEDIA CACHE FOR A DATA STORAGE DRIVE IN AN INFORMATION HANDLING SYSTEM
A drive controller associated with a data storage medium may receive a command from a host to write a set of data to a storage space of the data storage...
2016/0321173 AUTOMATIC GARBAGE COLLECTION THRASHING MONITORING
The system identifies objects that cause thrashing behavior in garbage collection. A garbage collection process may be monitored for a period of time. Over...
2016/0321172 MEMORY DEVICE THAT PERFORMS GARBAGE COLLECTION
A memory device includes a nonvolatile memory unit including a plurality of blocks, and a memory controller. The memory controller is configured to determine...
2016/0321171 MEMORY SYSTEM EXECUTING GARBAGE COLLECTION
According to one embodiment, a memory system includes a nonvolatile memory, detection unit, management unit, selection unit, and garbage collection unit. The...
2016/0321170 SOFTWARE TEST AUTOMATION SYSTEM AND METHOD
A method for testing a software application is provided. The method may comprise associating a plurality of controls on a software application screen with...
2016/0321169 TEST SUITE MINIMIZATION
Disclosed is a method and system for classifying test cases. In one implementation, the method comprises creating a test step master list comprising a...
2016/0321168 UNIFIED PROCESSING TEST STRUCTURE
A method, comprises receiving a test case on a processor, receiving an input from a user to call the test case in a first calling environment, identifying the...
2016/0321167 Developer Channel Compliance
Novel tools and techniques might provide for implementing application programming interface ("API") use compliance, and, in some cases, by implementing...
2016/0321166 COMPOSABLE TEST AUTOMATION FRAMEWORK
A method for composable test automation includes executing a story by, for each step in a story, receiving a call for the step in the story, categorizing the...
2016/0321165 ANNOTATED TEST INTERFACES
In general, in one aspect, the technology relates to a method for composable testing. The method may include executing a story by, for at least one step in the...
2016/0321164 UNIFIED PROCESSING TEST STRUCTURE
A method, comprises receiving a test case on a processor, receiving an input from a user to call the test case in a first calling environment, identifying the...
2016/0321163 DYNAMIC INSTRUMENTATION OF WSGI APPLICATIONS
An agent installed on application server having a WSGI web application dynamically instruments that web application. The agent may modify the application via...
2016/0321162 DEBUG MANAGEMENT USING A COUNTER
Disclosed aspects include identifying basic blocks of a program. For each basic block, the compiler inserts an identifier that includes the function name, and...
2016/0321161 REAL-TIME USAGE CHECKING OF DYNAMICALLY GENERATED PROGRAM OUTPUT
Receive output dynamically generated by a running program and check that output for spelling, grammar, and/or other usage errors, providing notice to a user of...
2016/0321160 Translation Bug Prediction Classifier
In one embodiment, a translation system may use a translation bug prediction model to more efficiently identify translation errors in a user interface text...
2016/0321159 Integrating a Protocol Analysis Device with Features of a Software Development Program
In general, the subject matter described in this disclosure can be embodied in methods, systems, and program products for controlling a protocol analysis...
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