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Patent # Description
2016/0329447 ENCAPSULATION ADHESIVE FILM FOR SOLAR CELL MODULE
The present invention provides an encapsulation adhesive film for solar cell modules, which is obtained by mixing a transparent spherical material with an...
2016/0329446 DEVICE FOR MANUFACTURING INTEGRATED THIN FILM SOLAR CELL
An apparatus for manufacturing an integrated thin film solar cell in which a plurality of unit cells are electrically connected in series to each other in...
2016/0329445 HUMIDITY-RESISTANT AND HEAT-RESISTANT SOLAR CELL BACKSHEET AND MANUFACTURING METHOD THEREFOR
A humidity-resistant and heat-resistant solar cell backsheet, comprising a weather-resistant layer, a connection layer, a structure-reinforcing layer and a...
2016/0329444 SOLAR CELL AND PRODUCTION METHOD THEREFOR
The present invention is provided with an interface layer that minimizes interdiffusion between a silicon substrate and copper electrode wiring that are used...
2016/0329443 SOLAR CELL WITH A LOW-RESISTIVITY TRANSPARENT CONDUCTIVE OXIDE LAYER
One embodiment of the present invention provides a solar cell that includes a crystalline silicon base layer, a first quantum tunneling barrier layer deposited...
2016/0329442 SOLAR BATTERY CELL AND MANUFACTURING METHOD FOR THE SOLAR BATTERY CELL
Provided is a solar battery cell with low price, high reliability, and high conversion efficiency. A manufacturing method for the solar battery cell including...
2016/0329441 SOLAR CELLS WITH IMPROVED LIFETIME, PASSIVATION AND/OR EFFICIENCY
A method of fabricating a solar cell can include forming a dielectric region on a silicon substrate. The method can also include forming an emitter region over...
2016/0329440 PHOTOVOLTAIC DEVICES WITH FINE-LINE METALLIZATION AND METHODS FOR MANUFACTURE
A method for use in forming a photovoltaic device includes forming a doped semiconductor layer on a surface of a semiconductor substrate and forming a metal...
2016/0329439 PHOTOVOLTAIC DEVICES WITH FINE-LINE METALLIZATION AND METHODS FOR MANUFACTURE
A method for use in forming a photovoltaic device includes forming a doped semiconductor layer on a surface of a semiconductor substrate and forming a metal...
2016/0329438 NANOWIRE-BASED MECHANICAL SWITCHING DEVICE
Nanowire-based mechanical switching devices are described. For example, a nanowire relay includes a nanowire disposed in a void disposed above a substrate. The...
2016/0329437 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A transistor having high field-effect mobility is provided. A transistor having stable electrical characteristics is provided. A transistor having low...
2016/0329436 SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
A semiconductor device of one embodiment of the present invention includes a semiconductor, an insulator, a first conductor, and a second conductor. In the...
2016/0329435 ETCH STOP REGION BASED FABRICATION OF BONDED SEMICONDUCTOR STRUCTURES
Bonded semiconductor device structures and device structure fabrication processes to obviate the need for SOI wafers in many device fabrication applications...
2016/0329434 SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC DEVICE
The semiconductor device includes a first insulating layer; a first oxide insulating layer over the first insulating layer; an oxide semiconductor layer over...
2016/0329433 THIM FILM TRANSISTOR AND METHOD FOR MAKING THE SAME, THIM FILM TRANSISTOR PANEL AND DISPLAY DEVICE
A thin film transistor includes a source electrode, a drain electrode, a semiconducting layer, an insulating layer, and a gate electrode. The drain electrode...
2016/0329432 THIN FILM TRANSISTOR AND DISPLAY DEVICE INCLUDING THE SAME
A thin film transistor includes: a lower gate electrode on a substrate; a gate insulating layer on the lower gate electrode; a first semiconductor layer on the...
2016/0329431 III-V LAYERS FOR N-TYPE AND P-TYPE MOS SOURCE-DRAIN CONTACTS
Techniques are disclosed for forming transistor devices having reduced parasitic contact resistance relative to conventional devices. In some example...
2016/0329430 DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
A display device includes: a first substrate; a gate electrode on the first substrate; a gate insulating layer on the gate electrode; a semiconductor layer on...
2016/0329429 STRAINED FINFET SOURCE DRAIN ISOLATION
A semiconductor structure, such as a strained FinFETs, includes a strain relief buffer (SRB) layer isolated and separated from a source and a drain by a second...
2016/0329428 FINFET WITH CONSTRAINED SOURCE-DRAIN EPITAXIAL REGION
A method includes forming a plurality of fins on a substrate, a gate is formed over a first portion of the plurality of fins with a second portion of the...
2016/0329427 SEMICONDUCTOR DEVICE AND RELATED MANUFACTURING METHOD
A semiconductor device may include a substrate, an n-channel field-effect transistor positioned on the substrate, and a p-channel field-effect transistor...
2016/0329426 SPLIT POLY CONNECTION VIA THROUGH-POLY-CONTACT (TPC) IN SPLIT-GATE BASED POWER MOSFETS
Embodiments of the present disclosure provide a contact structure in a split-gate trench transistor device for electrically connecting the top electrode to the...
2016/0329425 SEMICONDUCTOR DEVICE
A semiconductor device includes a first conductivity type semiconductor substrate, a second conductivity type semiconductor layer which is formed on the...
2016/0329424 SIC TRENCH TRANSISTOR AND METHOD FOR ITS MANUFACTURE
An SiC trench transistor having a first terminal and an epitaxial layer positioned vertically between a gate trench and a second terminal; a compensation layer...
2016/0329423 Multiple Shielding Trench Gate FET
A semiconductor device contains a vertical MOS transistor having a trench gate in trenches extending through a vertical drift region to a drain region. The...
2016/0329422 INSULATED GATE TYPE SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND INSULATED GATE TYPE SEMICONDUCTOR DEVICE
A technique disclosed herein improves a voltage resistance of an insulated gate type semiconductor device. A provided method is a method for manufacturing an...
2016/0329421 NITRIDE SEMICONDUCTOR DEVICE
A nitride semiconductor device according to the present disclosure includes a substrate; a first nitride semiconductor layer which is formed on the substrate,...
2016/0329420 Field Effect Transistor Structure Having Notched Mesa
A Field Effect Transistor structure is provided having: a semi-insulating substrate; a semiconductor mesa structure disposed on the substrate and having a...
2016/0329419 NITRIDE SEMICONDUCTOR LAYERED BODY, METHOD FOR MANUFACTURING THE SAME, AND NITRIDE SEMICONDUCTOR DEVICE
A nitride semiconductor layered body includes a Si substrate having a surface, as the principal surface, inclined at an off-angle of 0 degrees or more and 4.0...
2016/0329418 Bidirectional Bipolar Transistors with Two-Surface Cellular Geometries
A two-surface bidirectional power bipolar transistor is constructed with a two-surface cellular layout. Each emitter/collector region (e.g. doped n-type) is a...
2016/0329417 BIDIRECTIONAL POWER SWITCH
A switch includes three components. Each component includes a stack of three semiconductor regions of alternating conductivity types and a control region in a...
2016/0329416 Finfets With Contact-All-Around
An integrated circuit structure includes a semiconductor substrate, a semiconductor fin over the semiconductor substrate, a gate stack on a top surface and a...
2016/0329415 WORK FUNCTION METAL FILL FOR REPLACEMENT GATE FIN FIELD EFFECT TRANSISTOR PROCESS
A method of forming a semiconductor device that includes forming a sacrificial gate structure on a channel portion of a fin structure, wherein the angle at the...
2016/0329414 METHOD OF FABRICATING SEMICONDUCTOR DEVICE
A method of fabricating a semiconductor device includes forming an active pattern protruding from a substrate, forming a liner layer on the active pattern,...
2016/0329413 Structure of Trench-Vertical Double Diffused MOS Transistor and Method of Forming the Same
A structure of trench VDMOS transistor comprises an n- epi-layer/ n+ substrate having trench gates formed therein, which have a trench oxide layer conformally...
2016/0329412 MOS TRANSISTOR AND FABRICATION METHOD
MOS transistors and fabrication methods are provided. An exemplary MOS transistor includes a gate structure formed on a semiconductor substrate. A lightly...
2016/0329411 CIRCUIT ARRANGEMENT AND METHOD OF FORMING A CIRCUIT ARRANGEMENT
A circuit arrangement may be provided. The circuit arrangement may include a semiconductor substrate including a first surface, a second surface opposite the...
2016/0329410 GATE STRUCTURE WITH REFRACTORY METAL BARRIER
Gate structures for semiconductor devices include a silicon nitride layer, an electron beam evaporated tantalum nitride layer disposed on the silicon nitride...
2016/0329409 SELECTIVE THICKENING OF PFET DIELECTRIC
A complementary metal-oxide semiconductor (CMOS) device and a method of fabricating a CMOS device are described. The method includes forming an interfacial...
2016/0329408 HIGH-SIDE FIELD EFFECT TRANSISTOR
The present invention provides a transistor comprising a substrate having a surface; a first deep well region in the substrate; a second deep well region in...
2016/0329407 FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A structure with which the zero current of a field effect transistor using a conductor-semiconductor junction can be reduced is provided. A floating electrode...
2016/0329406 REVERSE TONE SELF-ALIGNED CONTACT
The present disclosure relate to a method to an integrated chip having a source/drain self-aligned contact to a transistor or other semiconductor device. In...
2016/0329405 CONTACT STRUCTURE OF SEMICONDUCTOR DEVICE
The invention relates to a contact structure of a semiconductor device. An exemplary structure for a semiconductor device comprises an insulation region over a...
2016/0329404 METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE
A method for producing a semiconductor device includes depositing an oxide film containing an impurity having a first conductivity type on a substrate. A...
2016/0329403 TWO-DIMENSIONAL CONDENSATION FOR UNIAXIALLY STRAINED SEMICONDUCTOR FINS
Techniques are disclosed for enabling multi-sided condensation of semiconductor fins The techniques can be employed, for instance, in fabricating fin-based...
2016/0329402 FIN CUT FOR TIGHT FIN PITCH BY TWO DIFFERENT SIT HARD MASK MATERIALS ON FIN
Methods that enable fin cut at very tight pitch are provided. After forming a first set of paired sidewall image transfer (SIT) spacers and a second set of...
2016/0329401 Method of Manufacturing Semiconductor Devices and Semiconductor Device Containing Oxygen-Related Thermal Donors
A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen...
2016/0329400 NANOWIRE AND METHOD OF FABRICATING THE SAME
A method of forming a nanowire includes providing a substrate. The substrate is etched to form at least one fin. Subsequently, a first epitaxial layer is...
2016/0329399 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device of the present invention includes a semiconductor substrate, stripe-shaped trenches for separating the semiconductor substrate into a...
2016/0329398 Semiconductor Wafer and Method of Manufacturing Semiconductor Devices in a Semiconductor Wafer
A method of manufacturing semiconductor devices in a semiconductor wafer comprises forming charge compensation device structures in the semiconductor wafer. An...
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