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Patent # Description
2016/0328347 MULTI-PROTOCOL IO INFRASTRUCTURE FOR A FLEXIBLE STORAGE PLATFORM
A flexible storage system. A storage motherboard accommodates, on a suitable connector, a storage adapter circuit that provides protocol translation between a...
2016/0328346 MULTI-MASTER BUS
Multiple master modules are connected to a bus, each having bus communication logic for initiating a transaction over the bus. The bus communication logic is...
2016/0328345 I2C BUS PRIORITY ALERT SYSTEM
An inter-integrated circuit (I.sup.2C) bus priority alert system includes sender device with a sender I.sup.2C connector. The sender device detects a first...
2016/0328344 METHOD FOR DYNAMIC CONFIGURATION OF A PCIE SLOT DEVICE FOR SINGLE OR MULTI ROOT ABILITY
A method and an information handling system (IHS) selectively configures a peripheral component interconnect express (PCIe) device with single or multiple root...
2016/0328343 DEVICE INTERFACING
Many devices may comprise interfaces, such as serial interfaces, over which configuration and/or enablement/disablement of device features may be provided to...
2016/0328342 APPARATUS AND METHOD FOR VIRTUALIZING NETWORK INTERFACE
A device for virtualizing a network interface includes, a virtualization information unit configured to store virtual network interface card (NIC) information...
2016/0328341 Near Field Communication (NFC) Enabled Peripheral Device
A communication system of the present disclosure includes a communication device that is communicatively coupled to a peripheral device. The peripheral device...
2016/0328340 MEMORY SUBSYSTEM AND COMPUTER SYSTEM
A method including estimating an access request frequency from a CPU to a memory subsystem by counting a number of CPU access requests and a number of requests...
2016/0328339 INTERRUPT CONTROLLER
An interrupt controller includes a fabric slave that can receive MMIO operation requests, a plurality of output interrupt lines, a plurality of interrupt...
2016/0328338 SIGNAL SWITCHING CIRCUIT AND JBOD SYSTEM HAVING THE SIGNAL SWITCHING CIRCUIT
A signal switching circuit for a system of Just a Bunch of Disks includes a first connector, a second connector, and first gate module. The first connector is...
2016/0328337 INTERFACE DETECTION CIRCUIT
One or more characteristics of devices are ascertained in accordance with one or more aspects of the disclosure. As may be consistent with one or more...
2016/0328336 Full-control remote controller based on waveform downloading and address selecting and an implementing method...
The invention relates to a full-control remote controller based on waveform downloading and address selecting and an implementing method thereof. The...
2016/0328335 TREE-LESS INTEGRITY AND REPLAY MEMORY PROTECTION FOR TRUSTED EXECUTION ENVIRONMENT
Systems and methods for memory protection for implementing trusted execution environment. An example processing system comprises: an on-package memory; a...
2016/0328334 CONFIGURATION OF STANDBY PORTION OF MEMORY BASED ON CONTEXT
In one aspect, a device includes a processor, memory accessible to the processor, and storage accessible to the processor. The storage bears instructions...
2016/0328333 APPARATUS AND METHOD FOR MANAGING A VIRTUAL GRAPHICS PROCESSOR UNIT (VGPU)
An apparatus and method are described for managing a virtual graphics processor unit (GPU). For example, one embodiment of an apparatus comprises: a dynamic...
2016/0328332 Data Mapping For Non-Volatile Storage
Sensing techniques and associated circuitry are provided for use with a memory device. The techniques are suited for sensing operations involving even-numbered...
2016/0328331 Fast Data Initialization
A method and system for fast file initialization is provided. An initialization request to create or extend a file is received. The initialization request...
2016/0328330 Distributed History Buffer Flush and Restore Handling in a Parallel Slice Design
An approach is provided in which a computing system captures content included in a history buffer entry that corresponds to a flush ITAG. The computing system,...
2016/0328329 Distributed History Buffer Flush and Restore Handling in a Parallel Slice Design
An approach is provided in which a computing system captures content included in a history buffer entry that corresponds to a flush ITAG. The computing system,...
2016/0328328 SEMICONDUCTOR APPARATUS AND OPERATING METHOD THEREOF
A semiconductor apparatus may include: a buffer configured to store write request data input in response to a write request from a host; a memory device...
2016/0328327 ADJUSTABLE OVER-RESTRICTIVE CACHE LOCKING LIMIT FOR IMPROVED OVERALL PERFORMANCE
Disclosed is a multi-core processor that includes a processor core, a graphics core, and a cache controller. The cache controller receives a first request from...
2016/0328326 MEMORY COHERENCE IN A MULTI-CORE, MULTI-LEVEL, HETEROGENEOUS COMPUTER ARCHITECTURE
Techniques are described for memory coherence in a multi-core system with a heterogeneous memory architecture comprising one or more hardware-managed caches...
2016/0328325 RECONFIGURABLE FETCH PIPELINE
An apparatus includes an access mode selection circuit configured to select a cache access mode based on a number of instructions stored at an issue queue, a...
2016/0328324 Private Memory Table for Reduced Memory Coherence Traffic
A mechanism is provided for memory coherence in a multiple processor system. Responsive to a memory operation from a processing core of the multiple processor...
2016/0328323 Private Memory Table for Reduced Memory Coherence Traffic
A mechanism is provided for memory coherence in a multiple processor system. Responsive to a memory operation from a processing core of the multiple processor...
2016/0328322 PROCESSOR TO MEMORY BYPASS
An apparatus for processing memory requests from a functional unit in a computing system is disclosed. The apparatus may include an interface that may be...
2016/0328321 FAST READ FOR NON-VOLATILE STORAGE
Sensing techniques and associated circuitry are provided for use with a memory device. The techniques are suited for sensing operations involving even-numbered...
2016/0328320 TRACKING THE CONTENT OF A CACHE
A cache is provided comprising a plurality of ways, each way of the plurality of ways comprising a data array, wherein a data item stored by the cache is...
2016/0328319 MANAGING MEMORY IN A COMPUTER SYSTEM
Methods, computer program products, and systems for managing memory in a computer system in which memory locations in use at any given time are represented as...
2016/0328318 MANAGING MEMORY IN A COMPUTER SYSTEM
Methods, computer program products, and systems for managing memory in a computer system in which memory locations in use at any given time are represented as...
2016/0328317 System and Method for Optimizing System Memory and Input/Output Operations Memory
An information handling system including a first memory to store data as a system memory for operations of a first processor in the information handling...
2016/0328316 Systems and Methods for Automating Test Scripts for Applications That Interface to Payment Networks
Systems and methods are provided for use in testing a target application, including target applications for a payment network. One exemplary method includes...
2016/0328315 RISK-BASED TEST COVERAGE AND PRIORITIZATION
A processor receives a rule containing a first set of code statements. The processor compares the first set of code statements of the rule to a second set of...
2016/0328314 SYSTEM AND METHOD FOR PROVIDING CODE COVERAGE
Disclosed is a method and system for providing code coverage of a code. The system may determine a type of file comprising the code. The system may extract a...
2016/0328313 SYSTEM AND METHOD TO CLASSIFY AUTOMATED CODE INSPECTION SERVICES DEFECT OUTPUT FOR DEFECT ANALYSIS
A method is implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming...
2016/0328312 ENHANCED STABILITY OF AUTOMATION EXECUTION VIA USE OF STATE MACHINE PATTERN AND EXPECTED CONDITIONS WHEN...
An automation testing framework is provided for testing user interface elements in an application. Actions may be executed on elements of the application using...
2016/0328311 OPERATING A TRACE PROCEDURE FOR A COMPUTER PROGRAM
A method is provided for operating a trace procedure, which traces execution of a computer program, where the program uses different callable modules. A...
2016/0328310 Distributed Kernel Thread List Processing for Kernel Patching
In one example implementation, a system for patching a kernel can comprise a plurality of processor resources, a distribution engine to divide a kernel thread...
2016/0328309 METHOD AND APPARATUS FOR MONITORING A CONTROL FLOW OF A COMPUTER PROGRAM
Method for monitoring a control flow of an imperative computer program, including annotating scheduling the program with calls to a monitor, each call by a...
2016/0328308 Debugging System
A debugging software system facilitates the process of debugging the execution of a program in environments where the user is not constantly present. The...
2016/0328307 RESOURCE MONITORING SYSTEM AND METHOD THEREOF
The invention provides a resource monitoring system. The monitoring unit inputs the collected monitoring data to a data-monitoring queue. The monitoring data...
2016/0328306 INTERFACE TEST DEVICE
An interface test device includes several interfaces, a test signal input interface, a control signal input interface, and a control module. The interface test...
2016/0328305 REDUNDANT, FAULT-TOLERANT, DISTRIBUTED REMOTE PROCEDURE CALL CACHE IN A STORAGE SYSTEM
A method of operating a remote procedure call cache in a storage cluster is provided. The method includes receiving a remote procedure call at a first storage...
2016/0328304 METHOD OF COPYING A DATA IMAGE FROM A SOURCE TO A TARGET STORAGE DEVICE IN A FAULT TOLERANT COMPUTER SYSTEM
A fault tolerant computer system is connected over a network with one or more I/O devices. The fault-tolerant computer system has two host devices each of...
2016/0328303 RESYNCHRONIZING TO A FIRST STORAGE SYSTEM AFTER A FAILOVER TO A SECOND STORAGE SYSTEM MIRRORING THE FIRST...
Provided are a computer program product, system, and method for performing a failover between a first storage system and a second storage system. Data is...
2016/0328302 CONTROLLING THE OPERATING STATE OF A FAULT-TOLERANT COMPUTER SYSTEM
A fault tolerant computer system having two virtual machines (VMs), each running on a separate host device, is connected over a network to one or more I/O...
2016/0328301 CACHED DATA REPLICATION FOR CACHE RECOVERY
Processes are disclosed for embodiments of a caching system to utilize a snapshot file or other limited size data structure to store a portion of the data...
2016/0328300 System and Method for Self-Healing Basic Input/Output System Boot Image and Secure Recovery
An information handling system and method provides basic input/output system (BIOS) recovery. At a baseboard management controller (BMC), a basic input/output...
2016/0328299 VIRTUAL FILE SYSTEM WITH VNODE RECONSTRUCTION CAPABILITY
A virtual file system and method for performing virtual file system operations uses a vnode descriptor to access a vnode for a vnode operation. If the vnode is...
2016/0328298 AUDIT OBJECT GENERATION IN A DISPERSED STORAGE NETWORK
A method for execution by a dispersed storage and task (DST) processing unit includes obtaining audit records for an audit object and determining when the...
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