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Patent # Description
2016/0336354 DISPLAY PANEL
A display panel includes an active device array substrate, an opposite substrate, a display medium and a sealant. The active device array substrate includes a...
2016/0336353 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
An insulating film provided between adjacent pixels is referred to as a bank, a partition, a barrier, an embankment or the like, and is provided above a source...
2016/0336352 SEMICONDUCTOR DEVICE, DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE, DISPLAY MODULE INCLUDING THE DISPLAY...
To provide a semiconductor device including a planar transistor having an oxide semiconductor and a capacitor. In a semiconductor device, a transistor includes...
2016/0336351 PIXEL STRUCTURE, ARRAY SUBSTRATE AND DISPLAY DEVICE
A pixel structure, an array substrate and a display device. The pixel substrate comprises a first pixel electrode and a second pixel electrode arranged in a...
2016/0336350 Circuit-on-Wire (CoW)
A circuit-on-wire (CoW) is provided that is made from a flexible metal wire with an outer surface, and a plurality of discrete electrical control devices...
2016/0336349 THIN FILM TRANSISTOR, FABRICATING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY DEVICE
The present invention provides a thin film transistor, a fabricating method thereof, an array substrate and a display device. The fabricating method of the...
2016/0336348 POLYSILICON RESISTOR FORMATION IN SILICON-ON-INSULATOR REPLACEMENT METAL GATE FINFET PROCESSES
A method of forming a polysilicon resistor in replacement metal gate (RMG) processing of finFET devices includes forming a plurality of semiconductor fins over...
2016/0336347 BULK FIN FORMATION WITH VERTICAL FIN SIDEWALL PROFILE
Fabricating a semiconductor device includes providing a substrate, wherein the substrate is comprised of a base layer, a doped silicon layer on top of the base...
2016/0336346 Semiconductor Device and Method of Fabricating the Same
An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions...
2016/0336345 CHANNEL SiGe DEVICES WITH MULTIPLE THRESHOLD VOLTAGES ON HYBRID ORIENTED SUBSTRATES, AND METHODS OF...
Multiple threshold voltage devices on hybrid oriented substrates, and methods of manufacturing same are disclosed. A method for manufacturing a semiconductor...
2016/0336344 SILICON-ON-INSULATOR DEVICES HAVING CONTACT LAYER
Silicon-on-insulator (SOI) devices having contact layer. In some embodiments, a radio-frequency (RF) device can include a field-effect transistor (FET)...
2016/0336343 INTEGRATED CIRCUIT WITH WELL AND SUBSTRATE CONTACTS
An integrated circuit comprises standard cells arranged in rows and columns. The integrated circuit also comprises tap cells arranged in rows and columns. The...
2016/0336342 Semiconductor Constructions and NAND Unit Cells
Some embodiments include methods of forming semiconductor constructions. Alternating layers of n-type doped material and p-type doped material may be formed....
2016/0336341 METHODS AND APPARATUSES HAVING MEMORY CELLS INCLUDING A MONOLITHIC SEMICONDUCTOR CHANNEL
Methods for forming a string of memory cells, apparatuses having a string of memory cells, and systems are disclosed. One such method for forming a string of...
2016/0336340 SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, gate electrodes and interlayer insulating layers alternately stacked on the substrate, channel regions penetrating...
2016/0336339 DEVICE AND METHOD FOR DETERMINING ELECTRICAL CHARACTERISTICS FOR ELLIPSE GATE-ALL-AROUND FLASH MEMORY
Embodiments of the present invention provide improved 3D non-volatile memory devices and associated methods. In one embodiment, a string of 3D non-volatile...
2016/0336338 Semiconductor Apparatus
A semiconductor apparatus includes gate electrodes and interlayer insulating layers alternately stacked on a substrate, channel regions penetrating through the...
2016/0336337 METHOD OF MANUFACTURING NON-VOLATILE MEMORY HAVING SONOS MEMORY CELLS
A method for manufacturing a non-volatile memory with SONOS memory cells, which includes steps of: providing a substrate; forming a first gate oxide layer and...
2016/0336336 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
According to one embodiment, a semiconductor memory device includes a semiconductor pillar extending in a first direction in a first region. The semiconductor...
2016/0336335 Source Line Formation and Structure
An initial etch forms a trench over first contact areas of a plurality of NAND strings, the initial etch also forming individual openings over second contact...
2016/0336334 SHORT CIRCUIT REDUCTION IN A FERROELECTRIC MEMORY CELL COMPRISING A STACK OF LAYERS ARRANGED ON A FLEXIBLE...
A ferroelectric memory cell (1) and a memory device (100) comprising one or more such cells (1). The ferroelectric memory cell comprises a stack (4) of layers...
2016/0336333 SEMICONDUCTOR DEVICE INCLUDING AN ELECTRODE LOWER LAYER AND AN ELECTRODE UPPER LAYER AND METHOD OF...
A semiconductor device includes a lower electrode, a ferroelectric film on the lower electrode, an upper electrode on the ferroelectric film, and a first...
2016/0336332 ANTIFUSE WITH BACKFILLED TERMINALS
An antifuse may include a non-planar conductive terminal having a high-z portion extending to a greater z-height than a low-z portion. A second conductive...
2016/0336331 PILLAR-SHAPED SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR PRODUCING THE SAME
A pillar-shaped semiconductor memory device includes an i-layer substrate, a silicon pillar, a tunnel insulating layer, a data charge storage insulating layer,...
2016/0336330 PILLAR-SHAPED SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR PRODUCING THE SAME
A pillar-shaped semiconductor memory device includes a silicon pillar, and a tunnel insulating layer, a data charge storage insulating layer, a first...
2016/0336329 Semiconductor Devices and Methods of Manufacture Thereof
A method of forming an SRAM cell includes forming a first vertical pull-down transistor, a second vertical pull-down transistor, a first vertical pass-gate...
2016/0336328 SILICON PRECURSOR, METHOD OF FORMING A LAYER USING THE SAME, AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE...
The inventive concepts provide silicon precursors, methods of forming a layer using the same, and methods of fabricating a semiconductor device using the same....
2016/0336327 METHOD OF FABRICATING SEMICONDUCTOR DEVICE
A method of fabricating a semiconductor device includes providing a substrate including a pair of first regions and a second region therebetween, forming first...
2016/0336326 MEMORY DEVICE COMPRISING ELECTRICALLY FLOATING BODY TRANSISTOR
A semiconductor memory cell comprising an electrically floating body. A method of operating the memory cell is provided.
2016/0336325 Array Of Conductive Vias, Methods Of Forming A Memory Array, And Methods Of Forming Conductive Vias
A method of forming conductive vias comprises forming at least three parallel line constructions elevationally over a substrate. The line constructions...
2016/0336324 TUNNEL FIELD EFFECT TRANSISTOR AND METHOD OF MAKING THE SAME
A vertically integrated transistor device increases the effective active area of the device to improve the performance characteristics of the device. The...
2016/0336323 SEMICONDUCTOR STRUCTURE CONTAINING LOW-RESISTANCE SOURCE AND DRAIN CONTACTS
Semiconductor structures having a source contact and a drain contact that exhibit reduced contact resistance and methods of forming the same are disclosed. In...
2016/0336322 DUAL FIN INTEGRATION FOR ELECTRON AND HOLE MOBILITY ENHANCEMENT
A technique for forming a semiconductor device is provided. Sacrificial mandrels are formed over a hardmask layer on a semiconductor layer. Spacers are formed...
2016/0336321 DUAL FIN INTEGRATION FOR ELECTRON AND HOLE MOBILITY ENHANCEMENT
A technique for forming a semiconductor device is provided. Sacrificial mandrels are formed over a hardmask layer on a semiconductor layer. Spacers are formed...
2016/0336320 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes first and second Fin FETs and a separation plug made of an insulating material and disposed between the first and second Fin...
2016/0336319 DUAL NITRIDE STRESSOR FOR SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING
A method for manufacturing a semiconductor device includes forming a fin structure over a substrate and forming a first gate structure over a first portion of...
2016/0336318 Transistor with Threshold Voltage Set Notch and Method of Fabrication Thereof
A structure and method of fabrication thereof relate to a Deeply Depleted Channel (DDC) design, allowing CMOS based devices to have a reduced .sigma.V.sub.T...
2016/0336317 Method for Manufacturing a CMOS Device and Associated Device
A method for manufacturing a CMOS device includes providing a semiconductor base layer epitaxially growing a germanium layer on the semiconductor base layer,...
2016/0336316 SEMICONDUCTOR DEVICE AND STRUCTURE
A semiconductor device is provided. Gates of first PMOS and NMOS transistors are coupled together for receiving an input signal. Gates of second PMOS and NMOS...
2016/0336315 SEMICONDUCTOR DEVICE
A semiconductor device including fin type patterns is provided. The semiconductor device includes a first fin type pattern, a field insulation layer disposed...
2016/0336314 Semiconductor Device Containing HEMT and MISFET and Method of Forming the Same
A semiconductor structure with a MISFET and a HEMT region includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V...
2016/0336313 INTEGRATED CIRCUIT INCLUDING A DIODE AND TRANSISTORS IN A CASCODE CONFIGURATION
An integrated circuit can include a pair of transistors connected in a cascode configuration. In an embodiment, an anode of a diode can be disposed between the...
2016/0336312 SEMICONDUCTOR DEVICE AND TRANSISTOR
This disclosure provides a negative capacitance gate stack structure with a variable positive capacitor to implement a hysteresis free negative capacitance...
2016/0336311 SEMICONDUCTOR DEVICE INCLUDING CAPACITOR AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a semiconductor substrate having a first region and a second region; a first planar type capacitor including a gate electrode...
2016/0336310 Static Discharge System
A semiconductor circuit includes a three-terminal high voltage semiconductor device, a charge distribution structure and a static discharge system. The charge...
2016/0336309 OVERHEAT PROTECTION CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND VEHICLE THEREWITH
An overheat protection circuit has an NPN transistor, a power terminal to which a supply voltage is applied, a transmission path by which the supply voltage is...
2016/0336308 Integrated Circuit Including Lateral Insulated Gate Field Effect Transistor
An embodiment of an integrated circuit includes a minimum lateral dimension of a semiconductor well at a first surface of a semiconductor body. The integrated...
2016/0336307 SEMICONDUCTOR COMPONENT AND METHOD OF PRODUCING A SEMICONDUCTOR COMPONENT
A method of producing a semiconductor component includes providing a carrier with a first insulation layer, a mirror layer at least partially covered by the...
2016/0336306 MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
A memory device comprises a patterned multi-layers stacking structure, a semiconductor capping layer, a memory layer and a channel layer. The patterned...
2016/0336305 PHOTOELECTRIC DEVICE AND METHOD OF MANUFACTURING THE SAME
A photoelectric device includes an electrode structure, an LED (light emitting diode) element, a zener diode and a reflective cup. The LED element, the zener...
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