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Patent # Description
2016/0344433 AUTO-SELECTION METHOD FOR MODELING SECONDARY-PATH ESTIMATION FILTER FOR ACTIVE NOISE CONTROL SYSTEM
An active noise control system and associated auto-selection method for modeling a secondary path for the active noise control system are provided. The method...
2016/0344432 PILOT-BASED ANALOG ACTIVE INTERFERENCE CANCELLER
Aspects of the disclosure are directed to interference cancellation. A method for performing interference cancellation in a wireless communications device...
2016/0344431 METHODS FOR RECONFIGURING DIRECTIONAL COUPLERS IN AN RF TRANSCEIVER
Provided herein are methods of reconfiguring directional couplers in an RF transceiver. The methods can include designing and reconfiguring the directional...
2016/0344430 APPARATUS FOR RECONFIGURABLE DIRECTIONAL COUPLERS IN AN RF TRANSCEIVER WITH SELECTABLE PHASE SHIFTERS
Provided herein are apparatus and methods for reconfigurable directional couplers in an RF transceiver. Reconfigurable directional couplers can be reconfigured...
2016/0344429 ENCODER, CONTROLLER, METHOD FOR PROCESSING DATA
An encoder includes a rotation position sensor, a first addition information generator, an identification information generator, and a sender. The rotation...
2016/0344428 JOINT ENCRYPTION AND ERROR CORRECTION ENCODING
A technique includes jointly encrypting and error encoding plain text data. The joint encryption and error encoding includes processing plain text data in an...
2016/0344427 ADAPTIVE ERROR CORRECTION IN A MEMORY SYSTEM
According to one aspect, a method for adaptive error correction in a memory system includes reading data from a memory array of a non-volatile memory device in...
2016/0344426 PERFORMANCE OPTIMIZATION IN SOFT DECODING FOR TURBO PRODUCT CODES
Systems for performing turbo product code decoding may include an error intersection identifier suitable for determining a set of one or more error...
2016/0344425 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to perform a low-density parity check (LDPC) encoding on input...
2016/0344424 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC...
2016/0344423 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC...
2016/0344422 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a Low Density Parity Check (LDPC) codeword by LDPC...
2016/0344421 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to perform a low-density parity check (LDPC) encoding on input...
2016/0344420 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to perform a low-density parity check (LDPC) encoding on input...
2016/0344419 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC...
2016/0344418 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC...
2016/0344417 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a Low Density Parity Check (LDPC) codeword by LDPC...
2016/0344416 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC...
2016/0344415 TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC...
2016/0344414 FAULT TOLERANT SYNDROME EXTRACTION AND DECODING IN BACON-SHOR QUANTUM ERROR CORRECTION
Systems and methods are provided for quantum error correction. A quantum system includes an array of qubits configured to store an item of quantum information....
2016/0344413 DATA DEDUPLICATION WITH ADAPTIVE ERASURE CODE REDUNDANCY
Example apparatus and methods combine erasure coding with data deduplication to simultaneously reduce the overall redundancy in data while increasing the...
2016/0344412 METHOD AND APPARATUS FOR ENCODING AND DECODING LOW DENSITY PARITY CHECK CODES
An encoding apparatus is provided. The encoding includes a low density parity check (LDPC) encoder which performs LDPC encoding on input bits based on a...
2016/0344411 METHOD AND APPARATUS FOR ENCODING AND DECODING LOW DENSITY PARITY CHECK CODES
An encoding apparatus is provided. The encoding includes a low density parity check (LDPC) encoder which performs LDPC encoding on input bits based on a...
2016/0344410 Circuitry And Method For Generating Cyclic Redundancy Check Signatures
Circuitry and methods for generating parallel CRC signature bits are disclosed. The circuitry includes a data input for receiving parallel data input. The CRC...
2016/0344409 Method and Apparatus for Cipher Detection
An embodiment of a method and apparatus for ciphering data. Data is provided for ciphering. The data is ciphered in a plurality of steps. For each step,...
2016/0344408 METHOD FOR GENERATING FORWARD ERROR CORRECTION PACKET IN MULTIMEDIA SYSTEM AND METHOD AND APPARATUS FOR...
A method and apparatus for transmitting a Forward Error Correction (FEC) packet block including a plurality of FEC packets in a multimedia system are provided....
2016/0344407 GROUPS OF PHASE INVARIANT CODEWORDS
Disclosed herein are a system, non-transitory computer-readable medium, and method for encoding and decoding information on a data bearing medium. A message...
2016/0344406 SYSTEM, APPARATUS, AND METHOD FOR DECOMPRESSING DATA
A system for data decompression may include a processor coupled to a remote memory having a remote dictionary stored thereon and coupled to a decompression...
2016/0344405 Coding Method, Decoding Method, Coder, and Decoder
A coding method, a decoding method, a coder, and a decoder, where the coding method includes obtaining the pulse distribution, on a track, of the pulses to be...
2016/0344404 DELTA SIGMA MODULATOR WITH MODIFIED DWA BLOCK
The disclosure provides a delta sigma modulator. The delta sigma modulator includes a summer. The summer generates an error signal in response to an input...
2016/0344403 Zero-offset voltage feedback for AC power supplies
A high voltage AC measurement method and circuit is disclosed to measure with zero offset and mirrored distortion based on hybrid chopping and fully...
2016/0344402 METHOD AND APPARATUS FOR ENCODING ANALOG SIGNAL INTO TIME INTERVALS
Method for encoding analog signal into time intervals wherein a generation of time intervals using a time encoding machine. A signal of a constant value is...
2016/0344401 Multi-path digital-to-analog converter
A digital-to-analog converter which improves dynamic range by apportioning a least significant bits portion of an incoming digital signal to a low-path circuit...
2016/0344400 METHODS AND APPARATUS TO INCREASE AN INTEGRITY OF MISMATCH CORRECTIONS OF AN INTERLEAVED ANALOG TO DIGITAL...
Methods, apparatus, systems and articles of manufacture to increase an integrity of mismatch corrections in an interleaved analog to digital converter are...
2016/0344399 VOLTAGE REGULATOR WITH LOAD COMPENSATION
A voltage regulation system provides a relatively stable voltage source without introducing the typical costs of a ground buffer. The disclosed voltage...
2016/0344398 METHODS AND SYSTEMS FOR CASCADED PHASE-LOCKED LOOPS (PLLS)
Systems and methods are provided for cascaded phase-locked loops (PLLs). A plurality of phase-locked loops (PLLs) arranged in a cascaded manner may be used in...
2016/0344397 LOCK DETECTION CIRCUIT, OSCILLATION SOURCE CIRCUIT AND WIRELESS DEVICE
A lock detection circuit includes: a phase difference detection circuit that detects a phase difference between a divided signal of an oscillation signal and a...
2016/0344396 PHASE LOCKED LOOP WITH LOCK DETECTOR
A phase locked loop is disclosed comprising: a phase detector, loop filter and a frequency controlled oscillator. The phase detector is configured to determine...
2016/0344395 CHARGE PUMP CIRCUIT FOR A PHASE LOCKED LOOP
Disclosed herein is a circuit including a phase frequency detector (PFD) configured to compare phases of an input signal and a feedback signal, and to generate...
2016/0344394 SELECTOR CIRCUIT, EQUALIZER CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT
A first P-channel transistor to a gate of which a first input signal is inputted and a second P-channel transistor to a gate of which a selection signal is...
2016/0344393 TEMPERATURE COMPENSATION CIRCUIT AND RADAR APPARATUS
A temperature compensation circuit includes: an oscillation circuit configured to include a replica amplifier of a target amplifier to be subjected to...
2016/0344392 RING FREQUENCY DIVIDER
A circuit for a divider or counter may include a frequency divider having multiple rings for dividing an input frequency to obtain an output frequency. The...
2016/0344391 CARRY-SKIP ONE-BIT FULL ADDER AND FPGA DEVICE
A carry-skip one-bit full adder and a field programmable gate array device, the full adder includes: a first multiplexer, a second multiplexer, and an adder,...
2016/0344390 Routing and Programming for Resistive Switch Arrays
Various structures and methods are disclosed related to routing and programming circuitry on integrated circuits ("IC") that have arrays of programmable...
2016/0344389 SEMICONDUCTOR DEVICE
A semiconductor device includes a 2-input NAND decoder and an inverter that have six MOS transistors arranged in a line. The MOS transistors of the decoder are...
2016/0344388 DRIVING CIRCUIT
A driving circuit is proposed. The driving circuit includes a scanning driving circuit and at least one group of combinational logic circuits. A first group of...
2016/0344387 EVALUATION METHOD FOR SENSOR SIGNALS
A method for evaluating signal curves on sensor devices includes acquiring a temporal signal curve with a sensor device. Time intervals are formed from this...
2016/0344386 PROXIMITY SENSOR ASSEMBLY HAVING INTERLEAVED ELECTRODE CONFIGURATION
A proximity switch assembly and method for detecting activation of a proximity switch assembly is provided. The assembly includes a plurality of proximity...
2016/0344385 HIGH SPEED SWITCHING SOLID STATE RELAY CIRCUIT
A switching circuit includes a bridge rectifier to receive voltage inputs across a load and an optical isolator to receive a logic input signal and generate an...
2016/0344384 BIDIRECTIONAL POWER SWITCH WITH IMPROVED SWITCHING PERFORMANCE
A bidirectional power switch includes first and second thyristors connected in antiparallel between first and second conduction terminals of the switch. The...
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